Abstract: Presented is a method for determining the maximum number of key selection vectors (KSVs) supported by an HDCP source. The method includes providing a number of KSVs to the HDCP source, determining whether the HDCP source has entered a failure mode in response to the provided number of KSVs, increasing or decreasing the number of KSVs in response to the HDCP source not entering or entering the failure mode, providing the increased or decreased number of KSVs to the HDCP source, determining whether the HDCP source has entered the failure mode in response to the provided increased or decreased number of KSVs, and repeating the increasing, decreasing, and determining steps until the difference between a lowest number of provided KSVs resulting in the HDCP source entering the failure mode and a highest number of provided KSVs resulting in the HDCP source not entering the failure mode is one.

Abstract: A network interface device includes a security database and a security services engine. The security database is configured to store patterns corresponding to predetermined malware. The security services engine is configured to compare data to be transmitted through a network to the patterns stored in the security database, and the security database is configured to receive updated patterns from the network.

Abstract: Presented is a method for determining the maximum number of key selection vectors (KSVs) supported by an HDCP source. The method includes transmitting a number of KSVs to the HDCP source, determining whether the HDCP source has entered a failure mode in response to the transmitted number of KSVs, increasing or decreasing the number of KSVs in response to the HDCP source not entering or entering the failure mode, transmitting the increased or decreased number of KSVs to the HDCP source, determining whether the HDCP source has entered the failure mode in response to the transmitted increased or decreased number of KSVs, and repeating the increasing, decreasing, and determining steps until the difference between a lowest number of transmitted KSVs resulting in the HDCP source entering the failure mode and a highest number of transmitted KSVs resulting in the HDCP source not entering the failure mode is one.

Abstract: A cryptographic method for a cryptographic system may include receiving a basic point on an elliptic curve and a scalar k; initializing primary variables with the basic point; iterating through a plurality of operations using a repetitive operation variable; identifying a fault, in one or more of setting secondary variables corresponding to the primary variables, resetting the primary and secondary variables, and calculating a scalar product in a multiplier of the cryptographic system, the identifying of the fault using the primary and secondary variables based on a portion of the scalar k, the fault identified by one of determining that values of at least two of the secondary variables are different and determining that at least one of the secondary variables is different from at least one of the primary variables; and outputting the scalar product if there is no fault identified.

Abstract: In a method for testing a transport packet decrypting module of a client device, a first decryption operation of the transport packet decrypting module is implemented on a test encrypted control word using a content decryption key ladder to derive a test control word, a second decryption operation of the transport packet decrypting module is implemented on one or more test transport packets using the test control word via a predetermined content decryption algorithm, the KIV is derived from the decrypted transport packets, and the derived KIV is compared with a value stored in the client device to verify whether the transport packet decrypting module of the client device is functioning properly.

Abstract: A computer-implemented method for detecting rootkits is disclosed. The computer-implemented method may include sending periodic security communications from a privileged-processor-mode region of a computing device. The computer-implemented method may also include identifying at least one of the periodic security communications. The computer-implemented method may further include determining, based on the periodic security communications, whether the privileged-processor-mode region of the computing device has been compromised. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: An embodiment of the invention provides a circuit for detecting a malfunction generation attack, including: at least one sensor circuit adapted to detect a radiation of a light; and a detection circuit for detecting an intermediate voltage between a voltage corresponding to a High level and a voltage corresponding to a Low level in accordance with an output from the at least one sensor circuit, and outputting a detection signal. At least one sensor circuit has an output node a level at which is changed in accordance with the radiation of the light, and outputs a signal corresponding to the level at the output node which is changed in accordance with the radiation of the light. The detection circuit outputs the detection signal when a level of the output signal from the at least one sensor circuit reaches a level previously set.

Abstract: A data processing apparatus comprises a monolithic integrated circuit having a data processor, a non-volatile memory storing at least one security code, and at least one interface at the boundary of the integrated circuit via which communication with the data processor can occur. Processing by the data processor of data received at the at least one interface is controlled by the at least one security code.

Abstract: An improved architecture is disclosed of a crypto engine, such as a Janus Crypto Engine (JCE) having a Programmable Cryptographic Channel (PCC) using a Programmable Cryptographic Processor (PCP). The architecture of the crypto engine does not require zeroizing between messages received by the PCC. Consequently, using the new architecture of the present invention, the crypto engine can allocate PCC resources based on throughput and algorithm needs, reducing latency, and employing fewer PCCs.

Abstract: Various embodiments are described herein for a mobile communication device that authenticates a smart battery prior to use. The mobile device includes a main processor and a device memory. The device memory stores first and second portions of security information used for authentication. The smart battery includes a battery processor and a battery memory. The battery memory stores a third portion of security information used for authentication. The main processor sends an authentication request including the first portion of security information to the battery processor, and the battery processor generates a response based on the first and third portions of security information and sends the generated response to the main processor. The smart battery is authenticated if the generated response matches the second portion of security information.

Abstract: A system and method of ensuring hardware security of a device, such as an integrated circuit having secure data stored thereon. The integrated circuit or other hardware device can implement one or more configurable fuses that limit access to one or more secure locations within the device. The secure locations may contain secure data. The state of the configurable fuses can be ensured, thereby limiting access to secure locations, by forcing the occurrence of a logical state prior to allowing access to hardware locations configured by the fuses. A configurable non-secure access code can be used to force the occurrence of the logical state. Receipt of the non-secure access code by the hardware device forces the occurrence of the hardware state, thereby ensuring access only to those secure locations configured by the fuses.

Abstract: A method is disclosed for checking HDCP link integrity in a High-bandwidth Digital Content Protection (HDCP) transmitter. From an HDCP receiver communicatively coupled to the HDCP transmitter by an HDCP-protected interface, a single-bit value indicative of HDCP 1.1 feature support is read. When the single-bit value is true, HDCP Enhanced Link Verification is used in the HDCP transmitter. When the single-bit value is false, the method determines whether the HDMI receiver supports HDCP Enhanced Link Verification, and if so, HDCP Enhanced Link Verification is used in the HDCP transmitter.

Abstract: Systems and methods for cryptographically masking private data are described. The apparatus may include a masking engine to hash private data and a masking values table to provide a masked value using a lookup value derived from the hashed private data. The method my include receiving private data, transforming the private data into a set of masked data items and providing the set of masked data items.

Abstract: An apparatus for performing a fault detection operation and methods thereof are provided. The example apparatus may include a first-coordinate computing unit receiving a first point and a second point in a binary finite field, the first and second points established based on a basic point within a given elliptic curve, each of the first and second points including a first coordinate value and a second coordinate value, the first-coordinate computing unit performing a first addition operation on the first point and the second point to compute a third coordinate value and a second-coordinate computing unit performing a second addition operation on the first and second points to compute a fourth coordinate value, the first and second addition operations computed based on at least one of a difference between the first coordinate values of the first and second points and a difference between the second coordinate values of the first and second points.

Abstract: A method for authenticating access to a secured chip SC by a test device TD, the test device storing at least one common key CK and one test key TK, the secured chip SC storing the same common key CK and a reference digest F(TK) resulting from a cryptographic function on the test key TK, the method comprising the steps of:—receiving, by the test device TD, a challenge R produced by the secured chip SC,—combining, by the test device TD, the received challenge R with the test key TK by applying a bidirectional mathematical operation (op), encrypting the result (TK op R) with the common key CK, obtaining a cryptogram CK(TK op R),—sending the cryptogram CK(TK op R) to the secured chip SC—decrypting, by the secured chip SC, the cryptogram CK(TK op R) with the common key CK, obtaining an image key TK? representing the test key TK by applying, with the challenge R, the reverse operation (op-1) of the mathematical operation (op) previously used by the test device TD,—calculating an expected digest F(TK?) of the image

Abstract: A network interface device includes a security database and a security services engine. The security database is configured to store patterns corresponding to predetermined malware. The security services engine is configured to compare data to be transmitted through a network to the patterns stored in the security database, and the security database is configured to receive updated patterns from the network.

Abstract: Presented is a method for determining the maximum number of key selection vectors (KSVs) supported by an HDCP source. The method includes providing a number of KSVs to the HDCP source, determining whether the HDCP source has entered a failure mode in response to the provided number of KSVs, increasing or decreasing the number of KSVs in response to the HDCP source not entering or entering the failure mode, providing the increased or decreased number of KSVs to the HDCP source, determining whether the HDCP source has entered the failure mode in response to the provided increased or decreased number of KSVs, and repeating the increasing, decreasing, and determining steps until the difference between a lowest number of provided KSVs resulting in the HDCP source entering the failure mode and a highest number of provided KSVs resulting in the HDCP source not entering the failure mode is one.

Abstract: A system and method for securing a personal device that includes a device core and a peripheral device from unauthorized access or operation. The system and method use a switch, included fully or partially within an envelope of the device and which cannot be affected in its operation by either the device core or the peripheral device. The switch may be activated by an authorized user of the personal device either preemptively or in response to a detected threat.

Abstract: Presented is a method for determining the maximum number of key selection vectors (KSVs) supported by an HDCP source. The method includes transmitting a number of KSVs to the HDCP source, determining whether the HDCP source has entered a failure mode in response to the transmitted number of KSVs, increasing or decreasing the number of KSVs in response to the HDCP source not entering or entering the failure mode, transmitting the increased or decreased number of KSVs to the HDCP source, determining whether the HDCP source has entered the failure mode in response to the transmitted increased or decreased number of KSVs, and repeating the increasing, decreasing, and determining steps until the difference between a lowest number of transmitted KSVs resulting in the HDCP source entering the failure mode and a highest number of transmitted KSVs resulting in the HDCP source not entering the failure mode is one.

Abstract: The present invention relates to a method for testing cryptography circuits. It also relates to a secure cryptography circuit capable of being tested. The cryptography circuit includes registers and logic gates, and a test thereof performs a differential power analysis on the registers of the circuit. A cryptography circuit being secure and including a first half-circuit associated with a second half-circuit operating in complementary logic, the electric power supply of the first half-circuit is separated from the electric power supply of the second half-circuit, the differential power analysis being carried out in parallel on each half-circuit, the two power supplies being combined into one and the same electric power supply after the test.

Abstract: Live payment terminals employing payment system public keys are evaluated. Dedicated test payment cards are internally issued by an operator of the payment system. Presentation of at least one of the cards to at least one of the terminals is facilitated. Testing the at least one of the terminals for proper management of the payment system public keys is facilitated. The testing can be in a test transaction conducted when the at least one of the cards is presented to the at least one of the terminals. The steps of facilitating presentation and facilitating testing can be conducted substantially without auditing.

Abstract: A method of manufacturing a device containing a key is disclosed. The method generally includes the steps of (A) fabricating a chip comprising a random number generator, a nonvolatile memory and a circuit, (B) applying electrical power to the chip to cause the random number generator to generate a signal conveying a sequence of random numbers, (C) commanding the chip to program a first arbitrary value among the random numbers into the nonvolatile memory, wherein the device is configured such that the first arbitrary value as stored in the nonvolatile memory is unreadable from external to the device and (D) packaging the chip.

Abstract: A base station for use in a code division multiple access communication system comprises circuitry configured to process a user equipment identification (UE ID) by ½ rate convolutionally encoding the UE ID to produce a code. The code is used by the base station for scrambling a high speed shared control channel (HS-SCCH). The base station is configured to transmit a wireless signal. The wireless signal provides the user equipment with payload data carried on a high speed physical downlink shared channel (HS-PDSCH). The HS-PDSCH is associated with the HS-SCCH.

Abstract: For use in a distributed system where a client computer is operable to communicate with a server computer and to receive a digital certificate associated with a remote external component, apparatus for securing a communications exchange between computers includes a hasher, responsive to the client computer receiving a digital certificate, for hashing data associated with the client computer and the server computer with data associated with the digital certificate to create a first message digest, and a first transmitter for transmitting the first message digest to the remote external component.

Abstract: A check computation circuit executes a computation corresponding to a computation for generating confidential CRC data, with respect to confidential data read from a non-volatile device. A comparison circuit compares the result of the computation in the check computation circuit with confidential CRC data read from the non-volatile device. When the result of the comparison indicates a mismatch, i.e., an error is detected, an encryption circuit encrypts the confidential data and the confidential CRC data using a secret key registered in a secret key register, and outputs the encrypted confidential data and confidential CRC data to the outside of a semiconductor integrated circuit.

Abstract: An electronic circuit for cryptographic processing, comprising a first combinatorial logical circuit, arranged to perform a first set of logical operations on input data and to produce output data, the output data having a functional relation to the input data, further comprising at least a second combinatorial logical circuit, arranged to perform a second set of logical operations on the same input data and to produce output data, the output data having an identical functional relation to the input data, wherein the first set of logical operations is different from the second set of logical operations, and wherein the electronic circuit is arranged to dynamically select one combinatorial logical circuit, of a set comprising at least the first combinatorial logical circuit and the second combinatorial logical circuit, for performing logical operations on the input data and producing output data.

Abstract: A method for testing the resistance of an algorithm using at least one secret quantity against attacks measuring physical effects of the execution of the algorithm by an integrated circuit, consisting of implementing statistical key search functions based on hypotheses about at least some bits thereof, by exploiting the input and output values of steps of the algorithm.

Abstract: A method of passing validated information along a series of entities, the series of entities including a source entity, a series of at least one intermediate entity, and a target entity, wherein each of the entities shares a validation parameter with its immediately neighboring entity or entities in the series, the method comprising the steps, commencing in the source entity, of: (a) in the current entity, generating a validation code for the information, the validation code being based on the validation parameter shared between the current entity and the next entity in the series; (b) outputting the validation code; c) receiving the validation code in the next entity in the series and making that entity the current entity; (d) verifying the information via the validation code in the current entity using the validation parameter required to verify it; (e) repeating steps (a) to (d) until the last intermediate entity in the series has output the validation code it generated; and (f) receiving the validation co

Abstract: Provided are a method, system, and article of manufacture, wherein a first write only register is maintained in an encryption engine of a cryptographic unit. A second write only register is maintained in a decryption engine of the cryptographic unit. A cryptographic key is written in the first write only register and the second write only register, wherein the cryptographic key is inaccessible for reading from any entity that is external to the cryptographic unit.

Abstract: Sensor device times can vary and may be set significantly wrong. In one embodiment, the present invention can adjust a sensor's time by receiving a raw security event from a sensor device, determining whether a timestamp included in the raw security event is within a timerange around a time known by the agent, determining whether a time offset is in a non-initialized state, and determining whether to adjust the timestamp by applying the time offset to the timestamp, the determination being based on whether the timestamp included in the security event is within the timerange around the time known by the agent and whether the time offset is in a non-initialized state.

Abstract: In preferred embodiments, a cryptographic device in which two key sets are stored: a normal key set (typically unique to the device) and a test key set (typically used by each of a relatively large number of devices). The device uses the normal key set in a normal operating mode and uses the test key set in at least one test mode which can be a built-in self test mode. Alternatively, the device stores test data (e.g., an intermediate result of an authentication exchange) in addition to or instead of the test key set. In other embodiments, the invention is a cryptographic device including a cache memory which caches a portion of a key set for performing an authentication exchange and/or at least one authentication value generated during an authentication exchange. Other embodiments of the invention are systems including devices that embody the invention and methods that can be performed by systems or devices that embody the invention.

Abstract: In a method for testing a transport packet decrypting module of a client device, a first decryption operation of the transport packet decrypting module is implemented on a test encrypted control word using a content decryption key ladder to derive a test control word, a second decryption operation of the transport packet decrypting module is implemented on one or more test transport packets using the test control word via a predetermined content decryption algorithm, the KIV is derived from the decrypted transport packets, and the derived KIV is compared with a value stored in the client device to verify whether the transport packet decrypting module of the client device is functioning properly.

Abstract: An authenticating device generates authentication base data and verification data. The authenticating device embeds the verification data in the authentication base data to generate authentication data. The authenticating device transmits the authentication data to a device to be authenticated. In the device to be authenticated, the verification data is extracted from the transmitted authentication data, and verification reply data is generated on the basis of the extracted verification data. The device to be authenticated generates reply base data, and embeds the verification reply data in the reply base data to generate authentication reply data. The device to be authenticated transmits the authentication reply data to the authenticating device. The authenticating device extracts the verification reply data from the transmitted authentication reply data.

Abstract: A computer security system for use in a network environment comprising at least a plurality of user computers arranged to communicate over a network, the system comprising a warning message exchange system operable to allow the communication from the user computers of warning messages relating to suspect data identified as a possible security threat; a message counting system operable to maintain a count for every particular piece or set of suspect data based on the number of warning messages communicated relating thereto; and network security means operable to act against any particular piece or set of suspect data for which the count maintained therefor exceeds at least one threshold value.

Abstract: A programmable processor calculates a hash value of a memory region, then monitors program operation to detect a security monitoring system initialization. The hash value is added to extend a security measurement sequence if the security monitoring system initialization clears a security state. Processors that implement similar methods, and systems using such processors, are also described and claimed.

Abstract: Methods and systems for storing secret information in a digital vault include obtaining from a user answers to a number of different questions, and identifying which subsets or combinations of the questions for which correct answers later provided by an entity will enable that entity to gain access to the secret information in the vault. The number of questions in each combination is less than the total number of questions, and at least one subset has at least two questions. For each subset, a corresponding string of answers is generated, the string is hashed, and the resulting hash value is combined with the digital secret. This hides the digital secret, which is then stored in the vault. Methods and systems for registering authentication material include storing a hashed string of answers for each combination, generating “multiple authenticators.

Abstract: A cryptographic system comprising: 1) a first Montgomery-based cryptographic engine that receives a first operand and a second operand and generates a first result and 2) a second Montgomery-based cryptographic engine that receives a first reduced operand derived from the first operand and a second reduced operand derived from the second operand and generates a second result. The second Montgomery-based cryptographic engine operates in parallel with the first Montgomery-base cryptographic engine. The cryptographic system further comprises a comparator for comparing the second result to a first reduced result derived from the first result and generating an error flag if the second result and the first reduced result are different.

Abstract: According to the invention, a circuit that is capable of automated scan testing is disclosed. Included in the circuit are a cryptographic engine, a digital circuit, an input pin, and an output pin. The cryptographic engine capable of performing at least one of encryption and decryption of one or more digital signals. The digital circuit includes combinatorial logic and a number of memory cells. The memory cells have scan inputs connected serially in a scan chain. The input pin and output pin are coupled to the scan chain. At least one of the input pin and the output pin carries at least some cipher text data of the scan chain.

Abstract: Various embodiments are described herein for a mobile communication device that authenticates a smart battery prior to use. The mobile device includes a main processor and a device memory. The device memory stores first and second portions of security information used for authentication. The smart battery includes a battery processor and a battery memory. The battery memory stores a third portion of security information used for authentication. The main processor sends an authentication request including the first portion of security information to the battery processor, and the battery processor generates a response based on the first and third portions of security information and sends the generated response to the main processor. The smart battery is authenticated if the generated response matches the second portion of security information.

Abstract: Debugging of a network security appliance is facilitated by allowing for generation of debug information in a user-friendly manner. In one embodiment, the network security appliance automatically detects a presence of a file in a removable non-volatile memory and, in response, places at least one of its components in debug mode. This allows the component to write debug information to the removable non-volatile memory. Removal of the removable non-volatile memory from the network security appliance automatically triggers placement of the component in non-debug mode. The debug information generated in the network security appliance may be forwarded to a server computer for analysis.

Abstract: A signal generator has a signal creating and supplying unit which creates a test signal to be transmitted to a measurement object and a license management unit which manages a license of waveform data for use in creating the test signal by the signal creating and supplying unit.

Abstract: Methods and apparatuses are provided that can inform certain processes and/or even the user about the relative strength/weakness of cryptography services being used. In certain methods, for example, at least one cryptography service parameter threshold is established. The method further includes, selectively detecting a request for at least one cryptography service, and selectively performing at least one correctness detection action based on the requested cryptography service and the cryptography service parameter threshold. The cryptography service parameter threshold identifies acceptable/unacceptable cryptography algorithms, acceptable/unacceptable cryptography key size parameters, acceptable/unacceptable cryptography seed size parameters, and other like parameters that the requested cryptography service information can be compared with.

Abstract: A method and system for securing data in a computer system provides the capability to secure information even when it leaves the boundaries of the organization using a data loss agent integrated with encryption software. A method for securing data in a computer system comprises detecting attempted connection or access to a data destination to which sensitive data may be written, determining an encryption status of the data destination, allowing the connection or access to the data destination when the data destination is encrypted, and taking action to secure the sensitive data when the data destination is not encrypted.

Abstract: A method of protecting a microcomputer system against manipulation of data stored in a memory arrangement of the microcomputer system, in particular a control program stored there. Checking mechanisms are executed at preselectable points in times to check for manipulation of the data. To permit effective blocking of manipulated data stored in the memory arrangement, new data is stored at least partially in a volatile memory, in particular in a random access memory, in reprogramming or new programming of the memory arrangement, the checking mechanisms are executed and the portion of the new data stored in the volatile memory is copied to the memory arrangement if no manipulation of the new data has been detected.

Abstract: Architecture for embedding a cryptographic engine in a processor is disclosed. An ASIC processor is embedded with a programmable processing core, such as an FPGA, with the key register and I/O registers remaining in fixed logic.

Abstract: An integrated circuit that includes operational circuitry and message digest generation circuitry coupled to the operational circuitry, a method for testing an integrated circuit including message digest generation circuitry, and a system including an integrated circuit (which includes message digest generation circuitry) and at least one external device coupled to the integrated circuit. The message digest generation circuitry is coupled and configured to generate at least one digest of at least one message, where each message is indicative of at least one aspect of the integrated circuit's state. For example, a message can be a sequence of voltages or logic levels sampled at a specific sequence of nodes of operational circuitry of the integrated circuit.

Abstract: In a system for performing an action regarding an account comprising entity information in response to an electronic communication received from a sender by a receiver, wherein the electronic communication includes sender identity information associated with the account and a digital signature derived from an electronic message using a private key of a public-private key pair, and wherein the public key of the pair has been associated with the account by the receiver such that the public key is retrievable based on the sender identity information, a method of validating the identity of the sender for the electronic communication includes: (a) retrieving the public key based on the received sender identity information; and (b) comparing a function of the public key and the digital signature with a function of the electronic message. Neither a PIN nor a password is required to be transmitted to the receiver for validating the identity of the sender.

Abstract: A system is provided to perform a key path diagnostic that aids in isolating an error within the encryption storage system. The system includes at least one drive, a key proxy, a key server, a key manager, and a processor. The processor performs a first communication test on a path between the key proxy and the drive. The first communication test verifies that the path between the drive and the key proxy is operational. The processor performs a second communication test on a path between the key proxy and the key server. The second communication test verifies that the path between the key proxy and the key server is operational. In addition, processor sends a command to the key manager to attempt communication with the key manager. The communication attempt verifies the installation and configuration parameters related to the key manager.

Abstract: An object is to evaluate the strength in consideration of the relationship held between keys, to allow the detection of a weak key condition to lower the difficulty in decrypting ciphertext, and to detect a weak key based on the weak key condition. Based on the relationship between keys in a key schedule and based on estimated keys, a certain estimated extended key can be calculated by utilizing the relationship between the estimated extended key in the key schedule and an estimated extended key having been calculated, and cost information required for calculation is outputted to allow the verification of a weak key condition. A weak key can be detected based on the weak key condition, and the difficulty in decrypting ciphertext can be increased without modifying an encryption apparatus.

Abstract: A QKD cascaded network (5) with loop-back capability is disclosed. The QKD system network includes a plurality of cascaded QKD relays (10, 20, 30) each having two QKD stations Alice (A) and Bob (B) therein. Each QKD relay also includes an optical switch (50). The optical switch is optically coupled to each QKD station in the relay, as well as to the input ports (PI) of the relay. In a first position, the optical switch allows for communication between adjacent relays. In a second position, the optical switch allows for pass-through communication between the QKD relays (10 and 30) that are adjacent the relay whose switch is in the first position. Also in the second position, the optical switch allows for communication between the QKD stations A and B within the relay. This, in turn, allows for diagnostic measurements to be made of one or both of the QKD stations via an optical path (90) that is entirely within the relay station enclosure (12, 22, 32).