Nonuniform Or Patterned Coating Patents (Class 427/97.3)
-
Publication number: 20140192498Abstract: An electrical interconnect including a first circuitry layer with a first surface and a second surface. At least a first dielectric layer is printed on the first surface of the first circuitry layer to include a plurality of first recesses. A conductive material is plated on surfaces of a plurality of the first recesses to form a plurality of first conductive structures electrically coupled to, and extending generally perpendicular to, the first circuitry layer. A filler material is deposited in the first conductive structures. At least a second dielectric layer is printed on the first dielectric layer to include a plurality of second recesses generally aligned with a plurality of the first conductive structures. A conductive material is plated on surfaces of a plurality of the second recesses to form a plurality of second conductive structures electrically coupled to, and extending parallel to the first conductive structures.Type: ApplicationFiled: September 6, 2012Publication date: July 10, 2014Applicant: HSIO TECHNOLOGIES, LLCInventor: James Rathburn
-
Publication number: 20140182897Abstract: A circuit board includes an inorganic material insulating layer, a first circuit pattern layer formed on a surface of the inorganic material insulating layer, a first build-up insulating layer formed on the inorganic material insulating layer and formed of an organic material, and a second circuit pattern layer formed on a surface of the first build-up insulating layer.Type: ApplicationFiled: December 30, 2013Publication date: July 3, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Doo Hwan LEE, Yul Kyo CHUNG, Yee Na SHIN, Seung Eun LEE
-
Publication number: 20140184350Abstract: A device is provided for use with a signal, wherein the device includes a substrate, a first signal trace and a second signal trace. The first signal trace is disposed within the substrate at a first plane from the top surface by a distance d1. The second signal trace is disposed within the substrate at a second plane from the top surface by a distance d2, wherein d2<d1<t. The first signal trace includes a first portion, whereas the second signal trace includes a second portion. The first portion is parallel to the second portion. The first signal trace and the second signal trace form a differential pair. The first signal trace is operable to conduct a positive portion of the signal, whereas the second signal trace is operable to conduct a negative portion of the signal.Type: ApplicationFiled: December 27, 2012Publication date: July 3, 2014Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Gregory Eric Howard
-
Publication number: 20140186521Abstract: Described are LTCC devices, with external silver containing electrical contacts, that are sequentially plated with a nickel containing metal and a gold containing metal.Type: ApplicationFiled: December 9, 2013Publication date: July 3, 2014Applicant: E I DU PONT DE NEMOURS AND COMPANYInventors: KUMARAN MANIKANTAN NAIR, Michael A. Skurski, John D. Voultos
-
Publication number: 20140178571Abstract: The purpose of the present invention is to provide a method for using a metal ion solution of low concentration to efficiently form a metal film pattern of excellent accuracy and reliable adhesion on a resin substrate. A resin substrate having a metal film pattern formed thereon is produced by a method that includes the following steps (a) to (e): (a) a step for pattern-printing of a latent image agent (2) onto the surface of a resin substrate (1) ; (b) a step for bringing the area imprinted with the latent image agent (2) into contact with a solution containing metal ions, and forming a metal salt (3); (c) a step for bringing the metal salt (3) into contact with an acidic treatment liquid containing a reducing agent, and reducing the metal salt; (d) a step for forming an electroless nickel plating film (5) on the area imprinted with the latent image agent; and (e) a step for precipitating an electroless copper plating (6) onto the surface of the nickel plating film (5).Type: ApplicationFiled: May 17, 2012Publication date: June 26, 2014Inventors: Akimitsu Bamba, Kazuhisa Tsujimoto, Hideyuki Yamada, Kouichi Kugimiya
-
Publication number: 20140176453Abstract: The present disclosure provides a method for manufacturing a touch panel, wherein the method comprises: forming a touch sensing layer on a visible region and a non-visible region of a cover substrate, wherein the non-visible region is located at periphery of the visible region forming a first opaque insulating layer on the touch sensing layer in the non-visible region; forming a wiring layer on the first opaque insulating layer: and forming a conductive layer to electrically connect the wiring layer and the touch sensing layer. Moreover, the present disclosure also provides a touch panel. Accordingly, the touch sensing accuracy is maintained, and the production rate is improved.Type: ApplicationFiled: December 25, 2012Publication date: June 26, 2014Inventors: YUH-WEN LEE, Hsiang-Lung Hsia, Kun-Rung Lin, Minghua Ya, Xianbin Xu, Tsung-Ke Chiu, Huilin Ye, Jung Yu
-
Publication number: 20140174789Abstract: The present disclosure relates to a touch panel, and more particularly, to a kind of touch panel which actualizes various touch response functions on a same surface and a fabrication method thereof. The touch panel includes an upper cover substrate, a first electrode array, a patterned mask layer, and at least a second electrode array. The upper cover substrate includes a display area and a peripheral area surrounding the display area. The first electrode array is disposed corresponding to the display area. The patterned mask layer is disposed corresponding to the peripheral area. At least a second electrode array is disposed corresponding to a first patterned area of the patterned mask layer. A fabricating method for the touch panel is also provided.Type: ApplicationFiled: December 20, 2012Publication date: June 26, 2014Inventors: Yau-Chen Jiang, Jia Wu, Zhixiong Cai, Pingping Huang
-
Publication number: 20140174810Abstract: Disclosed herein are a printed circuit board (PCB) and a method of manufacturing the same. The PCB includes a core layer, metal bumps embedded in the core layer, one surface of the metal bumps being opened to the outside, and a solder resist layer including an opening is manufactured by a separating substrate manufacture method. In the PCB, empty space between the bumps is filled with an insulating material instead of solder resist, and thus, a problem in terms of an empty space between bumps is addressed without requiring a new solder resist process.Type: ApplicationFiled: September 18, 2013Publication date: June 26, 2014Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Seung Hyun Noh, Dong Uk Lee, Young Gon Kim
-
Publication number: 20140178644Abstract: A structure and method for a post plate of a die set that can be used to emboss a plurality of contact pads of a flexible printed circuit during the formation of a printer printhead. In one embodiment, a plurality of post plate posts can be formed, where each post plate post has a flat upper surface, generally straight sides, and a sharp corner where the flat upper surface and the generally straight sides intersect. Each post can be polished using, for example, a pad and an abrasive polishing compound or an electrochemical polishing process, to round the sharp corners to form a post having a rounded contour. In another embodiment, a plurality of post plate posts each having a rounded contour can be formed using a molding process.Type: ApplicationFiled: December 20, 2012Publication date: June 26, 2014Applicant: XEROX CORPORATIONInventors: Peter J. Nystrom, Bryan R. Dolan, Gary D. Redding
-
Publication number: 20140168099Abstract: A touch panel and a method of manufacturing the same are provided. The touch panel comprises: a cover substrate comprising a visible area and a non-visible area, wherein the non-visible area is located in a peripheral area of the visible area; an electrode layer formed on the visible area and the non-visible area of the cover substrate; a conductive masking layer formed on the non-visible area and disposed on a part of the electrode layer that is located on the non-visible area; and a plurality of connecting wires formed on the conductive masking layer and electrically connected to the electrode layer through uniaxial conduction of the conductive masking layer. The present disclosure comprises a method of manufacturing the touch panel. Accordingly, product yield is increased and touch sensing precision is maintained.Type: ApplicationFiled: December 17, 2012Publication date: June 19, 2014Inventors: Yuh-Wen Lee, Xianbin Xu, Keming Ruan, Qiong Yuan
-
Publication number: 20140170304Abstract: A board printing apparatus includes a board working table, a first printing table, a second printing table, and a control portion controlling printing operations. The control portion is configured to perform second printing on a board held by the board working table by a large component mask of the second printing table after a first printing performed on the board held by the board working table by a small component mask of the first printing table.Type: ApplicationFiled: December 17, 2013Publication date: June 19, 2014Applicant: YAMAHA HATSUDOKI KABUSHIKI KAISHAInventor: Takeshi FUJIMOTO
-
Publication number: 20140159850Abstract: A method and device includes a first conductor formed on a first dielectric layer as a partial turn of a coil. A second conductor is formed on a second dielectric layer that covers the first dielectric layer and first conductor, the second conductor forming a partial turn of the coil. A vertical interconnect couples the first and second conductors to form a first full turn of the coil. The interconnect coupling can be enhanced by embedding some selective magnetic materials into the substrate.Type: ApplicationFiled: December 11, 2012Publication date: June 12, 2014Inventors: Mihir K. Roy, Mathew J. Manusharow, Harold Ryan Chase
-
Publication number: 20140144693Abstract: There is provided a printed circuit board, including: a core layer, a conductive via formed in a via hole of the core layer, an upper land formed on an upper surface of the conductive via, and a lower land formed on a lower surface of the conductive via, wherein a center of the upper land and a center of the lower land do not coincide with each other on a plane, so that the center of the upper land and the center of the lower land formed in the printed circuit board are arranged so as not to coincide with each other, thereby increasing durability of an insulating region against pressure in a wet process, and thus damage to the printed circuit board can be reduced.Type: ApplicationFiled: February 6, 2013Publication date: May 29, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jae Hoon CHOI, Jong Kuk HONG
-
Publication number: 20140138129Abstract: Some implementations provide a substrate that includes a first dielectric layer, a second dielectric layer, a core layer, and a composite conductive trace. The first and second dielectric layers have a first coefficient of thermal expansion (CTE). The core layer is between the first dielectric layer and the second dielectric layer. The composite conductive trace is between the first dielectric layer and the second dielectric layer. The composite conductive trace includes copper and another material. The composite conductive trace has a second CTE that is less than a third CTE for copper to more closely match the first CTE for the first and second dielectric layers.Type: ApplicationFiled: December 14, 2012Publication date: May 22, 2014Applicant: Qualcomm IncorporatedInventors: Layal L. Rouhana, Jomaa Houssam W., Omar J. Bchir
-
Patent number: 8728572Abstract: A device and method relating to a layer system is provided. A substrate with a multi-layer system disposed on the substrate is provided. The multi-layer system has at least one upper layer and at least one layer. A contact element is applied through cold-gas spraying in such a manner that the contact element penetrates the upper layer and contacts the lower layer. The upper layer of the multi-layer system has a scratch-resistant top-layer.Type: GrantFiled: October 16, 2008Date of Patent: May 20, 2014Assignees: Interpane Entwicklungs-und Beratungsgesellschaft mbH, GFE Fremat GmbHInventors: Harry Berek, Alexander Paul, Steffen Schmidt, Lothar Herlitze, Hansjoerg Weis, Karl Haeuser
-
Publication number: 20140116753Abstract: There are provided a wiring board in which plating layers constituting wiring patterns are formed to have uniform thicknesses, and a method of manufacturing the wiring board. The wiring board includes an insulating layer; and wiring patterns formed on the insulating layer, wherein at least one of the wiring patterns is formed by stacking two or more plating layers.Type: ApplicationFiled: January 18, 2013Publication date: May 1, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Han Ul LEE, Yong Sam LEE, Suk Hwan AHN
-
Publication number: 20140113415Abstract: Provided is a method of manufacturing a circuit board. The method includes: preparing a base substrate including a core layer and a first conductive layer that is formed on at least one surface of the core layer and includes an internal circuit pattern; forming a build-up material to cover the first conductive layer; forming in the build-up material at least one cavity through which the core layer and the first conductive layer are exposed; forming a laminated body by curing the build-up material in which the at least one cavity is formed; and forming a second conductive layer including an external circuit pattern on an outer surface of the laminated body.Type: ApplicationFiled: June 24, 2013Publication date: April 24, 2014Inventor: Sang-Min LEE
-
Patent number: 8703232Abstract: The present disclosure describes an article and a method of forming a microstructure. The method includes providing a substrate having a structured surface region comprising one or more recessed features with recessed surfaces. The structured surface region is substantially free of plateaus. The method includes disposing a fluid composition comprising a functional material and a liquid onto the structured surface region. The method includes evaporating liquid from the fluid composition. The functional material collects on the recessed surfaces such that a remainder of the structured surface region is substantially free of the functional material.Type: GrantFiled: June 25, 2009Date of Patent: April 22, 2014Assignee: 3M Innovative Properties CompanyInventors: Matthew S. Stay, Mikhail L. Pekurovsky, Cristin E. Moran, Matthew H. Frey
-
Publication number: 20140102768Abstract: A wiring board includes a first insulation layer, a first conductive pattern structure formed on the first insulation layer, a wiring structure formed on the first insulation layer and including a second insulation layer and a second conductive pattern structure on the second insulation layer, and a third insulation layer formed on the first insulation layer and the first conductive pattern structure and having first and second openings such that the first opening is exposing at least a portion of a surface of the wiring structure and the second opening is exposing at least a portion of the first conductive pattern structure. The wiring structure includes a third conductive pattern structure forming an outermost layer of the wiring structure and including a mounting pad structure which mounts a semiconductor device. The first opening is formed such that the first opening is exposing pad formation area of the mounting pad structure.Type: ApplicationFiled: October 15, 2013Publication date: April 17, 2014Applicant: IBIDEN CO., LTD.Inventors: Yoshinori SHIZUNO, Makoto Terui, Masatoshi Kunieda, Takashi Kariya
-
Publication number: 20140091892Abstract: A wiring board includes a substrate including first insulation layers, a second insulation layer on the first layers, a third insulation layer on the second layer, and a plain conductor on the third layer. The substrate has inductor forming portion in which inductor patterns are formed on the first layers and first via conductors formed in the first layers such that the first via conductors connect the inductor patterns through the first layers, the substrate has a land on the second layer and a second via conductor in the second layer such that the second via conductor connects the land and the outermost inductor pattern, the substrate has a third via conductor in the third layer such that the third via conductor connects the plain conductor and land and has the central axis passing through the center of the third via conductor inside projected region of the second via conductor.Type: ApplicationFiled: September 30, 2013Publication date: April 3, 2014Applicant: IBIDEN CO., LTD.Inventors: Ryojiro TOMINAGA, Keinosuke Ino
-
Publication number: 20140090882Abstract: One or more techniques or systems for mitigating peeling associated with a pad, such as a pad of a semiconductor, are provided herein. In some embodiments, a pad structure for mitigating peeling comprises a bond region located above a first region. In some embodiments, a first inter-layer dielectric region associated with the first region is formed in an inter-layer region under the pad. Additionally, a first inter-metal dielectric region associated with the first region is formed in an inter-metal region under the inter-layer region. In some embodiments, the first inter-metal region is formed under the first inter-layer region. In this manner, peeling associated with the pad structure is mitigated, at least because the first inter-metal dielectric region comprises dielectric material and the first inter-layer dielectric region comprises dielectric material, thus forming a dielectric-dielectric interface between the first inter-metal dielectric region and the inter-layer dielectric region.Type: ApplicationFiled: September 28, 2012Publication date: April 3, 2014Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: Szu-Ying Chen, Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Chia-Wei Liu, Chung-Chuan Tseng
-
Publication number: 20140085550Abstract: A manufacturing method for forming a touch device is disclosed. A substrate having a viewing region is provided. A plurality of first sensing electrodes are spaced apart from each other on the substrate corresponding to the viewing region. An insulating layer is formed on the plurality of first sensing electrodes. A plurality of second sensing electrodes are transfer-printed onto the insulating layer, wherein the plurality of second sensing electrodes are spaced apart from each other, and wherein the plurality of first sensing electrodes are in a staggered arrangement with the plurality of second sensing electrodes and insulated from the plurality of second sensing electrodes by the insulating layer. A touch device is also disclosed.Type: ApplicationFiled: September 24, 2013Publication date: March 27, 2014Applicant: TPK Touch Systems (Xiamen) Inc.Inventors: Heng-Yao Chang, Chen-Hsin Chang, Mengh-Sueh Wu, Che-L Wu, Lixian Chen
-
Publication number: 20140085840Abstract: Provided is an electronic circuit including a substrate having a flat device region and a curved interconnection region. A conduction line may extend along an uneven portion in the interconnection region and may be curved. The uneven portion and the conductive line may have a wavy shape. An external force applied to the electronic circuit may be absorbed by the uneven portion and the conductive line. The electronic device may not be affected by the external force. Therefore, functions of the electronic circuit may be maintained. A method of fabricating an electronic circuit according to the present invention may easily adjust areas and positions of the interconnection region and the device region.Type: ApplicationFiled: February 20, 2013Publication date: March 27, 2014Applicant: Electronics and Telecommunications Research InstituteInventor: Electronics and Telecommunications Research Institute
-
Publication number: 20140083747Abstract: A printed wiring board includes an outermost interlayer resin insulation layer, n outermost conductive layer formed on the outermost interlayer resin insulation layer and including multiple alignment marks, a connection wiring structure connecting the alignment marks, and a solder-resist layer formed on the outermost interlayer resin insulation layer and the outermost conductive layer. The solder-resist layer has openings exposing the alignment marks, respectively, and each of the alignment marks has an electroless plated film formed on each of the alignment marks.Type: ApplicationFiled: September 27, 2013Publication date: March 27, 2014Applicant: IBIDEN CO., Ltd.Inventors: Ryo MATSUNO, Koichi Kondo, Satoru Kose
-
Publication number: 20140078687Abstract: A device mounting board includes a metallic substrate, an oxide film formed such that the surfaces of the metallic form are oxidized, an insulating resin layer disposed on the oxide film facing one main surface of the metallic layer, and a wiring layer disposed on the insulating resin layer. The film thickness of a certain partial region of the oxide film disposed below a first semiconductor device is greater than that of the other regions surrounding the partial region of the oxide film. Conversely, the film thickness of the insulating resin layer underneath a second semiconductor device is less than that of the insulating resin layer underneath the first semiconductor device.Type: ApplicationFiled: November 25, 2013Publication date: March 20, 2014Applicant: SANYO ELECTRIC CO., LTD.Inventors: Yasuhiro KOHARA, Masayuki NAGAMATSU, Koutaro DEGUCHI
-
Publication number: 20140069574Abstract: A manufacturing method of a circuit board is provided. In the manufacturing method, an electrically insulating layer and at least one electrically insulating material are formed on a plane of a thermally conductive plate, and a metal pattern layer located on the electrically insulating layer is formed. The electrically insulating layer partially covers the plane, and the electrically insulating material covers the plane where is not covered by the electrically insulating layer. The electrically insulating material touches the thermally conductive plate. A thermal conductivity of the electrically insulating material is larger than that of the electrically insulating layer.Type: ApplicationFiled: November 12, 2013Publication date: March 13, 2014Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: TZYY JANG TSENG, CHANG MING LEE, WEN FANG LIU, CHENG PO YU
-
Publication number: 20140055688Abstract: Touch screen structures may have an on cell resistive touch sensor made up of a a polarizer film or analyzer. The polarizer film has a first high resolution grid pattern printed on it by at least one master plate and a second flexible, optically isotropic transparent substrate carrying a second high resolution pattern may also be used and assembled to the first pattern. The patterns are plated with conductive material and assembled so that the first and the second conductive patterns engage when the substrate is pressed.Type: ApplicationFiled: October 25, 2012Publication date: February 27, 2014Applicant: UNIPIXEL DISPLAYS, INC.Inventor: Robert J. Petcavich
-
Publication number: 20140048320Abstract: Disclosed herein are a printed circuit board and a method for manufacturing the same, the printed circuit board including an adhesion promoter (AP) film for enhancing adhesive strength, interposed between a circuit pattern and an insulating layer above a substrate, the AP film containing any one of a first polymer, a second polymer, and an organic compound. According to the method for manufacturing the printed circuit board, there can be provided a printed circuit board having a fine circuit pattern by using the AP film having a low roughness value and having improved adhesive strength with respect to the circuit pattern.Type: ApplicationFiled: December 7, 2012Publication date: February 20, 2014Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Yong Jin Park, Yong Gwan Ko, Hye Won Jung, Joon Sung Kim
-
Publication number: 20140041923Abstract: A wiring board includes a board including a core, a conductive layer on the core, and a laminated structure over the core and conductive layer, and a stacked structure formed in the board and including a through-hole conductor through the core and a via conductor in the laminated structure. The through-hole conductor has though-hole portion through the core and land portion on the core, the laminated structure includes an insulation layer in which the via conductor is formed, the via conductor is stacked on the land portion such that the stacked structure including the through-hole and via conductors is formed through the core and the insulation layer, and the stacked structure is formed such that the through-hole portion has end connected to the land portion and the end has width set greater than width of bottom of the via conductor and smaller than width of top of the via conductor.Type: ApplicationFiled: February 28, 2013Publication date: February 13, 2014Applicant: IBIDEN CO., LTD.Inventors: Teruyoshi HISADA, Takashi Nakane
-
Publication number: 20140035168Abstract: A bonding pad for thermocompression bonding of a carrier material to a further carrier material includes a base layer and a top layer. The base layer is made of metal, is deformable, and is connected to the carrier material. The metal is nickel-based. The top layer is metallic and is connected directly to the base layer. The top layer is arranged at least on a side of the base layer which faces away from the carrier material. The top layer has a smaller layer thickness than the base layer. In at least one embodiment, the top layer has a greater oxidation resistance than the base layer.Type: ApplicationFiled: July 30, 2013Publication date: February 6, 2014Applicant: Robert Bosch GmbHInventors: Christoph Schelling, David Borowsky
-
Publication number: 20140027160Abstract: There is provided a printed circuit board including: a core substrate; a solder mask selectively covering one surface of the core substrate; an open region of the solder mask including a portion of a surface of the core substrate and partitioned by the solder mask; a ball land formed on the open region of the solder mask; and a barrier formed between the ball land and the solder mask.Type: ApplicationFiled: September 14, 2012Publication date: January 30, 2014Inventors: Seok Yoon HONG, Kyung In Kang
-
Publication number: 20140020937Abstract: Fabrics with a multi-layered circuit of high reliability and a manufacturing method thereof are provided. The fabrics with the multi-layered circuit include: a base layer; a first conductive pattern which is formed on the base layer; a second conductive pattern which is formed to intersect with the first conductive pattern at least in part; and an insulating pattern which is formed on an intersection portion which is a region where the first conductive pattern and the second conductive pattern intersect.Type: ApplicationFiled: June 14, 2013Publication date: January 23, 2014Inventors: Young Hwan KIM, Hyuck Ki HONG, Dong Sun KIM, Tae Ho HWANG, Jae Gi SON
-
Publication number: 20140021851Abstract: As a substrate for an LED module and a method for manufacturing the same, they teach a substrate for an LED module and a method for manufacturing the same which including a base substrate, an insulating layer formed on a remaining region except a chip mounting region A in the base substrate, an electrode layer formed on the insulating layer, an oxide layer formed on the chip mounting region A of the base substrate and a high reflection layer formed on a top surface of the oxide layer.Type: ApplicationFiled: July 17, 2013Publication date: January 23, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Cheol Ho HEO
-
Publication number: 20140017397Abstract: A method of manufacturing a printed circuit board includes arranging a core layer in which a bending prevention portion of at least two layers that are metal layers having different thermal expansion coefficients is disposed between a plurality of insulating members; forming a circuit pattern so as to have a desired pattern on at least one of the inside of the core layer and an outer face of the core layer; and forming an insulating layer including an opening portion that exposes the circuit pattern on the core layer.Type: ApplicationFiled: September 18, 2013Publication date: January 16, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Mi Sun HWANG, Jae Joon Lee, Myung Sam Kang
-
Patent number: 8628818Abstract: A system and method for forming conductive lines on a substrate comprising depositing a precursor onto at least a portion of the substrate, depositing a thin layer of conductive material over the precursor, forming a negative-patterned mask over a portion of the thin layer of conductive material to form an exposed pattern, forming conductive lines in the exposed pattern, removing the patterned mask thereby uncovering an exposed portion of the conductive layer that substantially corresponds to the negative pattern portion, and removing the exposed portion of the conductive layer so as to uncover substrate that substantially corresponds to the exposed portion.Type: GrantFiled: June 19, 2008Date of Patent: January 14, 2014Assignee: SRI InternationalInventors: Sunity K. Sharma, Francesco Fornasiero, Jaspreet Singh Dhau
-
Patent number: 8623450Abstract: For a method for producing a flexible circuit configuration in the form of a layer sequence of at least one insulating layer and at least one conductive layer, typically multiple insulating layers (N1, N2, N3, NF) and multiple structured conductive layers (L1, L2), the layer sequence for the flexible circuit configuration is deposited on a rigid substrate so that the adhesion of the layer sequence with respect to the substrate is less in an inner area, in which at least one, preferably multiple flexible circuit configurations are created, than in an edge area (RB) which surrounds the inner area (ZB). An intermediate layer can advantageously be deposited for this purpose in the edge area, which causes a stronger adhesion of the layer sequence over the edge area than the inner area, which is not provided with an intermediate layer.Type: GrantFiled: October 1, 2010Date of Patent: January 7, 2014Assignee: Cicor Management AGInventors: Ernst Feurer, Bruno Holl, Alexander Kaiser, Karin Ruess
-
Patent number: 8623449Abstract: A method for producing a laminated base material includes applying a liquid composition containing a solvent and a liquid crystal polyester to a substrate; and forming a covering material by removing the solvent. The substrate includes a conductor forming a circuit pattern on an insulating layer. The liquid composition covers the conductor. The polyester includes 30-50 mol % of (1), 25-35 mol % of (2), and 25-35 mol % of (3): -0-Ar1-00-??(1) —CO—Ar2-00-??(2) —X—Ar3—Y—??(3) wherein Ar1 is a phenylene or naphthylene group, Ar2 is a phenylene or naphthylene group, or (4), Ar3 is a phenylene group or (4), and X and Y each independently represent 0 or NH; and hydrogen atoms in Ar1, Ar2, or Ar3 are each substitutable with a halogen atom, or an alkyl or aryl group; —Ar11—Z—Ar12—??(4) wherein Ar11 and Ar12 each independently represent a phenylene or naphthylene group and Z represents 0, CO, or SO2.Type: GrantFiled: June 24, 2011Date of Patent: January 7, 2014Assignee: Sumitomo Chemical Company, LimitedInventors: Toyonari Ito, Changbo Shim
-
Patent number: 8609201Abstract: An infrared energy oxidizing and/or curing process includes an infrared oxidation zone having an infrared energy source operable to emit infrared energy that oxidizes a conductive thin film deposited or established on a glass substrate to establish a light transmissive or transparent conductive thin film for manufacturing of a touch panel. Optionally, the infrared energy curing process provides an in-line infrared energy curing process that oxidizes the conductive thin film on the glass substrate as the glass substrate is moved past the infrared energy source. Optionally, the infrared energy curing process bonds a thick film silver frit electrode pattern to the conductively coated glass substrate. Optionally, the infrared energy curing process reduces the transparent conductive thin film.Type: GrantFiled: July 2, 2008Date of Patent: December 17, 2013Assignee: TPK Touch Solutions Inc.Inventor: Catherine A. Getz
-
Publication number: 20130308290Abstract: A touch panel with a single plate includes a plate and a sensing circuit structure. The substrate is taken as a cover. The sensing circuit structure is formed on the plate.Type: ApplicationFiled: May 16, 2013Publication date: November 21, 2013Applicant: Wistron CorporationInventor: Kuei-Ching Wang
-
Publication number: 20130299221Abstract: There is provided a space transformer for a probe card, including: a substrate having a first surface and a second; a plurality of first pads formed on the first surface to be spaced apart from each other and connected to a printed circuit board of a probe card; a plurality of second pads formed on the second surface in positions corresponding to those of the first pads and receiving external electrical signals applied thereto; a plurality of via electrodes penetrating through the substrate and respectively connected to the plurality of first pads and the plurality of second pads formed in the positions corresponding to each other; a ground layer formed to cover the second surface and provided with a plurality of second pad exposure holes; and an insulating layer formed to cover the ground layer and the plurality of second pads.Type: ApplicationFiled: October 4, 2012Publication date: November 14, 2013Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Kwang Jae OH, Yoon Hyuck CHOI, Bong Gyun KIM, Joo Yong KIM
-
Patent number: 8580331Abstract: Electrographic printing of one or more multi-channeled layers produces a specialty item. Such electrographic printing includes forming a desired print image, electrographically, on a receiver member utilizing predetermined sized marking particles; and, where desired, forming one or more final multi-channeled layers utilizing marking particles of a predetermined size or size distribution.Type: GrantFiled: September 30, 2009Date of Patent: November 12, 2013Assignee: Eastman Kodak CompanyInventors: Donna P. Suchy, Diane M. Herrick
-
Publication number: 20130293336Abstract: This disclosure provides implementations of inductors, transformers, and related processes. In one aspect, a device includes a substrate having first and second surfaces. A first inducting arrangement includes a first set of vias, a second set of vias, a first set of traces arranged over the first surface connecting the first and second vias, and a second set of traces arranged over the second surface connecting the first and second vias. A second inducting arrangement is inductively-coupled and interleaved with the first inducting arrangement and includes a third set of vias, a fourth set of vias, a third set of traces arranged over the first surface connecting the third and fourth vias, and a fourth set of traces arranged over the second surface connecting the third and fourth vias. One or more sets of dielectric layers insulate portions of the traces from one another.Type: ApplicationFiled: May 3, 2012Publication date: November 7, 2013Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.Inventors: Chi Shun Lo, Jonghae Kim, Chengjie Zuo, Changhan Hobie Yun
-
Patent number: 8574663Abstract: The present invention is a method for fabricating an electrode pair precursor which comprises the steps of creating on one surface of a substrate one or more indents of a depth less than approximately 10 nm and a width less than approximately 1 ?m; depositing a layer of material on the top of this structured substrate to forming a first electrode precursor; depositing another layer the first electrode precursor to form a second electrode precursor; and finally forming a third layer on top of the second electrode precursor.Type: GrantFiled: November 17, 2005Date of Patent: November 5, 2013Assignee: Borealis Technical LimitedInventors: Avto Tavkhelidze, Misha Vepkhvadze
-
Publication number: 20130286609Abstract: Systems and methods for shielding circuitry from interference with conformal coating are disclosed. Systems having conformal EMI shields according to embodiments are provided by applying insulating and conductive layers to areas of a printed circuit board (PCB). This produces systems that may be thinner and also smaller in surface area, and that may be suitable as part of electronic devices.Type: ApplicationFiled: April 30, 2012Publication date: October 31, 2013Applicant: APPLE INC.Inventor: Nicholas Merz
-
Publication number: 20130277100Abstract: Disclosed herein are a touch panel and a method of manufacturing the same. The touch panel includes a transparent substrate, an insulating layer that is formed on the transparent substrate and has an intaglio portion formed thereon, an electrode layer that is embedded in the intaglio portion, and a light absorbing layer that is formed in an inner wall of the intaglio portion to be interposed between the inner wall of the intaglio portion and the electrode layer. In the touch panel, the electrode layer is formed to be embedded, and the light absorbing layer is further included, thereby durability and visibility of the touch panel.Type: ApplicationFiled: June 25, 2012Publication date: October 24, 2013Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seung Hyun Ra, Jin Uk Lee
-
Publication number: 20130271252Abstract: A wiring substrate includes a first insulating layer, a first magnetic layer that is a first plating film formed on the first insulating layer, a flat coil formed on the first magnetic layer, and a second magnetic layer that is a second plating film formed on the flat coil.Type: ApplicationFiled: April 5, 2013Publication date: October 17, 2013Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Tomoharu FUJII
-
Publication number: 20130271408Abstract: The present &closure provides a touch screen, wherein the touch screen includes: a protecting cover comprising a touch area and a border area surrounding the touch area; a black mask layer farmed on the border area; and a conductive assembly formed in the touch area, Wherein the conductive assembly is isolated from the black mask layer. By using the touch screen provided in the present disclosure, the problem of easy breaking of the conductive assembly Which leads to functional failure of a touch screen in the conventional technology can be solved. In addition, the present disclosure also provides a manufacturing method of the foregoing touch screen.Type: ApplicationFiled: April 17, 2013Publication date: October 17, 2013Applicant: TPK Touch Solutions (Xiamen) Inc.Inventors: Yanjun Xie, Yau-Chen Jiang, Bin Lai
-
Publication number: 20130256023Abstract: Disclosed herein is a printed circuit board, including: a base substrate having an outer layer circuit; an insulating layer formed partially on the base substrate; and a circuit layer formed on the insulating layer.Type: ApplicationFiled: March 29, 2013Publication date: October 3, 2013Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: SAMSUNG ELECTRO-MECHANICS CO., LTD.
-
Publication number: 20130257519Abstract: A touch panel and fabricating method thereof are provided. The touch panel includes a substrate, a touch-sensing circuit, and fan-out traces. The substrate has a touch-sensing region and an adjoined peripheral region. The touch-sensing circuit is disposed on the touch-sensing region. The fan-out traces are disposed on the peripheral region and electrically connected to the touch-sensing circuit. Each fan-out trace includes a first conductive line, a first dielectric layer and a second conductive line. The first conductive line is disposed on the peripheral region. The first dielectric layer is disposed on the peripheral region to cover the first conductive line, and has at least one contact window located above the first conductive line. The second conductive line is disposed on the first dielectric layer, wherein the first and the second conductive line of the same fan-out trace have the same pattern and are electrically connected through the contact window.Type: ApplicationFiled: August 6, 2012Publication date: October 3, 2013Applicant: AU OPTRONICS CORPORATIONInventors: Wen-Chi Chuang, Chia-Chun Yeh, Yu-Ching Huang
-
Publication number: 20130248226Abstract: A printed electrical circuit and methods for additively printing electrical circuits. Patterned layers of conductive, insulating, semi-conductive materials, and other materials are print deposited on a flexible or rigid substrate to form electrical circuits. A buffering layer is selectively deposited to cover or encapsulate these materials to comprise a comfort layer that provides a soft and comfortable interface to the skin of a wearer. The comfort layer can be selectively deposited on the same press that the conductive, insulating, semi-conductive materials, and other materials are deposited. Further, the comfort layer is selectively deposited only where it is desired and exactly where it is desired.Type: ApplicationFiled: March 14, 2013Publication date: September 26, 2013Inventors: David G. Sime, Richard Koble