Printed Circuit Patents (Class 428/901)
-
Patent number: 7214424Abstract: A heat-peelable adhesive sheet which shows small increase in the degree of contamination caused by a heat treatment for lowering an adhesive force is disclosed. The heat-peelable pressure sensitive adhesive sheet comprises a heat-expandable layer containing heat-expandable microspheres and expanding upon heating, and a non-heat expandable pressure-sensitive adhesive layer formed on at least one side thereof. The heat-peelable pressure-sensitive adhesive sheet can achieve the desired adhesive properties such as an excellent adhesive force before heating and also show a quick lowering of the adhesive force upon heating. Further, it shows small increase in the degree of contamination due to the treatment for lowering the adhesive force. Due to those characteristics, the heat-peelable pressure-sensitive adhesive sheet is practically applicable to, for example, the production of electronic parts made of thinner semiconductor wafers.Type: GrantFiled: April 17, 2002Date of Patent: May 8, 2007Assignee: Nitto Denko CorporationInventors: Kazuyuki Kiuchi, Toshiyuki Oshima, Akihisa Murata, Yukio Arimitsu
-
Patent number: 7211735Abstract: A process for manufacturing a multilayer flexible wiring board, which allows individual layers of wiring boards to be precisely positioned and to be readily stacked. A mask for exposure is prepared in which a plurality of pattern holes corresponding to individual layers of wiring boards of a multilayer flexible wiring board are arranged in the direction perpendicular to the transporting direction P of substrate. This mask for exposure is used to form a plurality of wiring patterns corresponding to individual layers of wiring boards of a multilayer flexible wiring board on the same sheet-like substrate.Type: GrantFiled: December 20, 2001Date of Patent: May 1, 2007Assignees: Sony Corporation, Sony Chemical & Information Device CorporationInventor: Yutaka Kaneda
-
Patent number: 7208062Abstract: Adhesive films which are useful for preparing laminated circuit boards may be produced by laminating a resin composition layer made of a layer A and layer B on a support base film, in which layer A is a layer of a thermosetting resin composition that has an inorganic filler content of from 0 to less than 40% by weight, has a cured surface which after roughening, allows forming a conductor layer by plating, and is solid at ambient temperature, layer B is a layer of a thermosetting resin composition that has an inorganic filler content of 40% by weight or more, and is solid at ambient temperature, layer A is laminated adjacent to the support base film, and layer B layer has a fluidity that allows the filling of a resin into a through hole and/or a via hole.Type: GrantFiled: May 20, 2004Date of Patent: April 24, 2007Assignee: Ajinomoto Co., Inc.Inventors: Shigeo Nakamura, Tadahiko Yokota
-
Patent number: 7208539Abstract: The present invention relates to a thermosetting resin composition comprising: (1) a metal salt of a disubstituted phosphinic acid, and (2) a resin having a dielectric constant of 2.9 or less at a frequency of 1 GHz or more, and a prepreg and a laminated board using the same.Type: GrantFiled: April 16, 2003Date of Patent: April 24, 2007Assignee: Hitachi Chemical Co., Ltd.Inventors: Shinji Tsuchikawa, Michitoshi Arata, Kenichi Tomioka, Kazuhito Kobayashi
-
Patent number: 7192651Abstract: A resin composition for a laminate, containing at least 10% by weight of a vinyl compound represented by the formula (1), and a prepreg and a metal-clad laminate using the resin composition.Type: GrantFiled: August 17, 2004Date of Patent: March 20, 2007Assignee: Mitsubishi Gas Chemical Company, Inc.Inventors: Daisuke Ohno, Kenji Ishii, Yasumasa Norisue, Michio Nawata, Yoshinori Kondo, Mitsuru Nozaki, Seiji Shika
-
Patent number: 7179552Abstract: Resin compositions which comprise the following components (A) to (E) are useful for interlayer insulation of a multilayer printed wiring board: (A) an epoxy resin having 2 or more epoxy group in one molecule and which exists in a liquid state at a temperature of 20° C.; (B) an aromatic epoxy resin having 3 or more epoxy groups in one molecule and an epoxy equivalent of 200 or less; (C) a phenol type curing agent; (D) one or more resins selected from the group consisting of a phenoxy resin, a polyvinyl acetal resin, a polyamide resin, a polyamideimide resin, and mixtures thereof, and having a glass transition temperature of 100° C. or more; and (E) an inorganic filler.Type: GrantFiled: May 20, 2004Date of Patent: February 20, 2007Assignee: Ajinomoto Co., Inc.Inventors: Shigeo Nakamura, Kenji Kawai
-
Patent number: 7180006Abstract: A tape substrate including an insulating film, a copper foil pattern formed on the insulating film at one side of the insulating film, and provided with a connecting area where an electronic element is to be mounted, a barrier layer plated on the copper foil pattern at the connecting area, and formed with a plurality of pores, and a tin layer plated on the barrier layer, and alloyed with a portion of the copper foil pattern corresponding to the connecting area, through the pores. A method for fabricating the tape substrate is also disclosed. In accordance with the invention, it is possible to reduce the time taken for the copper foil pattern to come into contact with the electroless tin plating solution used in the tin plating process, thereby preventing the copper component of the copper foil pattern from being eluted. Accordingly, there is no open-circuit fault caused by formation of pores.Type: GrantFiled: December 1, 2003Date of Patent: February 20, 2007Assignees: LG Electronics Inc., LG Micron Co., Ltd.Inventors: Soon Bog Kwon, Sang Hun Lee, Yang Sik Moon, Ki Pyo Hong, Yoon Kuen Cho
-
Patent number: 7179520Abstract: A circuit substrate is described where the circuit substrate has a first wiring group extending in a first direction and a second wiring group extending in a second direction substantially orthogonal to the first direction. The first wiring group of the circuit substrate is stronger than the second wiring group, and the second wiring group bends more easily than the first wiring group, which results in directional flexibility of said circuit substrate.Type: GrantFiled: December 23, 2004Date of Patent: February 20, 2007Assignee: Seiko Epson CorporationInventor: Takayuki Saeki
-
Patent number: 7172805Abstract: A method for manufacturing a mid-plane. a multi-layer board having a connection assembly is provided and a dielectric layer with a channel formed therein to define a perimeter of a connector area is provided. The dielectric layer is bonded to the multi-layer board such that the connector area overlaps the part of the connection assembly of the multi-layer board. At least a portion of the connector area in the dielectric layer is removed to expose the connection assembly of the multi-layer board. A rigid multilayer is also disclosed. The rigid multilayer includes a multi-layer board and a dielectric layer. The multi-layer board has a connection assembly. The dielectric layer has a channel formed therein to define a perimeter of a connector area. The dielectric layer is bonded to the multi-layer board such that the connector area overlaps the connection assembly of the multi-layer board. The connector area can then be removed such as by depth controlled routing.Type: GrantFiled: July 8, 2004Date of Patent: February 6, 2007Assignee: Viasytems Group, Inc.Inventors: Gerald A. J. Hermkens, Marcel Smeets, Roger Theelen, Peter J. M. Thoolen, Frank Speetjens
-
Patent number: 7169331Abstract: A conductive paste used for forming conductive sinters includes a mixture of a copper powder coated with a metal oxide and a metal oxide powder, and an organic vehicle. The content of the metal oxide used for coating the copper powder is in the range of about 0.05% by weight to about 5% by weight of the total weight of the copper powder coated with the metal oxide and the metal oxide powder, and in addition, the total content of the metal oxide used for coating the copper powder and the metal oxide powder is in the range of about 1% by weight to about 12% by weight of the total weight of the copper powder coated with the metal oxide and the metal oxide powder.Type: GrantFiled: March 15, 2004Date of Patent: January 30, 2007Assignee: Murata Manufacturing Co., LtdInventors: Ryoji Nakamura, Mitsuyoshi Nishide
-
Patent number: 7166361Abstract: A process for producing a silicone polymer comprising a step of subjecting, to hydrolysis and polycondensation reaction, a silane compound mixture containing 35 to 100% by mol of a silane compound represented by the general formula (I): R?m(H)kSiX4?(m+k)??(I) (wherein X is a hydrolysable and polycondensable group, e.g., a halogen atom (e.g., chlorine or bromine) or —OR; R is an alkyl group of 1 to 4 carbon atoms or an alkyl carbonyl group of 1 to 4 carbon atoms; R? is a non-reactive group, e.g., an alkyl group of 1 to 4 carbon atoms or an aryl group (e.g., a phenyl group); “k” is 1 or 2; “m” is 0 or 1; and “m+k” is 1 or 2), and further subjecting the resultant product to hydrosilylation reaction with a hydrosilylation agent.Type: GrantFiled: March 29, 2001Date of Patent: January 23, 2007Assignee: Hitachi Chemical Co., Ltd.Inventors: Hideo Baba, Nozomu Takano, Kazuhiro Miyauchi
-
Patent number: 7160609Abstract: A curable composition comprises an insulating resin and a halogen-free flame retardant. The halogen-free flame retardant has a particulate form, and whose primary particles have an average major axis from 0.01 to 5 ?m, an aspect ratio of 5 or less, and the proportion of a major axis of more than 10 ?m being at most 10% by number. A varnish comprises an insulating resin, a curing agent, a flame retardant and an organic solvent. The flame retardant is a flame retardant in particulate form surface-treated with a coupling agent, and the flame retardant particles present in the varnish have a secondary particle diameter of 30 ?m or less.Type: GrantFiled: October 15, 2001Date of Patent: January 9, 2007Assignee: Zeon CorporationInventors: Yasuhiro Wakizaka, Toshiyasu Matsui, Daisuke Uchida, Koichi Ikeda
-
Patent number: 7157134Abstract: The invention concerns a layered structure comprising at least two material layers. The layered structure is formed of a conductive polymer on a substrate material layer to allow a reaction in the conductive polymer material when the layered structure is exposed to the surrounding conditions. The invention also concerns a method for producing layered structure. In the method the conductive polymer material is applied on the substrate material by printing or spraying or stamping or casting or spin coating or by using photolithographic or laser ablation method or a combination of these. The invention further concerns a sensor comprising an electric device short circuited by the conductive polymer of the layered structure. In the sensor a change in the conductive polymer initiates a change in the function of the electric device.Type: GrantFiled: January 21, 2002Date of Patent: January 2, 2007Assignee: Metso CorporationInventors: Tapio Makela, Salme Jussila, Mikko Pietila, Raimo Korhonen
-
Patent number: 7140101Abstract: A method for fabricating an anisotropic conductive substrate is disclosed. A back holder has metal pins on a surface thereof. A liquid compound is formed on the surface of the back holder with metal pins. The liquid compound is pressed to deform the metal pins into electrodes in the liquid compound. The thickness between upper surface and lower surface of the liquid compound is between 25 ?m and 250 ?m. The electrodes have upper ends and lower ends exposed from upper surface and lower surface of the liquid compound to provide electrical contact of anisotropic conduction.Type: GrantFiled: September 29, 2003Date of Patent: November 28, 2006Assignees: ChipMOS Technologies (Bermuda) Ltd., ChipMOS Technologies Inc.Inventors: Shih-Jye Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Yao-Jung Lee
-
Patent number: 7138171Abstract: The invention discloses an identifiable flexible printed circuit board (PCB) and a method of fabricating the same. The identifiable flexible PCB includes a flexible substrate, a conductive layer, and a printing ink layer. First, the conductive layer is formed over a surface of the flexible substrate. Second, the printing ink layer is formed on the surface of the flexible substrate by coating, exposing, and developing to uncover parts of the conductive layer. Also, at least one identifiable area is formed on the printing ink layer and one can easily and correctly identify the cartridge with the flexible PCB.Type: GrantFiled: September 25, 2002Date of Patent: November 21, 2006Assignee: Benq CorporationInventors: Chih-Ching Chen, Yi-Jing Leu
-
Patent number: 7132126Abstract: A simple chemical technique has been developed to grow large quantity of carbon nanostructures, including carbon nanotubes, hydrocarbon nanotubes and carbon nanoonions, in the organic solution at ambient (room) temperature and atmospheric pressure using silicon nanostructures (nanowires, nanodots, ribbons, and porous silicon) as starting materials. These CNT and CNO have the lattice d-spacing from 3.4 ? to 5 ?.Type: GrantFiled: October 17, 2002Date of Patent: November 7, 2006Assignee: City University of Hong KongInventors: Shuit-Tong Lee, Chi-Pui Li, Xu-Hui Sun, Ning-Bew Wong, Chun-Sing Lee, Boon-Keng Teo
-
Patent number: 7118798Abstract: The present invention provides the following three laminates: First, a polyimide-metal laminate which is obtainable by applying to one side of a metal foil a silane-modified polyimide resin composition (A) comprising alkoxy-containing silane-modified polyimide (a) and a polar solvent (b), drying and curing the composition; Second, a polyamideimide-metal laminate which is obtainable by applying to one side of a metal foil a silane-modified polyamideimide resin composition (C-1) comprising methoxy-containing silane-modified polyamideimide (d), a polar solvent (b) and an inorganic filler (c), drying and curing the composition; and third, a polyimide-metal laminate in which the cured film of the above composition (A) has a metal plated layer thereon.Type: GrantFiled: October 31, 2002Date of Patent: October 10, 2006Assignee: Arakawa Chemical Industries, Ltd.Inventors: Hideki Goda, Takayuki Fujiwara, Takeshi Takeuchi
-
Patent number: 7105221Abstract: The present invention relates to a circuit board including a flexible film provided with an extremely fine circuit pattern, a laminated member for a circuit board, and a method for making a laminated member for a circuit board with excellent productivity. A circuit board of the present invention includes a flexible film and a circuit pattern composed of a metal provided on the flexible film, and dimensional change rate of the circuit pattern is within ±0.01%. A laminated member for a circuit board of the present invention includes a reinforcing plate, a self-stick, removable organic layer, a flexible film, and a circuit pattern composed of a metal laminated in that order.Type: GrantFiled: July 17, 2002Date of Patent: September 12, 2006Assignee: Toray Industries, Inc.Inventors: Takayoshi Akamatsu, Futoshi Okuyama, Nobuyuki Kuroki, Hiroshi Enomoto, Tetsuya Hayashi, Yoshio Matsuda, Yoichi Shinba, Masahiro Oguni
-
Patent number: 7101591Abstract: This invention provides a process for producing an organic polymer film whereby when using it as an interlayer insulating film in a semiconductor device, the film exhibits higher adhesiveness at its interfaces where other semiconductor materials are in contact with the lower and the upper surface of the film while an effective dielectric constant in the whole organic polymer film can be further reduced. Specifically, a plurality of organic monomers vaporized is sprayed onto a heated substrate surface via plasma generated in a reaction chamber to form a copolymer film comprising frame composed of a plurality of organic monomer units.Type: GrantFiled: July 1, 2002Date of Patent: September 5, 2006Assignee: NEC CorporationInventors: Yoshihiro Hayashi, Jun Kawahara
-
Patent number: 7097915Abstract: A separator plate for the production of printed circuit board components by pressing individual layers, which separator plate includes a metallic core layer and a coating on at least one side of the core layer, wherein the coating on the core layer, which is made of a comparatively well heat-conductive metal, is comprised of an outer metal layer applied to the core layer by cold-plating and made of a metal having a comparatively high surface hardness.Type: GrantFiled: July 25, 2003Date of Patent: August 29, 2006Assignee: C2C Technologie fur Leiterplatten GmbHInventor: Ernst D Backhau
-
Patent number: 7081304Abstract: The present invention aims to provide a surface-conductive resin suitable for wiring boards, and the like, a process for forming the resin efficiently, and a wiring board using the surface-conductive resin. The surface-conductive resin according to the present invention is formed by selectively generating reactive groups capable of substitution under alkaline conditions on the resin surface, bringing the reactive groups into contact with an alkaline solution so that part of the reactive groups are substituted by alkali metal ions, bringing the substituted parts by the alkali metal ions into contact with ions of a conductive material so that the alkali metal ions are substituted by ions of the conductive material, and reducing the ions of the conductive material so that the conductive material deposits on the resin surface.Type: GrantFiled: January 27, 2003Date of Patent: July 25, 2006Assignee: Fujitsu LimitedInventor: Kanae Nakagawa
-
Patent number: 7074493Abstract: New polynuclear aromatic diamines, such as 2,2?-di-(p-aminophenoxy)-biphenyl, a process for their manufacture and their use as polycondensation components for the manufacture of polyamide, polyamide-imide and polyimide polymers are described. The polymers obtained with the aromatic diamines according to the invention are readily soluble and can also be processed from the melt and are distinguished by good thermal, electrical and/or mechanical properties.Type: GrantFiled: January 28, 2000Date of Patent: July 11, 2006Assignee: The University of AkronInventors: Frank W. Harris, Stephen Z. D. Cheng
-
Patent number: 7070909Abstract: The glass transmittance of UV light having a wavelength of 365 nanometers is reduced by compounding an oxide or salt of at least one of Fe, Cu, Cr, Ce, Mn and mixtures thereof. The fiberglass cloth can be used for providing reinforced prepregs used in producing printed circuit boards or laminated chip carrier substrates.Type: GrantFiled: August 30, 2004Date of Patent: July 4, 2006Assignee: International Business Machines CorporationInventors: Robert M. Japp, Pamela Lulkoski, Jeffrey McKeveny, Jan Obrzut, Kenneth Lynn Potter
-
Patent number: 7070851Abstract: Apparatuses and methods for forming displays are claimed. One embodiment of the invention relates to depositing a plurality of blocks onto a substrate and is coupled to a flexible layer having interconnect deposited thereon. Another embodiment of the invention relates to forming a display along a length of a flexible layer wherein a slurry containing a plurality of elements with circuit elements thereon washes over the flexible layer and slides into recessed regions or holes found in the flexible layer. Interconnect is then deposited thereon. In another embodiment, interconnect is placed on the flexible layer followed by a slurry containing a plurality of elements.Type: GrantFiled: June 21, 2002Date of Patent: July 4, 2006Assignee: Alien Technology CorporationInventors: Jeffrey Jay Jacobsen, Glenn Wilhelm Gengel, Mark A. Hadley, Gordon S. W. Craig, John Stephen Smith
-
Patent number: 7068500Abstract: Disclosed are ways of providing a highly flexible high availability storage system. Disk drive carriers for insertion into enclosures in a storage system include several disk drives. The enclosures accept carriers that include drives of different sizes, and drives compatible with different storage technologies, for instance Fibre Channel, SATA, or SAS. Drives oriented in their carriers in a manner that allows them to be connected to a common medium via identical flex circuits that are configured based on the orientation of the drives. Redundant controllers include redundant serial buses for transferring management information to the carriers. The carriers include a controller for monitoring the multiple serial buses and producing storage technology specific management commands for the disk drives.Type: GrantFiled: March 29, 2003Date of Patent: June 27, 2006Assignee: EMC CorporationInventors: Albert F. Beinor, Jr., Ralph C. Frangioso, Jr., Mickey Steven Felton, Joseph P. King, Jr., Michael J. Kozel, W. Brian Cunningham, Maida Boudreau
-
Patent number: 7056571Abstract: There is provided a wiring board including an insulation substrate and a wiring layer which is located on at least one main surface of the insulation substrate, wherein the insulation substrate comprises a woven fabric which is made of yarns and an organic resin with which the woven fabric is impregnated, and at least one wiring of wirings which form the wiring layer extends over the woven fabric except for top portions of the yarns.Type: GrantFiled: December 19, 2003Date of Patent: June 6, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Satoru Tomekawa, Tetsuyoshi Ogura, Hiroyoshi Tagi
-
Patent number: 7049253Abstract: The present invention is (1) a glass cloth composed of a group of warp yarns and a group of weft yarns wherein one of the group of the warp and weft yarns are arranged with substantially no gap between the yarns, and, in that group, a width A (?m) of a cross-section of the yarn arranged with substantially no gap, a single-fiber diameter L (?m) of the yarn, the number N of single-fibers constituting the yarn and a weaving density C (ends/25 mm) of the glass cloth composed of the yarns satisfy the following equation (1-a): C×A/(25×L×N)?1.Type: GrantFiled: February 4, 2000Date of Patent: May 23, 2006Assignee: Asahi-Schwebel Co., Ltd.Inventors: Yasuyuki Kimura, Yoshinori Gondoh, Yoshinobu Fujimura
-
Patent number: 7047628Abstract: A printed wiring board having differential pair signal traces has increased spacing between signal-carrying vias and ground or power planes and/or is equipped with selectively placed ground vias to enhance the impedance matching of the signal traces.Type: GrantFiled: January 31, 2003Date of Patent: May 23, 2006Assignee: Brocade Communications Systems, Inc.Inventor: Michael K. T. Lee
-
Patent number: 7041399Abstract: Disclosed are a varnish for laminate or prepreg, comprising a heat treatment product which is obtained by mixing together (a) an epoxy resin, (b) dicyandiamide, and (c) a compound having an imidazole ring so that the component (c) is present in an amount of 0.001 to 0.03% by weight, based on the weight of the component (a), and subjecting the resultant mixture to reaction for heat treatment in an organic solvent at a temperature of 70° C. to less than 140° C. so that all of the components are compatible with one another in the absence of a solvent; and (d) inorganic filler, a laminate or prepreg prepared using the varnish and a printed wiring board prepared using the laminate and/or prepreg.Type: GrantFiled: December 12, 2001Date of Patent: May 9, 2006Assignee: Hitachi Chemical Co., Ltd.Inventors: Yasuyuki Hirai, Norihiro Abe, Yoshiyuki Takeda
-
Patent number: 7041357Abstract: Apparatus and methods are presented for reinforcing and stiffening a printed circuit board (PCB) in selected locations by utilizing preferentially oriented fibers. Selected fibers within the polymeric material matrix of the PCB fiber-matrix layer are removed and replaced with a similar quantity of fibers in a preferential orientation. Various combinations of layering of modified fiber-matrix layer material with conventional fiber-matrix layer material are presented to achieve the desired PCB stiffening. Printed circuit boards, under the weight of heavy attached electronic components, may deflect or flex along an axis, defined as the characteristic fold. This flexing is exasperated with manufacturing and handling loading, particularly when mounted in a chassis. Preferentially orientated fibers laid transverse to the characteristic fold reinforces the area to resist flexure within the area surrounding the characteristic fold.Type: GrantFiled: December 17, 2003Date of Patent: May 9, 2006Assignee: Intel CorporationInventors: George Hsieh, Terrance J. Dishongh, Scott Dixon
-
Patent number: 7037586Abstract: The present invention relates to a film for a circuit board characterized in that the following A layer is adjacent to the following B layer is disclosed in the present application. A circuit board excellent in adhesion strength of a conductor layer can easily be produced by using this film. A layer: a heat-resistant resin layer with a thickness of from 2 to 250 ?m which layer is made of a heat-resistant resin having a glass transition point of 200° C. or more or a decomposition temperature of 300° C. or more, and B layer: a roughenable cured resin layer with a thickness of from 5 to 20 ?m which layer is made of a cured product of a thermosetting resin composition containing at least component (a) of an epoxy resin having two or more epoxy groups in a molecule and component (b) of an epoxy curing agent, the cured product being capable of roughening with an oxidizing agent.Type: GrantFiled: January 12, 2004Date of Patent: May 2, 2006Assignee: Ajinomoto Co., Inc.Inventors: Tadahiko Yokota, Shigeo Nakamura
-
Patent number: 7038142Abstract: The circuit board for mounting semiconductor elements comprises a core substrate 10 formed of a fiber reinforced metal, an insulating layer 14 formed on the core substrate 10, and an interconnection layer 20 formed on the insulating layer 14, whereby the circuit board for mounting semiconductor elements can have a thermal expansion coefficient approximate to that of silicon, and light and thin but has high rigidity.Type: GrantFiled: January 13, 2003Date of Patent: May 2, 2006Assignee: Fujitsu LimitedInventor: Tomoyuki Abe
-
Patent number: 7033525Abstract: The present invention describes compositions formed from polyanaline and carbon nanotubes, which exhibit enhanced conductivity and which provide uses in electronic circuit applications.Type: GrantFiled: February 12, 2002Date of Patent: April 25, 2006Assignee: E.I. duPont de Nemours and CompanyInventor: Graciela Beatriz Blanchet-Fincher
-
Patent number: 7033667Abstract: Methods of creating fine featured circuits by printing a circuit trace onto polymer shrink films or other biaxially-oriented polymer films are disclosed. The shrink films are heated and shrunk after printing, annealing the circuit trace to form conductive features. Compositions suitable for printing onto the films and articles made using the method and composition are also disclosed.Type: GrantFiled: December 18, 2003Date of Patent: April 25, 2006Assignee: 3M Innovative Properties CompanyInventors: Jessica L. Voss-Kehl, Kurt J. Halverson, Caroline M. Ylitalo, Matthew R. Lehmann, Steven J. Botzet
-
Patent number: 7031166Abstract: A silicon nitride sintered body comprising Mg and at least one rare earth element selected from the group consisting of La, Y, Gd and Yb, the total oxide-converted content of the above elements being 0.6–7 weight %, with Mg converted to MgO and rare earth elements converted to rare earth oxides RExOy. The silicon nitride sintered body is produced by mixing 1–50 parts by weight of a first silicon nitride powder having a ?-particle ratio of 30–100%, an oxygen content of 0.5 weight % or less, an average particle size of 0.2–10 ?m, and an aspect ratio of 10 or less, with 99–50 parts by weight of ?-silicon nitride powder having an average particle size of 0.2–4 ?m; and sintering the resultant mixture at a temperature of 1,800° C. or higher and pressure of 5 atm or more in a nitrogen atmosphere.Type: GrantFiled: November 30, 2004Date of Patent: April 18, 2006Assignee: Hitachi Metals, Ltd.Inventors: Hisayuki Imamura, Shigeyuki Hamayoshi, Tsunehiro Kawata, Masahisa Sobue
-
Patent number: 7022399Abstract: The present invention provides a semiconductor device integrated multilayer wiring board with a high degree of heat resistance, which is capable of low temperature fusion without the occurrence of resin flow, enables high precision, finely detailed conductive wiring, thereby enabling the production of high density, ultra small three dimensional mounting modules and the like, can also be ideally applied to low volume high mix manufacturing configurations, and has little impact on the environment, and also provides a method of manufacturing such a semiconductor device integrated multilayer wiring board. In the semiconductor device integrated multilayer wiring board, a wiring substrate is formed by embedding conductive wiring within an insulating substrate, formed from a thermoplastic resin composition comprising a polyarylketone resin with a crystalline melting peak temperature of at least 260° C.Type: GrantFiled: February 3, 2003Date of Patent: April 4, 2006Assignees: Sony Corporation, Mitsubishi Plastics, Inc.Inventors: Minoru Ogawa, Masahiro Izumi, Shigeyasu Itoh, Shingetsu Yamada, Shuuji Suzuki, Hiroo Kurosaki
-
Patent number: 7023084Abstract: The present invention provides a high heat dissipation plastic package and a method for making the same that provides an inexpensive, thin high heat dissipation plastic package with good bonding precision and minimal bleeding of adhesive resin. A Cu foil resin film is formed by bonding an adhesive resin to a Cu foil and pre-forming, at an essentially central position, a cut-out for a cavity used to mount a semiconductor element. The Cu foil resin film is bonded using the adhesive resin directly to a heat dissipation plate. A conductor wiring pattern is formed on the Cu foil resin film. Furthermore, the heat dissipation plate includes a stopping section used to prevent resin from bleeding onto a cavity when bonding with the adhesive resin of the Cu foil resin film.Type: GrantFiled: December 23, 2003Date of Patent: April 4, 2006Assignee: Sumitomo Metal (SMI) Electronics Devices Inc.Inventors: Shigehisa Tomabechi, Akihiro Hamano
-
Patent number: 7018705Abstract: It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.Type: GrantFiled: May 10, 2004Date of Patent: March 28, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuhiro Nakatani, Hideki Higashitani, Tadashi Nakamura, Fumio Echigo
-
Patent number: 7005179Abstract: A system of metalization in an integrated polymer microsystem. A flexible polymer substrate is provided and conductive ink is applied to the substrate. In one embodiment the flexible polymer substrate is silicone. In another embodiment the flexible polymer substrate comprises poly(dimethylsiloxane).Type: GrantFiled: February 20, 2003Date of Patent: February 28, 2006Assignee: The Regents of the University of CaliforniaInventors: James Courtney Davidson, Peter A. Krulevitch, Mariam N. Maghribi, William J. Benett, Julie K. Hamilton, Armando R. Tovar
-
Patent number: 6994897Abstract: A mechanism and a method for framing a low-distortion flexible dielectric substrate during subsequent flex circuit processing. The processing method comprising the following steps: making a flexible dielectric substrate having an outer periphery; joining a continuous portion of the flexible dielectric substrate near the outer periphery to a rigid open frame, the flexible dielectric substrate being in a state other than a state of substantially uniform tension as a result of the joinder; causing the joined flexible dielectric substrate to undergo a change to the state of substantially uniform tension; and printing an electrical conductor on the flexible dielectric substrate while the flexible dielectric substrate is joined to the frame and in the state of substantially uniform tension. The frame is in the shape of a polygon (e.g., a rectangle) with rounded vertices.Type: GrantFiled: November 15, 2002Date of Patent: February 7, 2006Assignee: General Electric CompanyInventors: Kevin Matthew Durocher, Christopher James Kapusta, Mehmet Arik, Richard Joseph Saia, Piet Moeleker
-
Patent number: 6986937Abstract: The present invention relates to a double-sided copper-clad laminate for forming a capacitor layer, formed by adhering electrodeposited copper foils on the both sides of a dielectric layer of a thickness of 10 ?m or less, and the object of the present invention is to secure good voltage resistant proprieties. For the double-sided copper-clad laminate of the present invention uses an electrodeposited copper foil provided with a matte side to be joined to the dielectric layer prepared by physically polishing the rough surface of an untreated electrodeposited copper foil obtained by an electrolysis method to a surface roughness (Rz) of 0.5 ?m to 3.0 ?m, and nodular treatment, and as required, passivation, silane coupling agent treatment, or the like are performed thereon. As the manufacturing method thereof, a manufacturing method wherein the surfaces of the resin layers of two electrodeposited copper foils having resin layers facing to each other are adhered, or the like.Type: GrantFiled: February 17, 2004Date of Patent: January 17, 2006Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Kazuhiro Yamazaki, Takashi Syoujiguchi
-
Patent number: 6974615Abstract: To easily connect a coaxial cable to electric connecting devices or a printed circuit board, to prevent the conductors of the cable from being disturbed, to secure the shielding performance of the signal line, and to enable connection of a very fine wire by means of an automatic machine, a binding member for a coaxial cable is formed into a tubular piece that is arranged to cover the outer conductor or the centered conductor which is exposed from the insulating covering of the cable. This binding member is made of a lead-free ultrahigh-conductive plastic resin composite. An electric connector for a coaxial cable has electric contacts, which each have a receiving port into which the binding member is inserted.Type: GrantFiled: April 1, 2002Date of Patent: December 13, 2005Assignee: J.S.T. Mfg. Co., Ltd.Inventors: Taiji Hosaka, Masaaki Miyazawa
-
Patent number: 6964813Abstract: An ultraviolet curable resin composition is provided, which is excellent in developing width and resolution, and exhibits good solder heat resistance and resistance to gold plating.Type: GrantFiled: December 6, 2001Date of Patent: November 15, 2005Assignee: Goo Chemical Co., Ltd.Inventor: Soichi Hashimoto
-
Patent number: 6960636Abstract: In accordance with the present invention, there are provided novel thermosetting resin compositions which do not require solvent to provide a system having suitable viscosity for convenient handling. Invention compositions have the benefit of undergoing rapid cure. The resulting thermosets are stable to elevated temperatures, are highly flexible, have low moisture uptake and are consequently useful in a variety of applications, e.g., in adhesive applications since they display good adhesion to both the substrate and the device attached thereto.Type: GrantFiled: January 13, 2003Date of Patent: November 1, 2005Assignee: Henkel CorporationInventors: Stephen M. Dershem, Puwei Liu
-
Patent number: 6956098Abstract: The substrates of the present invention comprise a polyimide base polymer derived at least in part from collinear monomers together with crankshaft monomers. The resulting polyimide material has been found to provide advantageous properties, particularly for electronics type applications.Type: GrantFiled: September 20, 2002Date of Patent: October 18, 2005Assignee: E. I. du Pont de Nemours and CompanyInventors: John Donald Summers, Richard Frederich Sutton, Jr., Brian Carl Auman
-
Patent number: 6949296Abstract: The substrates of the present invention comprise a polyimide base polymer derived at least in part from non-rigid rod monomers together with optionally rigid rod monomers where the substrates are cured under low tension. The resulting polyimide materials have been found to provide advantageous properties (e.g. balanced molecular orientation, good dimensional stability, and flatness) particularly useful for electronics type applications.Type: GrantFiled: April 4, 2003Date of Patent: September 27, 2005Assignee: E. I. du Pont de Nemours and CompanyInventors: Meredith L. Dunbar, James R. Edman
-
Patent number: 6946198Abstract: A solvent-free thermosetting resin composition which comprises an epoxy resin (a) and a product (b) of the reaction of an organosilicon compound, represented by the general formula (1) (where R is an organic group containing a functional group reactive with an epoxy resin by addition reaction; and R1 is a methyl or ethyl group), with water, the product (b) containing organosilicon compound polycondensates formed in the epoxy resin (a) and having a degree of polycondensation of 2 or higher, and which has a low viscosity at a room temperature (25° C.) and gives a cured resin having intact material properties, especially intact high-temperature mechanical properties; a process for producing the resin composition; and a product obtained by applying the composition.Type: GrantFiled: June 25, 2003Date of Patent: September 20, 2005Assignee: Hitachi, Ltd.Inventors: Akio Takahashi, Yuichi Satsu, Harukazu Nakai, Masao Suzuki, Yuzo Ito, Shuichi Oohara
-
Patent number: 6941648Abstract: A method for making a printed wiring board reduced in weight by reducing the size and the thickness of a substrate in its entirety. The printed wiring board includes a rigid substrate 2, comprised of a core material 11 at least one side of which carries a land 23, and flexible substrates 3, 4, 5, and 6 comprised of core materials 33, 36 on at least one surface of which a bump 32 for electrical connection to the land 38 is formed protuberantly. The rigid substrate 2 and the flexible substrates 3 to 6 are molded as one with each other, with the interposition of an adhesive in-between, so that the land and the bump face each other.Type: GrantFiled: February 12, 2003Date of Patent: September 13, 2005Assignee: Sony CorporationInventors: Kazuhiro Shimizu, Nobuo Komatsu, Soichiro Kishimoto
-
Patent number: 6929849Abstract: A method for making a fine electrically conductive grid embedded in a polymer substrate. The method includes the steps of providing a polymer substrate, forming a pattern of grooves in the substrate, filling the grooves with electrically conductive powder, and then applying heat and/or pressure to the substrate. The application of heat and/or pressure to the substrate causes the grooves to collapse inward against the conductive powder. Collapsing the grooves compacts the conductive powder within the groove, thereby establishing a continuously conductive grid line or circuit. The narrow grid lines that result allow more light to transmit through the substrate. The method allows grid lines to be made with higher aspect ratios (ratio of line depth to line width) than is possible by previous methods.Type: GrantFiled: May 21, 2003Date of Patent: August 16, 2005Assignee: 3M Innovative Properties CompanyInventors: David C. Koskenmaki, Michael N. Miller, Naiyong Jing
-
Patent number: 6929848Abstract: A sheet comprising thermoplastic polymer (TP) and short high tensile modulus fibers, in which the concentration of TP in the middle of the sheet is higher than at the surface of the sheet, useful for making prepregs with a thermoset resin.Type: GrantFiled: August 26, 2002Date of Patent: August 16, 2005Assignee: E.I. du Pont de Nemours and CompanyInventors: Michael R. Samuels, Subhotosh Khan, Mikhail R. Levit