Abstract: By taking into consideration tool-specific distortion signatures and reticle-specific placement characteristics in an alignment control system, the control quality of sophisticated APC strategies may be significantly enhanced. Respective correction data may be established on the basis of any combinations of tool/reticles and layers to be aligned to each other, which may modify the respective target values of alignment parameters used for controlling the alignment process on the basis of standard overlay measurement data obtained from dedicated overlay marks.

Abstract: A manufacturing method of a semiconductor device including a pattern forming method, a reticle correcting method, and a reticle pattern data correcting method are disclosed.

Abstract: A photomask for double exposure, and a double exposure method using the same are disclosed. The photomask for double exposure comprises a mask substrate divided into first and second regions equally arranged to upper and lower sides on different sides, respectively, a first mask pattern formed on the first region of the mask substrate, and a second mask pattern formed on the second region of the mask substrate. The photomask and the double exposure method using the same enable a finer photoresist pattern to be formed on a semiconductor wafer, while minimizing reduction in yield and productivity due to misalignment and replacement.

Abstract: A target and method for use in polarized light lithography. A preferred embodiment comprises a first structure located on a reference layer, wherein the first structure is visible through a second layer, and a second structure located on the second layer, wherein the second structure is formed from a photomask containing a plurality of sub-structures oriented in a first orientation, wherein a polarized light is used to pattern the second structure onto the second layer, and wherein a polarization of the polarized light is the same as the orientation of the plurality of sub-structures. The position, size, and shape of the second structure is dependent upon a polarity of the polarized light, permitting a single design for an overlay target to be used with different polarities of polarized light.

Abstract: An image forming apparatus is provided. An exposure component is equipped with a plurality of light emitting elements arrayed along a first direction. An output component is equipped with output ends corresponding to each of the light emitting elements and the output component, when correcting an amount of misalignment in the first direction, outputs drive signals of one line corresponding to a line on a most upstream side of drive signals of plural lines from the output ends that have been shifted by a number corresponding to the amount of misalignment in the first direction. A plurality of connecting wires interconnect each of the output ends and each of the light emitting elements. A judging component is connected to each of the connecting wires, and judges whether or not the drive signals are being normally transmitted through the connecting wire that the judging component has selected.

Abstract: Methods of manufacturing an integrated circuit by a lithographic apparatus are disclosed. The methods include patterning a radiation beam with a patterning device, projecting the patterned beam onto a substrate using a projection system, and determining the position of the patterning device. In one example, the patterning device's position relative to the projection system is determined by measuring the position of the patterning device's support structure. In another example, the position can be determined by measuring a position of the patterning device relative to its support and by measuring a position of the support. In another example, a Z-position of the patterning device is determined by directing at least one beam of radiation onto a part of the patterning device located outside a pattern area. This can be done by directing a pair of laser beams from sensors on the projection system to reflecting strips on the patterning device.

Abstract: A photomask capable of preventing a pattern outside a chip region from being transferred onto a wafer. A non-circuit pattern (a monitor pattern for measuring the accuracy of the position of a mask pattern, for example) formed by making openings in which a phase shift layer is exposed only in a light shielding layer is located around the chip region where the light shielding layer is removed and where the phase shift layer in which openings corresponding to circuit patterns are made is exposed. This prevents the non-circuit pattern from being transferred onto the wafer by the influence of a flare.

Abstract: An overlay method for determining the overlay error of a device structure formed during semiconductor processing is disclosed. The overlay method includes producing calibration data that contains overlay information relating the overlay error of a first target at a first location to the overlay error of a second target at a second location for a given set of process conditions. The overlay method also includes producing production data that contains overlay information associated with a production target formed with the device structure. The overlay method further includes correcting the overlay error of the production target based on the calibration data.

Abstract: A charged-particle beam lithography system is provided. A region to be patterned is divided into plural frames, a main deflection positions a beam to a subfield within the frame, and an auxiliary deflection draws a pattern in units of subfield. The deflection control portion draws a pattern in units of stripe including a first frame drawing region and a second frame drawing region. The first frame drawing region corresponds to one of the frames, and the second frame drawing region is a region moved by a distance C from the first frame drawing region toward a frame to be drawn next. The deflection control portion controls the driver to alternately pattern a first sub-field drawing region in the first frame drawing region and a second sub-field drawing region in the second frame drawing region. The distance C satisfies 0<C<Ws. Ws is a width of the subfield.

Abstract: A process (300) is disclosed to measure predetermined wavelength reflectance spectra of a photo resist coated wafer (305,310,315,320) at a nominal thickness. After coating, the predetermined wavelength reflectance (325,330) is measured and the peak heights and valleys in the vicinity of the predetermined wavelength are tabulated. The relative swing ratio is computed (335) as the average peak height of the spectra at the exposure wavelength. This relative swing ratio is then compared to similar computations on other processes to determine which provides the best critical dimension (CD) control.

Abstract: A method for joining a plurality of reticles is used for producing a semiconductor layout pattern, so that the reticles will collectively map a circuit arrangement on a semiconductor substrate. A plurality of matching patterns is provided that are each geometrically linked to a respective particular reticle and through detecting pairwise correspondence among the matching patterns likewise correspondence among the associated reticles is ascertained. In particular, the method has bulk sub-reticles and peripheral sub-reticles, and a first matching pattern associates to a peripheral sub-reticle that abuts a bulk sub-reticle and a second matching pattern to the bulk sub-reticle at such distance therefrom that fitting of the peripheral sub-reticle between the second matching pattern and the bulk sub-reticle allows matching of the first and second matching patterns. The bulk sub-reticles are used to constitute an array of sub-reticles.

Abstract: A method includes; a step of setting square mask cells in rows and columns on a transparent mask-substrate surface by demarcating by orthogonal lines of equal intervals, each of which has one side having a length smaller than a resolution limit of an optical system; a step of setting the resist thicknesses corresponding to the mask cells; a step of assigning normalized light-intensities respectively to the mask cells as transmission intensities, corresponding to the film thicknesses and having three or more different values; a step of setting each of the mask cells a light-transmission area and a shade-area and determining a transmission-light intensity by an transmission area ratio; a step of providing shade films on the shade areas of the mask substrate.

Abstract: A method for calculating an offset of an exposure dose and a focus position in an exposure apparatus that exposes a substrate via an original includes the steps of obtaining information of a shape of a pattern formed on the substrate using the exposure apparatus, calculating a shift amount between a critical dimension contained in the information of the shape of the pattern and a reference value of the critical dimension, and calculating an offset of the focus position based on the information of the shape of the pattern, and calculating the offset of the exposure dose based on the shift amount and the offset of the focus position.

Abstract: A system and method are provided for determining an overlay of a first layer N?1 and a second layer N that are positioned one over the other on a substrate. The first layer includes a first overlay portion. The second layer includes a first complementary overlay portion. The first overlay portion and first complementary overlay portion are arranged to form an overlay mark for determining the overlay of the first and second layers. In the second layer a stitching portion and a complementary stitching portion are formed. The stitching portion and complementary stitching portion are arranged to form a stitching mark for determining a stitching overlay between the second layer and an adjacent second layer, with the adjacent second layer being positioned adjacent to the second layer.

Abstract: A multi-layer printed wiring board includes a board covered with a conductor layer, an interlayer insulating resin layer, an etched metal film on the interlayer insulating resin layer, and a via hole. The interlayer insulating resin layer has a fibrous substrate. The via hole has an electrolytic plated film and an electrolessly plated film and connects the conductor layer of the board and the etched metal film.

Abstract: Provided are photomask registration errors of which have been corrected and a method of correcting the registration errors of a photomask. The photomask includes a photomask substrate, an optical pattern formed on one surface of the photomask substrate, and a plurality of stress generation portions formed in the photomask substrate. A method of correcting the registration errors of a photomask includes the steps of forming an optical pattern on a photomask substrate, measuring the registration errors of the optical pattern, and forming a plurality of stress generation portions in the photomask substrate so that the stress generation portions correspond to the measured registration errors.

Abstract: A method for manufacturing a surface, the surface having a multiplicity of slightly different patterns, is disclosed with the method comprising the steps of designing a stencil mask having a set of characters for forming the patterns on the surface and reducing shot count or total write time by use of a character varying technique. A system for manufacturing a surface is also disclosed.

Abstract: A method is provided for monitoring a photolithographic process in which a substrate is patterned to form (i) a scatterometry target having a plurality of parallel elongated features, and desirably, (ii) other features each having at least one of a microelectronic function or a micro-electromechanical function. Desirably, each elongated feature of the scatterometry target has a length in a lengthwise direction and a plurality of stress-relief features disposed at a plurality of positions along the length of each elongated feature. A return signal is detected in response to illumination of the scatterometry target. The return signal can be used to determine a result of the photolithographic process.

Abstract: A method for fracturing or mask data preparation or proximity effect correction is disclosed which comprises the steps of inputting patterns to be formed on a surface, a subset of the patterns being slightly different variations of each other and selecting a set of characters some of which are complex characters to be used to form the number of patterns, and reducing shot count or total write time by use of a character varying technique. A system for fracturing or mask data preparation or proximity effect correction is also disclosed.

Abstract: A substrate provided with an alignment mark in a substantially transmissive process layer overlying the substrate, said mark comprising high reflectance areas for reflecting radiation of an alignment beam of radiation, and low reflectance areas for reflecting less radiation of the alignment beam, wherein the high reflectance areas comprise at least one substantially linear sub-grating. In one example, a substantially linear sub-grating comprises a plurality of spaced square regions.

Abstract: A lithographic substrate provided with an alignment mark, the alignment mark having a plurality of features spaced apart from one another, each feature being spaced apart from adjacent features by a different distance is disclosed. Further, there is disclosed a method of aligning a lithographic substrate provided with an alignment mark which has a plurality of features spaced apart from one another, each feature being spaced apart from adjacent features by a different distance, the method including measuring a distance between two of the features on the substrate, comparing the distance with a recorded set of distances, and determining from the comparison the position of the substrate.

Abstract: A method for manufacturing a surface, the surface having a multiplicity of slightly different patterns, is disclosed with the method comprising the steps of designing a stencil mask having a set of characters for forming the patterns on the surface and reducing shot count or total write time by use of a character varying technique. A system for manufacturing a surface is also disclosed.

Abstract: A mask for sequential lateral solidification (SLS) processes including at least one first window, one second window, one third window, and one fourth window is provided. Each window has a length extending longitude on the mask. The second window is aligned to the first window. The width of the first window is greater than that of the second window. The fourth window is aligned to the third window. The width of the third window is greater than that of the fourth window.

Abstract: A method for exposing a resist layer on a substrate to an image of a pattern on a mask is disclosed whereby, after starting exposure and before completing exposure, a controlled amount of contrast loss is introduced by a controller in the image at the resist layer by changing during exposure the position of the substrate holder. The contrast loss affects the pitch dependency of the resolution of a lithographic projection apparatus, and its control is used to match pitch dependency of resolution between different lithographic projection apparatus.

Abstract: Provided are a photomask and a method of fabricating a semiconductor device. The photomask includes a photomask substrate including a chip region and a scribe lane region, with an overlay mark formed in the scribe lane region. The overlay mark includes one or more sub-overlay marks. Each of the sub-overlay marks includes a plurality of unit regions sequentially connected to each other and having different widths, where the width of a given unit region is constant.

Abstract: Each target used in a method of measuring overlay using a scatterometer includes a first portion and a second portion, the first portion has features varying only in a first direction and the second portion has features only varying in a second direction. The first and second directions are orthogonal, thus eliminating cross talk between the directions, and improving the accuracy of overlay error calculations.

Abstract: In repeated processes (steps 201 to 213) of lot processing, an analytical apparatus detects abnormality of overlay, that is, deterioration of overlay accuracy in step 211 and optimizes an apparatus parameter of an exposure apparatus so that the abnormality is solved (so that the overlay accuracy is improved), and then the optimization result is promptly reflected in the exposure apparatus and a measurement/inspection instrument. Since such optimization is performed without stopping the lot processing, the productivity of devices is not lowered.

Abstract: This invention addresses the scalability problem of periodic “nanostructured” surface treatments such as those formed by interference lithography. A novel but simple method is described that achieves seamless stitching of nanostructure surface textures at the pattern exposure level. The described tiling approach will enable scaling up of coherent nanostructured surfaces to arbitrary area sizes. Such a large form factor nanotechnology will be essential for fabricating large aperture, coherent diffractive elements. Other applications include high performance, antiglare/antireflection and smudge resistant Motheye treatments for display products such as PDA's, laptop computers, large screen TV's, cockpit canopies, instrument panels, missile and targeting domes, and, more recently, “negative-index” surfaces.

Abstract: A method for fabricating a photomask includes the steps of forming a phase shift layer, a light-shielding layer, and a negative resist layer in that order on a transparent substrate, forming a first resist pattern including a pattern corresponding to a transfer pattern by performing first exposure and development on the negative resist layer, forming a light-shielding pattern by etching the light-shielding layer using the first resist pattern as a mask, removing the first resist pattern, and then forming a positive resist layer thereon, forming a second resist pattern including a pattern corresponding to a light-absorbing pattern by performing second exposure and development on the positive resist layer, and forming a phase shift pattern by etching the phase shift layer using the second resist pattern as a mask.

Abstract: A mask, which is used to form predetermined patterns on a substrate, includes a pattern forming member that is provided with openings corresponding to the predetermined patterns; and a pattern holding member that overlaps one surface of the pattern forming member.

Abstract: In photo-lithography, one may assess the effect of flare due to various exposure tools. In an example embodiment, in a photo-lithography process on a photo resist coated substrate, there is a method for determining the effect of flare on line shortening. The method comprises, at a first die position on the substrate and in a first exposure, printing a first mask that includes a flare pattern corresponding to one corner of the first mask, and in a second exposure, printing a second mask that includes another flare pattern corresponding to an opposite corner of the second mask. At a second die position on the substrate, a composite mask pattern based on features of the first mask and the second is printed. The printed patterns are developed and measurements are obtained therefrom. The effect of flare is determined as a function of the measurements.

Abstract: An exposure operation evaluation method for an exposure apparatus for arranging a predetermined number of at least one evaluation pattern in an overlapping area and printing the at least one evaluation pattern on a substrate when performing a plurality of exposures and printing on the substrate while sequentially step-moving an exposure area in quadrangle, the exposure area having evaluation patterns arranged on an outer peripheral side of a circuit pattern, the overlapping area overlapping respective exposure areas adjacent to four sides of the exposure area, the method including: measuring a printing misalignment between each evaluation pattern of adjacent exposure areas printed on the substrate; and calculating a plurality of linear components in an exposure operation of the exposure apparatus based on the result of the measurement of the printing misalignment and suppressing and controlling the printing misalignment based on the plurality of linear components.

Abstract: A method and tool for conducting charged-particle beam direct write lithography is disclosed. A disclosed method involves condensing an initial design file down to a set of profiles and a pattern of relative locations to form a formatted pattern file. The formatted pattern file is adjusted to accommodate desired pattern corrections. Portions of the formatted pattern records are extracted to form data strips that have a plurality of channels with a pattern of profiles and spatial indicators. Data strips are sequentially read to construct a printable pattern of profiles and spatial indicators that specify the locations of the profiles. Additionally, the pattern of profiles are sequentially printed from each data strip onto a substrate to form the desired pattern on the substrate.

Abstract: A method for forming high resolution patterns on a substrate surface is disclosed. A photolithographic patterning tool is loaded with a substrate having a photoimagable layer. Multiple exposures to using interference patterns and developments are performed on the photoimagable layer to define a composite line pattern in the photoimagable layer. The composite line pattern having a greater pitch density than possible with single exposure with the same photolithographic patterning tool. The lines of the composite line pattern are selectively cut or trimmed at a plurality of locations to define a desired pattern in the photoimageable layer. The cuts can themselves be achieved with a plurality of photomasks or exposure to direct write tools to achieve densities beyond that allowed by k1>0.25 limit.

Abstract: A method for manufacturing a stitched space in a semiconductor circuit implements a photolithographic process for printing one or more image fields on a wafer surface, each image field corresponding to a portion of a circuit or device and including a space that is to be stitched in adjacent image fields. The space to be stitched that is produced from an image field is overlapped onto the space to be stitched produced from the adjacent image field, however, the overlapped space from the adjacent image fields is intentionally misaligned. The stitched space is then subject to the double light exposure dose to print the stitched space, with the result that an overlay tolerance of the stitched space is improved.

Abstract: A device manufacturing method includes a transfer of a pattern from a patterning device onto a substrate. The device manufacturing method further includes transferring a pattern of a main mark to a base layer for forming an alignment mark; depositing a pattern receiving layer on the base layer; in a first lithographic process, aligning, by using the main mark, a first mask that includes a first pattern and a local mark pattern, and transferring the first pattern and the local mark pattern to the pattern receiving layer; aligning, by using the local mark pattern, a second mask including a second pattern relative to the pattern receiving layer; and in a second lithographic process, transferring the second pattern to the pattern receiving layer; the first and second patterns being configured to form an assembled pattern.

Abstract: An overlay mark is described, wherein the overlay mark is used for checking the alignment accuracy between a lower layer defined by two exposure steps and a lithography process for defining an upper layer, including a part of the lower layer and a photoresist patter. The part of the lower layer includes two first x-directional, two first y-directional bar-like patterns. The first x-directional and first y-directional bar-like patterns are defined by one exposure step to define a first rectangle. The second x-directional and second y-directional bar-like patterns are defined by another exposure to define a second rectangle, wherein the second rectangle is wider than the first rectangle. The photoresist pattern, which is formed by the lithograph process, is disposed over the part of the lower layer and is surrounded by the bar-like patterns.

Abstract: Various test structures and methods for monitoring or controlling a semiconductor fabrication process are provided. One test structure formed on a wafer as a monitor for a lithography process includes a bright field target that includes first grating structures. The test structure also includes a dark field target that includes second grating structures. The first and second grating structures have one or more characteristics that are substantially the same as one or more characteristics of device structures formed on the wafer. In addition, the test structure includes a phase shift target having characteristics that are substantially the same as the characteristics of the bright field or dark field target except that grating structures of the phase shift target are shifted in optical phase from the first or second grating structures. One or more characteristics of the targets can be measured and used to determine parameter(s) of the lithography process.

Abstract: An exposure device according to an embodiment includes an exposure light source for irradiating a reflective mask with an exposure light, an alignment light source for irradiating the reflective mask with an alignment light and an optical element having a structure that a light path of the exposure light extending from the alignment light source to the reflective mask shares at least part in common with a light path of the alignment light extending from the alignment light source to the reflective mask.

Abstract: In one embodiment, a spacing is determined for each edge of a number of features in a photolithographic design. The edges have at least a partially predictable layout. Based on the spacing and the predictable layout, a bridge structure is generated. Each bridge of the bridge structure connects one of the edges to an edge of a neighboring feature. Then, the features and the bridge structure are provided for a phase assignment. The phase assignment assigns features at opposite ends of each bridge in the bridge structure to opposite phases. In another embodiment, a sub-resolution assist feature (SRAF) is introduced for an edge of a feature and a bridge is generated from the feature to the SRAF. Then, the feature and the SRAF are assigned to opposite phases based on the relationship defined by the bridge.

Abstract: A method for correcting an exposure parameter of an immersion lithographic apparatus is provided. In the method, an exposure parameter is measured using a measuring beam projected through a liquid between the projection system and a substrate table of the immersion lithographic apparatus and offset is determined based on a change of a physical property impacting a measurement made using the measuring beam to at least partly correct the measured exposure parameter. Also, there is provided an apparatus and method to measure a height of an optical element connected to liquid between the projection system and the substrate table in the immersion lithographic apparatus.

Abstract: A method for improving the uniformity of a lithographic process. In one aspect, the probability density function of a first and second lithographic apparatus are matched by providing a continuous z-motion to a stage in the first lithographic apparatus during substrate exposure. Preferably, the z-motion is characterized by a normally distributed function, wherein the effective probability density function of the first apparatus is substantially similar to the probability density function of the second apparatus.

Abstract: A measurement method for measuring a distortion of a projection optical system that projects a pattern, used by an exposure apparatus that exposes the reticle pattern onto an object to be exposed, the measurement method includes the steps of a first exposing step for exposing a mark pattern onto the object to be exposed, the mark pattern having a mark on or near an optical axis of the projection optical system and a mark beside the optical axis, and being arranged at a position of the reticle, a second exposing step for only exposing a mark on or near the optical axis of the projection optical system in the mark pattern, measuring step for measuring a shape of the mark formed on the object to be exposed via the first and second exposing steps, and calculating step for calculating the distortion of the projection optical system from the shape of the mark measured by the measuring step.

Abstract: An enhanced technique for determination of an alignment accuracy involves an overlay target assembly which comprises at least two targets, each target having a first sub-structure of a first layer and a second sub-structure of a second layer, wherein, when the first layer and the second layer are correctly aligned, the first sub-structure and the second sub-structure of at least one of the targets are offset with respect to each other by a programmed offset and the overlay target assembly is invariant to at least one geometric transformation. If the offset vectors which describe the offset between the first sub-structure and the second sub-structure all have the same norm, the overlay error may be determined without calibration. Redundancy may be increased by providing each target with two or more programmed offsets between elements of the first sub-structure and elements of the second sub-structure.

Abstract: A method for exposing a resist layer on a substrate to an image of a pattern on a mask is disclosed whereby, after starting exposure and before completing exposure, a controlled amount of contrast loss is introduced by a controller in the image at the resist layer by changing during exposure the position of the substrate holder. The contrast loss affects the pitch dependency of the resolution of a lithographic projection apparatus, and its control is used to match pitch dependency of resolution between different lithographic projection apparatus.

Abstract: A reticle set, includes a first photomask having a circuit pattern provided with first and second openings provided adjacent to each other sandwiching a first opaque portion, and a monitor mark provided adjacent to the circuit pattern; and a second photomask having a trim pattern provided with a second opaque portion covering the first opaque portion in an area occupied by the circuit pattern and an extending portion connected to one end of the first opaque portion and extending outside the area when the second photomask is aligned with a pattern delineated on a substrate by the first photomask.

Abstract: A method and apparatus make use of data representing changes in wavelength of a radiation source to provide control of focal plane position or to provide correction of sensor data. In the first aspect, the wavelength variation data is provided to control systems that control focus by moving apparatus components including, for example, the mask table, the substrate table or optical elements of the projection optical system. In the second aspect, variation data is used in correcting, e.g., focal plane position data measured by an inboard sensor, such as a transmitted image sensor. The two aspects may be combined in a single apparatus or may be used separately.

Abstract: There is provided a semiconductor device including a wafer and a focus monitoring pattern formed on the wafer. The focus monitoring pattern having at least one pair of first and second patterns, and the first pattern has an unexposed region surrounded by an exposed region, and the second pattern has an exposed region surrounded by an unexposed region. In addition, the present invention provides a method of fabricating a semiconductor device comprising the steps of forming at least one pair of first and second patterns on a wafer, the first pattern having an unexposed region surrounded by an exposed region, the second pattern having an exposed region surrounded by an unexposed region, and checking a focusing condition on exposure by measuring widths of the first and second patterns formed on the wafer.

Abstract: The invention is directed to a mark pattern for forming a process monitor mark in a patterned underlayer to monitor a patterning result of a photoresist layer over the patterned underlayer around the boundary between a peripheral region and a device region of a die, wherein the patterned underlayer is formed by using a first mask having a first pattern in a main region of the first mask and the mark pattern at an unused region of the first mask and the first pattern possesses a first mask critical dimension. The mark pattern comprising: a second pattern and a frame pattern. The second pattern has a second mask critical dimension, wherein the second mask critical dimension is as same as the first mask critical dimension. The frame pattern encloses the second pattern.

Abstract: A system and method are provided for determining an overlay of a first layer N-1 and a second layer N that are positioned one over the other on a substrate. The first layer includes a first overlay portion. The second layer includes a first complementary overlay portion. The first overlay portion and first complementary overlay portion are arranged to form an overlay mark for determining the overlay of the first and second layers. In the second layer a stitching portion and a complementary stitching portion are formed. The stitching portion and complementary stitching portion are arranged to form a stitching mark for determining a stitching overlay between the second layer and an adjacent second layer, with the adjacent second layer being positioned adjacent to the second layer.