Abstract: A method is provided for forming planar, self-aligned spaced-apart wells without a high temperature oxidation step to form an ion barrier. The method comprises preparing a substrate with a silicon dioxide-polysilicon-silicon dioxide barrier layer that can be etched to expose different sublayers of the barrier at selected junctures in the production process. A single masking step defines the location of a first set of wells on the prepared substrate. The outer silicon dioxide layer is etched to expose the polysilicon layer at the selected locations, and the substrate is implanted to form the first set of wells. Following ion implantation, the substrate photo-resist is removed, and the substrate is exposed to a germanium-silicon mixture under conditions selected to preferentially deposit a germanium-silicon alloy barrier layer on the exposed polysilicon layer.

Abstract: A semiconductor device having a silicon-on-insulator structure, and a method for fabricating the semiconductor device, wherein a thick silicon oxide film is formed on each side wall of an active silicon substrate, thereby obtaining an increased threshold voltage at the edge of the active silicon substrate. The semiconductor device includes a first silicon substrate, a first silicon oxide film formed over the first silicon substrate, a second silicon substrate on the first silicon oxide film, second silicon oxide films, respectively disposed on opposite side walls of the second silicon substrate, a gate oxide film formed on the second silicon substrate, a gate electrode formed over the gate oxide film, and source/drain impurity diffusion regions, respectively formed in portions of the second silicon substrate disposed at both sides of the gate electrode.

Abstract: A SIMOX substrate 1 is processed through high temperature oxidation treatment after forming a mask-pattern 3 to shield specified electrodes from oxidation in order to increase partly a thickness of a buffed oxide layer 2 to form an area 4. Next, after an oxide film is removed from the surface of the substrate and LOCOS separation is practiced, MOSFET is produced by fabricating a source S and a drain D on the area 4 or the buffed oxide layer 2. Since the buried oxide layer corresponding to electrodes parts influenced by disadvantages of parasitic capacitance are thickened, an operation speed of an inverter is not much decreased and since mean thickness of the buried oxide layer can be thinner, a decrease of a drain electric current by negative electrical resistance can be suppressed. Furthermore, since the thickness of the buffed oxide layer can be controlled in response to each device, plural devices having different breakdown voltages are formed together on the same substrate.

Abstract: A buried oxide film and an SOI layer are formed on the main surface of a substrate. A nitride film patterned in predetermined configuration is formed on the surface of the SOI layer. The first selective oxidation treatment is applied to the SOI layer with the nitride film used as a mask. At this stage, the isolating oxide film is formed not to reach the buried oxide film. Anisotropic etching is applied to the isolating oxide film with the nitride film used as a mask. A sidewall insulating layer of oxidation-resistant material is formed on the sidewall of the nitride film. With the sidewall insulating layer and nitride film used as masks, the second selective oxidation treatment is applied to the SOI layer, thereby forming an isolating oxide film. Thereby, it becomes possible to prevent a parasitic MOS transistor being formed in the end of the SOI layer.