Having Diverse Electrical Device Patents (Class 438/23)
  • Publication number: 20100060205
    Abstract: Packaged semiconductor electronic device to be individually positioned and coupled to peripheral electronic devices, the package comprising a light emitting semiconductor device (D1), and a switch (S1) for controlling the light emitting semiconductor device.
    Type: Application
    Filed: November 29, 2007
    Publication date: March 11, 2010
    Applicant: NXP, B.V.
    Inventors: Steven F.E. Vaassen, Peter Deixler
  • Publication number: 20100053929
    Abstract: A method of packaging a light-emitting diode (LED) chip includes coupling the LED chip to a printed circuit board (PCB) and forming a conductor on a cover plate. Conductive epoxy is applied to at least one of the LED chip and the conductor. The cover plate is coupled to the PCB such that the conductive epoxy forms a circuit connection between the LED chip and the conductor. An LED-based lighting product includes a PCB with one or more LED chips mounted directly thereon. A cover plate has conductors that couple at least to the one or more LED chips and to the PCB, such that the conductors form electrical connections between the one or more LED chips and the PCB.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 4, 2010
    Inventor: Jeffrey Bisberg
  • Patent number: 7663151
    Abstract: A light emitting device chip is obtained by dicing a light emitting device wafer having a light emitting layer section 24 based on a double heterostructure in which a first-conductivity-type cladding layer 6, an active layer 5 and an second-conductivity-type cladding layer 4, each of which being composed of a compound semiconductor having a composition allowing lattice matching with GaAs, out of compound semiconductors expressed by formula (AlxGa1-x)yIn1-yP (where, 0?x?1, 0?y?1), are stacked in this order, and having the (100) surface appeared on the main surface thereof, and GaP transparent semiconductor layers 20, 90 stacked on the light emitting layer section 24 as being agreed with the crystal orientation thereof, so that the {100} surfaces appear on the side faces of the GaP transparent semiconductor layer.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: February 16, 2010
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hitoshi Ikeda, Kingo Suzuki, Akio Nakamura
  • Publication number: 20100032678
    Abstract: A light emitting display device includes a first electrode formed at a light emitting region of a first substrate; a transparent oxide thin film of about 1 ? to about 200 ? in thickness formed on an entire surface of the first electrode at the light emitting region to substantially cover particle on the entire surface of the first electrode; an organic light emitting layer formed on an entire surface of the oxide thin film to emit a light; and a second electrode formed on an entire surface of the first substrate including the organic light emitting layer.
    Type: Application
    Filed: December 29, 2008
    Publication date: February 11, 2010
    Applicant: LG DISPLAY CO., LTD
    Inventors: Min Su Kim, Doo Seok Yang, Young Hyo Jung, Feng Jin Li, Kyoung Min Kang
  • Publication number: 20100025698
    Abstract: A display panel includes a substrate having a display area and a blank area. The blank area includes at least one of a non-metal line region and a metal-line region. The non-metal line region includes a plurality of insulating patterns and a first conductive pattern layer formed on the substrate. The insulating patterns are isolated from each other by the first conductive pattern layer. The metal-line region includes an insulating multilayer formed on the substrate and a conductive pattern layer formed on the insulating multilayer. Several isolated zones are formed by the conductive pattern layer on the surface of the insulating multilayer.
    Type: Application
    Filed: October 9, 2009
    Publication date: February 4, 2010
    Applicant: AU OPTRONICS CORP.
    Inventors: Chih-Hung Shih, Chih-Chun Yang, Ming-Yuang Huang
  • Patent number: 7638812
    Abstract: A method for soldering a semiconductor optical device including a resin-made optical lens to an object by a reflow soldering process using a lead-free solder, and a semiconductor optical device for use in the method. A semiconductor optical device including a silicone resin-made optical lens as the resin-made optical lens is used.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: December 29, 2009
    Assignee: Asahi Rubber Inc.
    Inventors: Masutsugu Tasaki, Kenichi Ozawa
  • Publication number: 20090294834
    Abstract: Provided are a nonvolatile memory device, a method of manufacturing the nonvolatile memory device, and a method of manufacturing a flat panel display device provided therein with the nonvolatile memory device. According to an embodiment, an amorphous silicon layer is formed on a substrate, and then annealed by using an Excimer laser to form a crystallized silicon layer. A nitrogen plasma treatment is performed for the crystallized silicon layer to planarize an upper surface of the crystallized silicon layer. An ONO layer is formed on the nitrogen plasma-treated crystallized silicon layer. A metal layer is formed on the ONO layer. The metal layer, the ONO layer and the nitrogen plasma-treated crystallized silicon layer are patterned.
    Type: Application
    Filed: May 26, 2009
    Publication date: December 3, 2009
    Inventor: DAE YOUNG KIM
  • Publication number: 20090284172
    Abstract: A LED arrangement includes: —a plurality of cells (0, 1, 2, 3) each including at least one respective LED having a binning class as a function of its emission wavelength (L1, L2) and brightness (B1, B2) characteristics, —a plurality of impedance elements (R0, R1, R2, R3) respectively coupled with the cells (0, 1, 2, 3), each impedance element (R0, R1, R2, R3) having an impedance value indicative of the binning class of the at least one LED included in the respective cell (0, 1, 2, 3), and —a controller (5) configured for sensing (6, 80, 81, 82, 83) the impedance values of the impedance elements (R0, R1, R2, R3) and adaptively drive each cell (0, 1, 2, 3) as a function of its binning class as indicated by the impedance element (R0, R1, R2, R3) coupled to the cell.
    Type: Application
    Filed: July 27, 2006
    Publication date: November 19, 2009
    Applicant: PATENT-TREUHAND-GELELLSCHAFT FUR ELEKTRISCHE mbh
    Inventors: Alessandro Maschietto, Giovanni Scilla
  • Publication number: 20090268771
    Abstract: The present application is directed at providing a new lasing device having increased production yields over other single mode laser devices. In particular, a semiconductor lasing device is provided having at least two lasing devices formed on a common substrate. The lasing device is arranged so that in use a preferred lasing device is operational and remaining lasing devices are redundant. This redundancy improves the production yield since only one of the lasing devices needs to function correctly as the others are unused.
    Type: Application
    Filed: September 6, 2006
    Publication date: October 29, 2009
    Inventors: John A. Patchell, James C. O'Gorman
  • Patent number: 7579200
    Abstract: A semiconductor light emitting apparatus is proposed, which has thyristor without increasing number of constituent semiconductor layers, with large degree of freedom of selection of ON voltage.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: August 25, 2009
    Assignee: Sony Corporation
    Inventor: Yoshifumi Yabuki
  • Publication number: 20090206349
    Abstract: An object of the invention is to provide a smaller semiconductor device of which the manufacturing process is simplified and the manufacturing cost is reduced and a method of manufacturing the same. Furthermore, an object of the invention is to provide a semiconductor device having a cavity. A first supporting body 5 having a penetration hole 6 penetrating it from the front surface to the back surface is attached to a front surface of a semiconductor substrate 2 with an adhesive layer 4 being interposed therebetween. A device element 1 and wiring layers 3 are formed on the front surface of the semiconductor substrate 2. A second supporting body 7 is attached to the first supporting body 5 with an adhesive layer 8 being interposed therebetween so as to cover the penetration hole 6. The device element 1 is sealed in a cavity 9 surrounded by the semiconductor substrate 2, the first supporting body 5 and the second supporting body 7.
    Type: Application
    Filed: August 22, 2007
    Publication date: August 20, 2009
    Inventors: Hiroshi Yamada, Katsuhiko Kitagawa, Kazuo Okada, Yuichi Morita, Hiroyuki Shinogi, Shinzo Ishibe, Yoshinori Seki, Takashi Noma
  • Patent number: 7576364
    Abstract: A display device and its method of manufacture. The display device is formed to include a substrate having an upper surface, a recess region having a bottom surface and sidewalls, a light-emitting element and a switch element. The light-emitting element includes a first electrode disposed on the recess region, a light-emitting layer disposed on the first electrode, and a second electrode disposed on the light-emitting layer. The switch element is disposed on the substrate and electrically connected to the light-emitting element. The bottom surface of the recess region is lower than the bottom surface of the active layer.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: August 18, 2009
    Assignees: CHI MEI Optoelectronics Corp., CHI MEI EL Corp.
    Inventors: Seok-Woon Lee, Sung-Soo Park, Biing-Seng Wu
  • Publication number: 20090203157
    Abstract: A configuration for decreasing the leakage electric current of a transistor for control for controlling an electric potential holding operation of a control electrode of a transistor for drive for flowing an electric current through a display device by adjusting the output electric potential of an electric potential source is disclosed.
    Type: Application
    Filed: April 17, 2009
    Publication date: August 13, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Osamu Yuki, Yoshinori Nakajima, Shigeki Kondo
  • Publication number: 20090159677
    Abstract: A contactless power and data transfer system is disclosed. The system includes an encapsulated optoelectronic semiconductor device at least partly disposed within a barrier encapsulation, and a contactless power transfer system configured to transfer at least one of power and data across the barrier encapsulation. A method for manufacturing a contactless power and data transfer system is also disclosed.
    Type: Application
    Filed: December 20, 2007
    Publication date: June 25, 2009
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Aharon Yakimov, Ahmet Gun Erlat, Kyle Erik Litz, John Stanley Glaser, Christian Maria Heller
  • Publication number: 20090136173
    Abstract: The invention describes method and apparatus for a mode converter enabling an adiabatic transfer of a higher order mode into a lower order optical mode within a photonic integrated circuit exploiting integrated semiconductor ridge waveguide techniques. As disclosed by the invention, such a mode conversion is achievable by using an asymmetric coupler methodology. In an exemplary embodiment of the invention, the invention is used to provide a low insertion loss optical connection between laterally-coupled DFB laser operating in first order mode and passive waveguide operating in the zero order optical mode. The integrated arrangement fabricated by using one-step epitaxial growth allows for a launch of the laser's light into the waveguide circuitry operating in the zero order lateral mode or efficiently coupling it to single-mode fiber, an otherwise high loss interface due to the difference in laser and optical fiber modes.
    Type: Application
    Filed: November 26, 2007
    Publication date: May 28, 2009
    Applicant: OneChip Photonics Inc.
    Inventors: Yury Logvin, Fang Wu, Kirill Pimenov, Valery Tolstikhin
  • Patent number: 7537946
    Abstract: A method for manufacturing an image display apparatus includes (i) preparing a display unit, wherein the display unit has a plurality of pixel circuits, each of the plurality of pixel circuits being provided with a drive transistor having a first main electrode connected to one terminal of a display device and a second main electrode and a control electrode connected to a power supply, for supplying a drive current to the display device, and a control transistor disposed between the control electrode and the first main electrode in the drive transistor for setting an electric potential of the control electrode of the drive transistor, and (ii) adjusting a voltage applied to between the second main electrode and another terminal of the display device.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: May 26, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Osamu Yuki, Yoshinori Nakajima, Shigeki Kondo
  • Patent number: 7538340
    Abstract: A light source having a die, a substrate, and a housing is disclosed. The die has a semiconducting light emitting device thereon, the die having a top surface and a bottom surface, light being emitted through the top surface. The die is characterized by a maximum dimension. The substrate has a top surface bonded to the bottom surface of the die. The substrate includes a plurality of electrical traces connected to the die that are used to power the light emitting device. The housing includes a reflector having a reflective inner wall facing the die and an aperture through which light reflected from the inner wall exits the housing. The aperture lies in a plane normal to the top surface of the die and has a height that is less than the maximum dimension of the die. The die is encapsulated in a transparent layer of material.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: May 26, 2009
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Siew It Pang, Tong Fatt Chew
  • Publication number: 20090127545
    Abstract: An organic light emitting device and a method for fabricating the same are discussed. According to an embodiment, the method includes forming a mother substrate structure including organic light emitting devices including TFTs and first electrodes, each first electrode electrically connected to the corresponding TFT and being a part of an OLED to be formed; forming first and second conductive layers to form a power line in each organic light emitting device; forming a dummy layer on the first electrodes and the second conductive layer; performing at least one of scribing and grinding processes on the mother substrate structure to divide the mother substrate structure into sub-substrate structures; removing the dummy layer from the first electrodes and the second conductive layer after the performing step; and forming a light emitting layer and a second electrode on the first electrode in one of the sub-substrate structures to form the OLED.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 21, 2009
    Inventors: Jaeyong Park, Wonhee Choi, Byoungjune Lee, Donghwan Kim, Hyungchul Kim
  • Patent number: 7534634
    Abstract: A surface-mountable light-emitting diode light source is described, in which the leadframe-bends toward the rear side of the package that are required for surface mounting lie within a transparent plastic molded body. Also described is a method of producing a mixed-light, preferably white-light source on the basis of a UV- or blue-emitting semiconductor LED. The LED is mounted on a leadframe, a transparent plastics molding composition is mixed with a conversion substance and possibly further fillers to form a molding composition. The leadframe is encapsulated, preferably by the injection-molding process, with the molding composition in such a way that the LED is surrounded on its light-exiting sides by the molding composition.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: May 19, 2009
    Assignee: Osram GmbH
    Inventors: Harald Jäger, Klaus Höhn, Reinhold Brunner
  • Patent number: 7527989
    Abstract: A method for fabricating a liquid crystal display panel is provided. A thin film transistor array substrate and a color filter array substrate are formed. The thin film transistor array substrate includes a screen region having gate lines, data lines, thin film transistors, and pixel electrodes; a pad region having gate pads, an overetch prevention pattern formed overlapped with a gate insulating film in an outer portion of each gate pad, and data pads; data pad protection electrodes each on a respective data pad, and a protection film on an entire surface of the screen region and the pad region. The thin film transistor array substrate and the color filter array substrate are bonded together so that the pad region remains uncovered. Also, a portion of the protection film and the overetch prevention pattern of the pad region are etched to partially expose the gate pads and the data pad protection electrodes, and to form gate holes in the gate insulating film over corresponding gate pads.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: May 5, 2009
    Assignee: LG Display Co., Ltd.
    Inventors: Soon Sung Yoo, Youn Gyoung Chang, Heung Lyul Cho, Seung Hee Nam
  • Patent number: 7521113
    Abstract: The present invention provides a layered structure including a fullerene layer exhibiting Ohmic behavior. The layered device includes a layer of fullerenes and a layer of a fluoride compound of pre-selected thickness. The layered structure includes a third layer of an electrically conductive material located on the second layer to which electrical contact can be made. The thickness of the second layer is selected so that the layered structure exhibits substantially Ohmic contact across the first, second and third layers. The present invention also provides a light-emitting device which includes a substrate and a first electrically conductive layer defining an anode electrode layer on the substrate. The device includes an electron transport layer which includes fullerenes, and a second electrically conductive layer defining a cathode electrode layer on the electron transport layer. The device includes a layer of light-emissive material between the anode electrode layer and the electron transport layer.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: April 21, 2009
    Inventors: Zheng-Hong Lu, Xiaodong Feng
  • Publication number: 20090068773
    Abstract: A method for fabricating an AMOLED pixel includes forming a transparent semiconductor layer on a substrate and forming a first channel layer of the switch TFT, a lower electrode of a storage capacitor and a second channel layer of a driving TFT. A first dielectric layer is formed over the substrate. A first opaque metal gate of the switch TFT, a second opaque metal gate of the driving TFT and a scan line are formed on the first dielectric layer. A first source and a first drain of the switch TFT are formed in the first channel layer and a second source and a second drain of the switch TFT are formed in the second channel layer. A patterned transparent metal layer is formed on the first dielectric layer. A data line is formed over the substrate. An OLED is formed over the substrate.
    Type: Application
    Filed: October 20, 2008
    Publication date: March 12, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Ming Lai, Yung-Hui Yeh, Yi-Hsun Huang
  • Publication number: 20090014827
    Abstract: Provided is an image sensor module at the wafer level including a wafer; an image sensor mounted on one surface of the wafer; a wireless communication chip formed outside the image sensor on the one surface of the wafer; and a protective cover installed on the one surface of the wafer.
    Type: Application
    Filed: June 10, 2008
    Publication date: January 15, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chang Hyun Lim, Seog Moon Choi, Dae Jun Kim, Won Kyu Jeung, Jingli Yuan
  • Patent number: 7476558
    Abstract: This invention relates to a method for manufacturing selective area grown stacked-layer electro-absorption modulated laser structure, comprising: step 1: forming a selective growth pattern of a modulator section on a substrate; step 2: simultaneously growing a 2-stacked-layer active region structure of a modulator MQW layer and a laser MQW layer by the first epitaxy step; step 3: etching gratings, and removing the laser MQW layer in the modulator section by selective etching; and step 4: completing the growth of the entire electro-absorption modulated laser structure by a second epitaxy step.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: January 13, 2009
    Assignee: Institute of Semiconductors, Chinese Academy of Sciences
    Inventors: Hongliang Zhu, Wei Wang
  • Publication number: 20080290353
    Abstract: An optoelectronic device article comprises a substrate containing at least one electrically conductive microvia, at least one emitter diode and at least one ESD diode, optionally formed in situ, disposed in or on the substrate, and an electrically conductive path between the foregoing elements. A reflector cavity may be defined in the substrate for receiving the emitter diode(s), with retention elements on the substrate used to retain a lens material. High flux density and high emitter diode spatial density may be attained. Thermal sensors, radiation sensors, and integral heat spreaders comprising one or more protruding fins may be integrated into the article.
    Type: Application
    Filed: May 24, 2007
    Publication date: November 27, 2008
    Inventors: Nicholas W. Medendorp, JR., James Ibbetson
  • Publication number: 20080265272
    Abstract: Disclosed are a light emitting device having a zener diode therein and a method of fabricating the light emitting device. The light emitting device comprises a P-type silicon substrate having a zener diode region and a light emitting diode region. A first N-type compound semiconductor layer is contacted to the zener diode region of the P-type silicon substrate to exhibit characteristics of a zener diode together with the P-type silicon substrate. Further, a second N-type compound semiconductor layer is positioned on the light emitting diode region of the P-type silicon substrate. The second N-type compound semiconductor layer is spaced apart from the first N-type compound semiconductor layer. Meanwhile, a P-type compound semiconductor layer is positioned on the second N-type compound semiconductor layer, and an active layer is interposed between the second N-type compound semiconductor layer and the P-type compound semiconductor layer.
    Type: Application
    Filed: March 20, 2007
    Publication date: October 30, 2008
    Applicant: SEOUL OPTO DEVICE CO., LTD.
    Inventors: Duck Hwan Oh, Sang Joon Lee, Kyung Hae Kim
  • Patent number: 7439085
    Abstract: Methods and apparatuses for causing electroluminescence with charge trapping structures are disclosed. Various embodiments relate to methods and apparatuses for causing electroluminescence with charge carriers of one type provided to the charge trapping structure by a forward biased p-n structure or a reverse biased p-n structure.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: October 21, 2008
    Assignee: Macronix International Co., Ltd.
    Inventors: Chih Chieh Yeh, Shaw Hung Ku, Tahui Wang, Chih Yuan Lu
  • Publication number: 20080230798
    Abstract: An active matrix organic electroluminescent substrate includes a substrate having a controlling element region and a luminescent region, a thin film transistor, a first passivation layer, a conductive layer electrically connected to the thin film transistor, and a second passivation layer disposed on the first passivation layer and the conductive layer. The second passivation layer has an opening partially exposing the conductive layer, and a step-shaped structure located between the controlling element region and the luminescent region.
    Type: Application
    Filed: May 21, 2007
    Publication date: September 25, 2008
    Inventors: Shu-Hui Huang, Hsiao-Wei Yeh, Min-Ling Hung, Hsia-Tsai Hsiao
  • Publication number: 20080233665
    Abstract: A method of manufacturing a semiconductor device including: forming a semiconductor layer on a substrate with transistor and capacitor formation regions; forming first and second photo resist patterns at the transistor and capacitor formation regions, respectively, the second photo resist pattern having a thickness less than that of the first photo resist pattern; patterning the semiconductor layer using the first and second photo resist patterns as a mask; removing the second photo resist pattern to expose the semiconductor layer at the capacitor formation region; implanting ions in the exposed semiconductor layer to form a first electrode of a capacitor; removing the first photo resist pattern; forming a gate electrode at the transistor formation region; forming an second electrode at the capacitor formatting region; and forming a source region and a drain region at the semiconductor layer formed at both sides of the gate electrode.
    Type: Application
    Filed: September 17, 2007
    Publication date: September 25, 2008
    Applicant: SAMSUNG SDI CO., LTD.
    Inventors: In-young Jung, Choong-youl Im, Sung-chul Kim
  • Patent number: 7422918
    Abstract: The present invention relates to a method of making supports for light emitting diodes, wherein rigid substrates are used as supports for light emitting diodes, it being proposed, in particular, to render the substrates more fragile in order to make certain zones of a lower layer of the said substrate more flexible so that the substrate is able to deform in the region of the zones thus made flexible, the deformation then taking place without causing the electrical conduction of a top layer, on which the diodes are disposed, to be broken. In one particular embodiment of the invention it is proposed to provide as many rigid substrate plates as there are support planes in the three-dimensional environment, and to connect these various substrate plates together by means of deformable conductive components disposed in accordance with surface mounted component technology.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: September 9, 2008
    Assignee: Valeo Vision
    Inventors: Stéphane Richard, Jean-Marc Nicolai
  • Publication number: 20080206909
    Abstract: A conventional composition of carbon nitride has a deposition method and properties limited. In the case of using the composition of carbon nitride as a protective film, for example, a material of an object to be coated (goods) is required to satisfy with a condition in disagreement with a temperature during forming the composition of carbon nitride. Besides, in the case of using the composition of carbon nitride as an insulating film in a semiconductor device, low stress relaxation and low coverage for a step are produced since the insulating film has a low hydrogen concentration. Consequently, a composition including carbon nitride according to the present invention is formed at a deposition temperature that enables to include hydrogen in the composition at 30 to 45 atomic %, for example, at temperatures of 100° C. or less, preferably 50° C. or less, more preferably from 20° C. to 30° C., with stability and adhesiveness kept.
    Type: Application
    Filed: April 28, 2008
    Publication date: August 28, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shinji Maekawa
  • Patent number: 7416906
    Abstract: A method for soldering a semiconductor optical device including a resin-made optical lens to an object by a reflow soldering process using a lead-free solder, and a semiconductor optical device for use in the method. A semiconductor optical device including a silicone resin-made optical lens as the resin-made optical lens is used.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: August 26, 2008
    Assignee: Asahi Rubber Inc.
    Inventors: Masutsugu Tasaki, Kenichi Ozawa
  • Publication number: 20080197362
    Abstract: A light emitting diode demonstrating high luminescence efficiency and comprising a Group IV semiconductor such as silicon or germanium equivalent thereto as a basic component formed on a silicon substrate by a prior art silicon process, and a fabricating method of waveguide thereof are provided. The light emitting diode of the invention comprises a first electrode for implanting electrons, a second electrode for implanting holes, and a light emitting section electrically connected to the first and the second electrode, wherein the light emitting section is made out of single crystalline silicon and has a first surface and a second surface facing the first surface, wherein with respect to plane orientation (100) of the first and second surfaces, the light emitting section crossing at right angles to the first and second surfaces is made thinner, and wherein a material having a high refractive index is arranged around the thin film section.
    Type: Application
    Filed: November 6, 2007
    Publication date: August 21, 2008
    Inventors: Digh HISAMOTO, Shinichi Saito, Shinichiro Kimura
  • Publication number: 20080197342
    Abstract: A display device and its method of manufacture. The display device is formed to include a substrate having an upper surface, a recess region having a bottom surface and sidewalls, a light-emitting element and a switch element. The light-emitting element includes a first electrode disposed on the recess region, a light-emitting layer disposed on the first electrode, and a second electrode disposed on the light-emitting layer. The switch element is disposed on the substrate and electrically connected to the light-emitting element. The bottom surface of the recess region is lower than the bottom surface of the active layer.
    Type: Application
    Filed: February 15, 2007
    Publication date: August 21, 2008
    Applicants: CHI MEI EL Corp., CHI MEI OPTOELECTRONICS CORP.
    Inventors: Seok-Woon Lee, Sung-Soo Park, Biing-Seng Wu
  • Patent number: 7413916
    Abstract: A light emitting element having a superior light emitting characteristic is provided by forming a region partly including a phosphor (light emitting region) in manufacturing of a light emitting element having an organic compound layer using a high molecular weight material. A solution in which a high polymer having a degree of polymerization of 50 or more is dissolved in a solvent is applied by a spin coating method, and then a low polymer which is composed of the same repetition units as the high polymer and has a degree of polymerization of 2 to 5 and a phosphor are coevaporated to form a light emitting region (105) and only a low polymer is vapor-deposited on the light emitting region to form an organic compound layer (103). Thus, the light emitting region (105) can be partly formed.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: August 19, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Satoko Shitagaki
  • Publication number: 20080191632
    Abstract: The present invention provides a light emitting device comprising a first semiconductor substrate including a light emitting cell block having a plurality of light emitting cells connected in series on one surface thereof; a second semiconductor substrate having one surface formed with a rectifying bridge and the other surface bonded to the other surface of the first semiconductor substrate; and a submount substrate to which the second semiconductor substrate is flip-chip bonded to be in contact with the one surface of the second semiconductor substrate, wherein rectified power is applied to the light emitting cell block through the rectifying bridge. The present invention further provides a method of manufacturing the light emitting device.
    Type: Application
    Filed: August 7, 2006
    Publication date: August 14, 2008
    Applicant: SEOUL OPTO-DEVICE CO., LTD.
    Inventor: Jae Ho Lee
  • Patent number: 7399657
    Abstract: Ball grid array packages for semiconductor die include a thermally conductive container and a substrate that substantially enclose a semiconductor die. The die is positioned with respect to the container by thermally conductive supports formed in the container or attached to the container. The die contacts the supports so that the die and the container form a cavity that is at least partially filled with a thermally conductive material such as a conductive epoxy to promote thermal conduction between the die and the container. The die electrically connects to the substrate with bond wires that extend through an aperture in the substrate and attach to bond pads provided on the substrate. The aperture is typically filled with a protective layer of resin, epoxy, or other material that also encapsulates the bond wires.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: July 15, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Todd O. Bolken, Chad A. Cobbley
  • Publication number: 20080150435
    Abstract: A display device comprises: an insulating substrate; a first electrode formed over the insulating substrate and physically contacting the insulating substrate; an organic layer which is formed over the first electrode and includes an organic light emitting layer; and a second electrode which is formed over the organic layer.
    Type: Application
    Filed: November 13, 2007
    Publication date: June 26, 2008
    Inventors: Seung-kyu Park, Tae-youn Kim
  • Publication number: 20080150434
    Abstract: A display device includes; an insulating substrate, a thin film transistor disposed on the insulating substrate and which comprises a drain electrode, a wall disposed on the thin film transistor and which includes an opening and a contact hole which exposes the drain electrode, a pixel electrode connected to the drain electrode through the contact hole and which comprises a first part in direct contact with the insulating substrate and a second part connected to the first part, an organic layer disposed on the pixel electrode and which comprises an organic emission layer, and a common electrode disposed on the organic layer
    Type: Application
    Filed: August 22, 2007
    Publication date: June 26, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Un-cheol SUNG, Jin-koo CHUNG, Jung-soo RHEE
  • Publication number: 20080142791
    Abstract: An organic light emitting display including a substrate, a semiconductor layer formed on the substrate, an organic light emitting diode formed on the semiconductor layer, an encapsulant formed on a periphery of the substrate which is an outer periphery of the organic light emitting diode and the semiconductor layer; and an encapsulation substrate attached to the encapsulant.
    Type: Application
    Filed: April 13, 2007
    Publication date: June 19, 2008
    Inventors: JongYun Kim, Byoungdeog Choi
  • Publication number: 20080128683
    Abstract: An organic light emitting display includes a substrate, a semiconductor layer arranged on the substrate, an organic light emitting diode arranged on the semiconductor layer, an encapsulant arranged on an top surface periphery of the substrate, which is an outer periphery of the semiconductor layer and the organic light emitting diode, an encapsulation substrate bonded to the encapsulant, and a bonding agent arranged on an under surface of the substrate which is opposite to the encapsulant.
    Type: Application
    Filed: April 13, 2007
    Publication date: June 5, 2008
    Inventors: Jongyun Kim, Byoungdeog Choi
  • Patent number: 7371592
    Abstract: A method for manufacturing a thin film transistor array panel using a photo mask is provided. The photo mask includes: a transmitting area and a translucent area, wherein the translucent area includes a plurality of light blocking portions blocking light, and wherein the light blocking portions have a plurality of areas blocking different amounts of light. By using this type of photo mask, a substantially flat layer of photoresist film can be deposited even on top of an uneven surface to manufacture a thin film transistor array panel. The flat photoresist film reduces processing cost and enhances the reliability of the panel manufacturing process.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: May 13, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Min Park, Hi-kuk Lee, Woo-Seok Jeon, Joo-Han Kim, Doo-Hee Jung
  • Patent number: 7361966
    Abstract: An inkjet printhead chip includes electrostatic discharge (ESD) circuits to protect the chip during ESD events, including one preventing a thin dielectric layer on a substrate from breakdown. In one embodiment, the chip includes an ESD circuit essentially dedicated per each actuator. In another, ESD circuits alternate connection between power and ground. In still another, actuators are approximately equidistantly spaced regarding respective ESD circuits. Exemplary ESD circuits include a ballast resistor in series with a diode. In turn, diodes are either forward biased toward power or away from ground. In a thermal inkjet embodiment, a cavitation layer above a resistor and dielectric layer have pluralities of fingers connecting the cavitation layer to a metal buss. The metal buss attaches to the ballast resistors. Protection typically embodies the safe distribution of ESD current to ground during both chip manufacture and user printhead installation. Inkjet printheads and printers are also disclosed.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: April 22, 2008
    Assignee: Lexmark International, Inc.
    Inventors: Jason K. Young, Nicole M. Rodriguez
  • Patent number: 7358538
    Abstract: The present invention provides layered hole injection structures including one or more layers of fullerenes for application in an organic electroluminescent device. The layered structures include a bi-layered structure including an electrically conductive layer serving as electrical contact to external circuit and a fullerene layer sandwiched between the conductive layer and a hole transport layer. The layered structure may also includes a tri-layered structure stacked sequentially including a first electrically conductive layer, a fullerene layer and a hole injection layer material selected from thermally stable molecules such as CuPc. The layered structure may also include a four-layered structure stacked sequentially including a first electrically conductive layer, a fullerene layer on the conductive layer, a noble metal layer on the fullerene layer and another fullerene layer on the noble metal layer.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: April 15, 2008
    Inventors: Zheng-Hong Lu, Sijian Han, Yanyan Yuan
  • Patent number: 7351623
    Abstract: A thin film transistor substrate of a LCD device and a fabricating method thereof are disclosed for simplifying a fabricating process and enlarging a capacitance value of a storage capacitor without any reduction of aperture ratio. The LCD device includes: a double-layered gate line having a first transparent conductive layer and a second opaque conductive layer, the second opaque conductive layer have a step coverage; a gate insulation layer film on the gate line; a data line crossing the gate line to define a pixel region; a TFT connected to the gate line and the data line; a pixel electrode connected to the TFT via a contact hole of a protective film on the TFT; and a storage capacitor overlapping the pixel electrode and having a lower storage electrode formed of the first transparent conductive layer.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: April 1, 2008
    Assignee: LG.Philips LCD Co., Ltd.
    Inventor: Byung Chul Ahn
  • Publication number: 20080064129
    Abstract: A method of manufacturing a display substrate comprises forming a thin-film transistor (TFT) on a silicon wafer, transferring the TFT from the silicon wafer onto a base substrate using a stamp unit and forming a pixel electrode electrically connected to the TFT.
    Type: Application
    Filed: September 12, 2007
    Publication date: March 13, 2008
    Inventors: Nam-Seok Roh, Jung-Mok Bae
  • Patent number: 7314772
    Abstract: Embodiments of methods, apparatuses, devices, or systems for forming a photonic device are described.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: January 1, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Alexander Govyadinov, Robert Newton Bicknell
  • Patent number: 7294517
    Abstract: It is characteristic of an organic material suited to an interlayer insulating film to transmit vapor therethrough and to be liable to absorb moisture, and the material has a disadvantage that it is extremely susceptible to oxygen and moisture to be readily deteriorated no matter whether it is low-molecular or high-molecular. Further, alkali metal or alkaline earth metal is used for a positive electrode or a negative electrode of a light emitting element, and these are liable to be oxidized by oxygen. Thus moisture is responsible for deterioration of a light emitting element and for failure such as dark spots or the like.
    Type: Grant
    Filed: June 17, 2002
    Date of Patent: November 13, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Hirokazu Yamagata, Akihiko Koura, Shunpei Yamazaki
  • Patent number: 7285431
    Abstract: This invention relates to a method for manufacturing a GaN based LED of a back hole structure, and the method comprises: epitaxially growing an N type GaN layer, a multi-quantum wells emitting active region and a P type GaN layer in turn on an insulation substrate made of sapphire or other materials; etching the N type GaN layer by photoetching, and forming a P type ohmic contact electrode and an N type ohmic contact electrode; scribing the chip to divide the dies on the epitaxial chip into individual die; forming a SiO2 insulation isolation layer on both sides of the silicon chip, forming a metal electrode on a face side, and forming a back hole pattern on a back side; forming a back hole; forming a bump pattern for plating on the face side of the silicon chip by thick resist photoetching; forming a layer of alloy with low melting point on the back side of the silicon chip, thus forming a base; on the back side of the base, directly attaching the base to a heat sink of a housing; bonding the die with the fac
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: October 23, 2007
    Assignee: Institute of Semiconductors, Chinese Academy of Sciences
    Inventors: Jinmin Li, Guohong Wang, Liangchen Wang, Long Ma, Zhongchao Fan
  • Patent number: 7268014
    Abstract: The invention provides a fabrication method of an LED package for easily fabricating LED packages of excellent heat radiation characteristics. In the method, a metallic package substrate having a recess and a reflecting surface formed in the recess is prepared, and the package substrate is selectively anodized and divided into two package electrode parts divided from each other. Then, an light emitting device is mounted on the bottom of the recess. Preferably, the package substrate is a metal substrate made of Al or Al-based metal.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: September 11, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Young Ki Lee, Seog Moon Choi, Yong Sik Kim, Sang Hyun Shin