Abstract: An organic light emitting display includes a substrate, a semiconductor layer arranged on the substrate, an organic light emitting diode arranged on the semiconductor layer, an encapsulant arranged on an top surface periphery of the substrate, which is an outer periphery of the semiconductor layer and the organic light emitting diode, an encapsulation substrate bonded to the encapsulant, and a bonding agent arranged on an under surface of the substrate which is opposite to the encapsulant.

Abstract: A method for manufacturing a thin film transistor array panel using a photo mask is provided. The photo mask includes: a transmitting area and a translucent area, wherein the translucent area includes a plurality of light blocking portions blocking light, and wherein the light blocking portions have a plurality of areas blocking different amounts of light. By using this type of photo mask, a substantially flat layer of photoresist film can be deposited even on top of an uneven surface to manufacture a thin film transistor array panel. The flat photoresist film reduces processing cost and enhances the reliability of the panel manufacturing process.

Abstract: An inkjet printhead chip includes electrostatic discharge (ESD) circuits to protect the chip during ESD events, including one preventing a thin dielectric layer on a substrate from breakdown. In one embodiment, the chip includes an ESD circuit essentially dedicated per each actuator. In another, ESD circuits alternate connection between power and ground. In still another, actuators are approximately equidistantly spaced regarding respective ESD circuits. Exemplary ESD circuits include a ballast resistor in series with a diode. In turn, diodes are either forward biased toward power or away from ground. In a thermal inkjet embodiment, a cavitation layer above a resistor and dielectric layer have pluralities of fingers connecting the cavitation layer to a metal buss. The metal buss attaches to the ballast resistors. Protection typically embodies the safe distribution of ESD current to ground during both chip manufacture and user printhead installation. Inkjet printheads and printers are also disclosed.

Abstract: The present invention provides layered hole injection structures including one or more layers of fullerenes for application in an organic electroluminescent device. The layered structures include a bi-layered structure including an electrically conductive layer serving as electrical contact to external circuit and a fullerene layer sandwiched between the conductive layer and a hole transport layer. The layered structure may also includes a tri-layered structure stacked sequentially including a first electrically conductive layer, a fullerene layer and a hole injection layer material selected from thermally stable molecules such as CuPc. The layered structure may also include a four-layered structure stacked sequentially including a first electrically conductive layer, a fullerene layer on the conductive layer, a noble metal layer on the fullerene layer and another fullerene layer on the noble metal layer.

Abstract: A thin film transistor substrate of a LCD device and a fabricating method thereof are disclosed for simplifying a fabricating process and enlarging a capacitance value of a storage capacitor without any reduction of aperture ratio. The LCD device includes: a double-layered gate line having a first transparent conductive layer and a second opaque conductive layer, the second opaque conductive layer have a step coverage; a gate insulation layer film on the gate line; a data line crossing the gate line to define a pixel region; a TFT connected to the gate line and the data line; a pixel electrode connected to the TFT via a contact hole of a protective film on the TFT; and a storage capacitor overlapping the pixel electrode and having a lower storage electrode formed of the first transparent conductive layer.

Abstract: A method of manufacturing a display substrate comprises forming a thin-film transistor (TFT) on a silicon wafer, transferring the TFT from the silicon wafer onto a base substrate using a stamp unit and forming a pixel electrode electrically connected to the TFT.

Abstract: Embodiments of methods, apparatuses, devices, or systems for forming a photonic device are described.

Abstract: It is characteristic of an organic material suited to an interlayer insulating film to transmit vapor therethrough and to be liable to absorb moisture, and the material has a disadvantage that it is extremely susceptible to oxygen and moisture to be readily deteriorated no matter whether it is low-molecular or high-molecular. Further, alkali metal or alkaline earth metal is used for a positive electrode or a negative electrode of a light emitting element, and these are liable to be oxidized by oxygen. Thus moisture is responsible for deterioration of a light emitting element and for failure such as dark spots or the like.

Abstract: This invention relates to a method for manufacturing a GaN based LED of a back hole structure, and the method comprises: epitaxially growing an N type GaN layer, a multi-quantum wells emitting active region and a P type GaN layer in turn on an insulation substrate made of sapphire or other materials; etching the N type GaN layer by photoetching, and forming a P type ohmic contact electrode and an N type ohmic contact electrode; scribing the chip to divide the dies on the epitaxial chip into individual die; forming a SiO2 insulation isolation layer on both sides of the silicon chip, forming a metal electrode on a face side, and forming a back hole pattern on a back side; forming a back hole; forming a bump pattern for plating on the face side of the silicon chip by thick resist photoetching; forming a layer of alloy with low melting point on the back side of the silicon chip, thus forming a base; on the back side of the base, directly attaching the base to a heat sink of a housing; bonding the die with the fac

Abstract: The invention provides a fabrication method of an LED package for easily fabricating LED packages of excellent heat radiation characteristics. In the method, a metallic package substrate having a recess and a reflecting surface formed in the recess is prepared, and the package substrate is selectively anodized and divided into two package electrode parts divided from each other. Then, an light emitting device is mounted on the bottom of the recess. Preferably, the package substrate is a metal substrate made of Al or Al-based metal.

Abstract: Photonic interconnect reconfigurably couples integrated circuits such as microprocessor, memory or other logic components. Detector, modulator, broad-band coupler and waveguide elements provide transmit and receive capability on CMOS substrate. Computer-implemented design software and reusable component library automate photonic and circuit design and simulation for manufacturability.

Abstract: Monolithic devices that include an acoustic resonator vertically integrated with electronic circuitry are described. In one aspect, a monolithic integrated device includes a substrate, electronic circuitry supported by the substrate, an acoustic isolator over the electronic circuitry, and an acoustic resonator on the acoustic isolator. A method of fabricating the monolithic device also is described.

Abstract: Semiconductor devices in an optoelectronic integrated circuit are electrically isolated from each other by using planar lateral oxidation to oxidize a buried semiconductor layer vertically separating the semiconductor devices.

Abstract: A method and system is described for preparing a film stack, and forming a feature in the film stack using a plurality of dry etching processes. The feature formed in the film stack can include a gate structure having a critical dimension of approximately 25 nm or less. This critical dimension can be formed in the polysilicon layer using four mask layers.

Abstract: A method for producing an emission module having at least two vertically emitting lasers in which an optically active laser layer is arranged on a substrate and at least one upper covering layer is arranged on said laser layer. In a first etching step, upper mesa regions are formed by etching the upper covering layer, wherein the etching depth of the first etching step is chosen such that the first etching step is ended above the optically active laser layer, and the first etching step is carried out such that the resulting distance between adjacent upper mesa regions is so small that the radiation generated by the finished lasers can be coupled directly into a single optical waveguide. In a second etching step, the optically active layer is severed to form lower mesa regions, the second etching step being a wet-chemical or dry-chemical etching step with a predominantly chemical etching component.

Abstract: An electron-emitting device having favorable electron emitting characteristic stable for a long time, which is manufactured by a method comprising the steps of disposing an electrically conductive member having a second gap on a substrate, and applying a voltage to the electrically conductive member while irradiating at least the second gap with an electron beam from electron emitting means disposed apart from the electrically conductive member in an atmosphere comprising a carbon compound.

Abstract: A relatively small ESD protection diode is formed on the same chip as a light emitting diode. In one embodiment, the ESD diode is a mesa-type diode isolated from the light emitting diode by a trench. To reduce the series resistance of the ESD diode, the PN junction and metal contact to the semiconductor material is made long and expands virtually the width of the chip. Various configurations of the PN junction and the N and P metal contacts for the ESD diode are described for increasing the breakdown voltage and for improved testing.

Abstract: The reduction in size, noise and voltage is realized in a MOS solid-state imaging device. A gate electrode in a pixel part is formed in a two-level structure. An amplifier gate of an amplifier transistor is formed in the first level while a select gate of a select transistor is formed in the second level. The both are structurally partly overlapped. With the first-level amplifier gate as self-alignment, ions are implanted for a select gate in the second level. Although the gate electrode if formed in one level as in the conventional requires a space of nearly a design rule between the amplifier gate and the select gate, the structure of the invention can eliminate such a dead space. Meanwhile, because the diffusion layer does not exist between the amplifier gate and the select gate, the diffusion layer is eliminated of sheet resistance and voltage drop.

Abstract: To provide a semiconductor device, such as semiconductor laser, having no need of complicated process, ensuring a high yield and mass-productivity necessary for cost reduction, and exhibiting excellent initial characteristics and reliability, nitride semiconductor layers containing a plurality of group III elements are formed on a base body surface having recess (opening) such that the nitride semiconductor layer varies in at least one of composition ratio of the group III elements, band gap energy, refractive index, electrical conductivity and specific resistance within the layer in response to the recess of the base body. In addition, by heating the structure in an atmosphere containing hydrogen and using a layer containing Al as an etching stop layer, controllability and production yield can be improved without influences from fluctuation in etching depth, or the like. Further, etching and re-growth can be conducted consecutively to provide an inexpensive process.

Abstract: A light-emitting package includes a substantially transparent substrate having a first surface and a second surface including a lens. The package also includes a light-emitting diode (LED) adapted to emit light having a predetermined wavelength, the LED being secured over the first surface of the substantially transparent substrate. The second surface of the substrate defines a principal light emitting surface of the package. The lens at the second surface has a grating pattern that matches the predetermined wavelength of the light emitted from the LED for controlling the emission geometry of the light emitted by the package. The grating pattern has a radial configuration including a series of circles that are concentric.

Abstract: A system that provides packaging for a surface acoustic wave filter in such a way that the surface acoustic wave filter is capable of integration with a number of additional electronic devices on an integrated substrate. The surface acoustic wave filter is mounted in a “flip chip” configuration that enables the surface of the surface acoustic wave filter to be protected from a molding compound during and after the encapsulation of the surface acoustic wave filter and other circuitry contained on the integrated substrate. The manner in which the surface acoustic wave filter is packaged provides a great reduction in cost and occupied real estate on the integrated substrate, in that, the surface acoustic wave filter is mounted in such as way as not to require conventionally used ceramic packaging that encases the surface acoustic wave filter. An air gap is preserved between the surface acoustic wave filter side of the surface acoustic wave filter and the integrated substrate on which it is mounted.

Abstract: The present invention discloses a method for producing a high brightness LED (light emitting diode). The method primarily comprises steps of: a) providing a temporary substrate for epitaxy; b) forming LED epitaxial layers on said temporary substrate, wherein said LED epitaxial layers with pn junction; c) providing a permanent substrate; d) forming a layered structure between said permanent substrate and said LED epitaxial layers, wherein said layered structure has properties of reflection, adhesion, diffusion barrier and buffer; and e) forming a first electrode and a second electrode on proper position to supply enough energy for said LED epitaxial layers. The LED manufactured in accordance with the present invention can exhibit high brightness and excellent mechanical strength during manufacturing.

Abstract: A light emitting diode is composed of a generally T-shaped body section (36) and a resin forming section (37) projected on a front surface of the body section (36). The body section (36) has an upright portion (32) inserted into a hole (51) provided in a motherboard (50) and base portions (31a and 31b) which extend from the upright portion and which are mounted on a peripheral edge of the hole (51). The resin forming section (37) includes a non-translucent frame (40) extending from a front surface of the upright portion (32) and an extension part (41) further projecting forwardly larger than the frame. The extension part (41) has a mounted portion (42) mounted on the peripheral edge of the hole (51) of the motherboard (50). Mounted in the concave portion (44) provided in the frame (40) is a light emitting diode element (34), which is sealed by a sealing body (45) of a translucent resin.

Abstract: The invention relates to a method for producing an optical transmitting and receiving device (1, 1a) comprising a light emitting transmission element (3, 3a) and a receiving element (4, 4a) which converts this light into an electrical magnitude. The transmission and receiving elements are inserted into a silicon substrate. The optical transmitting and receiving device (1) is preferably inserted in a monolithic manner into a common substrate, comprising a sequence of superimposed layers for the light emitting transmission element (3) and the light receiving element (4). An electrically insulating intermediate layer (9, 9a) is incorporated between the transmission and receiving element.

Abstract: Methods for patterning a metal over a substrate and devices formed using the methods are disclosed. A patterned die having at least one raised portion and having a metal layer over the die is pressed onto a thin metal film over a substrate, such that the metal layer over the raised portion of the patterned die contacts portions of the thin metal film. Pressure is then applied such that the metal layer and the thin metal film cold-weld to one another. The patterned die is removed, such that the portions of the metal layer cold-welded to the thin metal film break away from the die and remain cold-welded to the thin metal film over the substrate, in substantially the same pattern as the patterned die.

Abstract: The present invention provides a method and associated structure for forming an electrostatically-doped carbon nanotube device. The method includes providing a carbon nanotube having a first end and a second end. The method also includes disposing a first metal contact directly adjacent to the first end of the carbon nanotube, wherein the first metal contact is electrically coupled to the first end of the carbon nanotube, and disposing a second metal contact directly adjacent to the second end of the carbon nanotube, wherein the second metal contact is electrically coupled to the second end of the carbon nanotube.

Abstract: The invention relates to a method of producing an electronic unit of a radio system and an electronic unit of a radio system. The electronic unit comprises a mechanical part, a circuit board attached to the mechanical part and an electronic component connected to the circuit board. The method comprises mounting (1702) the electronic component in a cavity provided for the electronic component in the mechanical part; placing (1704) the circuit board on the electronic component and the mechanical part; connecting (1706) the electronic component and the circuit board together using electric coupling members for aligning them with respect to each other and for forming an electrical connection between electric connecting means of the circuit board and electric connecting means of the electronic component; and attaching (1708) the electronic component and the circuit board to each other and to the mechanical part automatically so that the electronic component will be in contact with the mechanical part.

Abstract: Methods for fabricating a conductive contact (through-via) through a full thickness of a substrate such as a semiconductor wafer or interposer substrate, and semiconductor devices and systems incorporating the conductive through-via are provided. The conductive contact is fabricated by applying a metal layer onto a backside of a substrate, forming a through-hole through the substrate and the metal layer, sealing the hole in the metal layer by an electroless plating process, and filling the hole by an electroplating or an electroless plating process.

Abstract: A chip and a chip package can transmit information to each other by using a set of converters capable of communicating with each other through the emission and reception of electromagnetic signals. Both the chip and the chip package have at least one such converter physically disposed on them. Each converter is able to (1) convert received electromagnetic signals into electronic signals, which it then may relay to leads on the device on which it is disposed; and (2) receive electronic signals from leads on the device on which it is disposed and convert them into corresponding electromagnetic signals, which it may transmit to a corresponding converter on the other device. Not having a direct physical connection between the chip and the chip package decreases the inductive and capacitive effects commonly experienced with physical bonds.

Abstract: This invention describes new LEDs having light extraction structures on or within the LED to increase its efficiency. The new light extraction structures provide surfaces for reflecting, refracting or scattering light into directions that are more favorable for the light to escape into the package. The structures can be arrays of light extraction elements or disperser layers. The light extraction elements can have many different shapes and are placed in many locations to increase the efficiency of the LED over conventional LEDs. The disperser layers provide scattering centers for light and can be placed in many locations as well. The new LEDs with arrays of light extraction elements are fabricated with standard processing techniques making them highly manufacturable at costs similar to standard LEDs. The new LEDs with disperser layers are manufactured using new methods and are also highly manufacturable.

Abstract: The disclosure is directed toward an optical excitation/detection device that includes an arrayed plurality of photodetectors and discrete photoemitters, as well as a method for making such a device. A CMOS fabricated photodetector array includes an arrayed plurality of photoreceptor areas and photoemitter areas, wherein each photoreceptor area includes a CMOS integrated photoreceptor and each photoemitter area includes at least two buried electric contact pads. The CMOS array is selectively etched back at the locations of the photoemitter areas for regions to reveal the buried contact pads. A plurality of discrete semiconductor photoemitter devices (such as, for example, light emitting diodes) are inserted into, and mechanically retained within, the regions of the CMOS fabricated photodetector array.

Abstract: Data is encoded in a solid state image sensor that includes a sensor pixel array by varying the color processing applied to at least some of the border pixels of the sensor pixel array. Data may be encoded in the color processing by varying the pattern of a color filter mosaic and by varying a pattern of a microlens array in accordance with a predetermined scheme. This scheme includes omission of color filter material and omission of the microlens array from selected pixels. The data, typically encoded in a binary format, is read by illuminating the sensor pixel array and by processing the output signals from the border pixels. The encoded data may include color process codes, mask revision codes and product codes.

Abstract: A light emitting device may include a light emitting layer such as an organic semiconductor material, one or more feedback structures, and a coupling structure. The one or more feedback structures may cause light emitted by the light emitting layer to be fed back through it along an axis in the plane of the device, thereby promoting the stimulated emission of light in the light emitting layer. The coupling structure couples some fraction of the feedback light out of the device. The coupled light may be emitted along an axis substantially normal to the plane of the device or at predetermined angles. The coupling and feedback structures may have a corrugated structure, a continuous variation of refractive index along an axis in the device plane, a period refractive index, or any combination thereof. The coupling and feedback structures may be separate, share common portion or combined together.

Abstract: A display unit having a sufficient luminance and a method of fabricating the display unit are provided. The display unit includes micro-sized semiconductor light emitting devices fixedly arrayed on a plane of a base body of the display unit at intervals. Micro-sized GaN based semiconductor light emitting devices formed by selective growth are each buried in a first insulating layer made from an epoxy resin except an upper end portion and a lower end surface thereof, and electrodes of each of the light emitting devices are extracted. These light emitting devices are fixedly arrayed on the upper plane of the base body at intervals. A second insulating layer made from an epoxy resin is formed on the plane of the base body so as to cover the semiconductor light emitting devices each of which has been buried in the first insulating layer.

Abstract: A method for making a semiconductor device having a pattern of highly doped regions located some distance apart in a semiconductor substrate and regions of low doping located between the highly doped regions. A diffusion barrier material is applied to the semiconductor substrate at the location of the regions of low doping by imprinting with the barrier material in the pattern of the regions of low doping. The doping material is applied after or before imprinting with barrier material so that the highly doped regions are formed essentially between the barrier material in the substrate.

Abstract: This invention relates an optoelectronic material comprising a uniform medium with a controllable electric characteristic; and semiconductor ultrafine particles dispersed in the medium and having a mean particle size of 100 nm or less, and an application device using the same.

Abstract: A method and apparatus for fabricating silica-based waveguide devices on a substrate using a low temperature PECVD process using a TEOS source material for depositing waveguide layers containing silica, the apparatus being arranged, in use, in a manner such that a liquid source material containing silicon is used during the PECVD.

Abstract: The light emitting device according to the present invention is characterized in that a gate electrode comprising plurality of conductive films is formed, and concentration of impurity regions in an active layer are adjusted with making use of selectivity of the conductive films in etching and using them as masks. The present invention reduces the number of photolithography steps in relation to manufacturing the TFT for improving yield of the light emitting device and shortening manufacturing term thereof, by which a light emitting device and an electronic appliance are inexpensively provided.

Abstract: The present invention provides a method for manufacturing an optical element to be used for an optical system and an optical instrument using the optical system, and a method for manufacturing a device using the optical instrument, wherein the optical element is manufactured by the steps including the steps for processing a high purity silica glass by lithography, and the hydrogen molecule content is adjusted after manufacturing the optical element.

Abstract: A method of fabricating a diode device, such as a PIN diode, includes forming top and bottom regions of opposite conductivity types and includes anisotropically etching into the top surface to form a pit having side walls that converge with approach to the bottom surface. However, the pit does not extend to the bottom surface. In the PIN diode embodiment, the pit terminates within an intrinsic region that separates a bottom surface diffusion region from a diffusion region along the walls of the anisotropically etched pit. The anisotropic etching approach provides a degree of self regulation with regard to the geometries of the pit. A process flow of steps is described, which allows thicker and larger diameter wafers to be used in the formation of an array of such diode device.

Abstract: A process for economical and efficient fabrication of gate electrodes no larger than 50 nm, which is beyond the limit of exposure, is characterized by gate-electrode trimming and mask trimming with high resist selectivity which are performed in combination. The process is also preferably characterized by performing trimming and drying cleaning in a vacuum environment and may also include steps of inspecting dimensions and contamination in a vacuum environment.

Abstract: The invention concerns a semiconductor opto-electronic component comprising at least two optically active structures (20, 30), at least one of which consists of a detector (30), characterized in that the detector or detectors (30) comprise a first active portion (33) able to detect a signal at a given wavelength and a second inactive portion (34) only slightly sensitive to the signal to be detected and exposed to the non-guided stray light conveyed in the component.

Abstract: A method for manufacturing an electrostatic actuator comprises a vibrating plate, an electrode plate facing the vibrating plate, and a vibrating chamber formed between the electrode plate and the vibrating plate, wherein the vibrating plate is displaced by electrostatic force, by applying voltage between the vibrating plate and the electrode plate, the method comprises: a process for forming a pressure compensating chamber communicating with the vibrating chamber; a process for forming a displacement plate at a portion of the pressure compensating chamber, displaceable according to external atmospheric pressure, into a warped form curved so as to protrude in a direction away from the facing inner wall of the pressure compensating chamber; and a process for shutting off and sealing the pressure compensating chamber from the external atmosphere, along with the vibrating chamber.

Abstract: A circuit-incorporating light receiving device includes an integrated circuit and a photodiode. The integrated circuit and the photodiode are provided on a single semiconductor substrate. The integrated circuit includes a transistor having a polycrystalline silicon as an emitter diffusion source and an electrode. Elements included in the integrated circuit are isolated from each other using local oxidization.

Abstract: A method of manufacturing a CMOS thin film transistor (TFT) active matrix organic EL device using six mask processes. The manufacturing methods is simpler than previous manufacturing methods, resulting in high manufacturing yield and low production cost.

Abstract: A method for making optoelectronic devices with interdigitated arrays of photonic devices is disclosed wherein an array of first type photonic devices and sacrificial device(s) is hybridized to a driver circuitry substrate, the sacrificial devices are removed, and an array of second type photonic devices is hybridized into the spaces left by removal of the sacrificial devices.

Abstract: As a method of fabricating aspherical microstructures, a protruding microstructure is formed on a substrate, an aspherical-profile forming layer is formed on the substrate and the protruding microstructure, and the aspherical-profile forming layer is hardened. An aspherical profile is formed on the protruding microstructure due to a surface tension of the aspherical-profile forming layer in the step of forming the aspherical-profile forming layer, and the aspherical profile is maintained through the step of hardening the aspherical-profile forming layer.

Abstract: In an optical semiconductor device including a semiconductor substrate, an active layer formed on the semiconductor substrate, a pnpn-type current blocking layer formed on a side of the active layer, and a carrier recombination layer on the semiconductor substrate on the side of the active layer, a structure of the active layer is different from a structure of the carrier recomibination layer.

Abstract: A silicon-on-insulator (SOI) device having a double gate, comprising: a supporting substrate; a first insulating layer formed over the supporting substrate; a first silicon layer formed over the first insulating layer, the first silicon layer including a first impurity region of a first conductivity disposed in a central portion thereof and intrinsic regions disposed at the both sides of the first impurity region; a second insulating layer formed over the first silicon layer; a second silicon layer formed over the second insulating layer, the second silicon layer including a second impurity region of a second conductivity disposed in a central portion thereof and third impurity regions of first conductivities disposed at the both sides of the second impurity region; a third insulating layer formed over the second impurity region; and a polysilicon layer doped with impurity ions of first conductivities, formed over the third insulating layer.

Abstract: The solid-state image sensor comprises a semiconductor substrate, a plurality of photoelectric conversion sections formed within respective isolated active regions on the semiconductor substrate, an image area wherein unit cells comprising the plurality of photoelectric conversion sections and a signal scanning circuit are arranged in a two-dimensional array form, and signal lines for reading signals from the respective unit cells within the image pick-up area, wherein the respective photoelectric conversion sections being formed by at least two ion implantations.