Including Device Responsive To Nonelectrical Signal Patents (Class 438/24)
  • Publication number: 20130049020
    Abstract: Solid state transducers with state detection, and associated systems and methods are disclosed. A solid state transducer system in accordance with a particular embodiment includes a support substrate and a solid state emitter carried by the support substrate. The solid state emitter can include a first semiconductor component, a second semiconductor component, and an active region between the first and second semiconductor components. The system can further include a state device carried by the support substrate and positioned to detect a state of the solid state emitter and/or an electrical path of which the solid state emitter forms a part. The state device can be formed from at least one state-sensing component having a composition different than that of the first semiconductor component, the second semiconductor component, and the active region. The state device and the solid state emitter can be stacked along a common axis.
    Type: Application
    Filed: August 31, 2011
    Publication date: February 28, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov
  • Publication number: 20130049016
    Abstract: Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.
    Type: Application
    Filed: August 29, 2011
    Publication date: February 28, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Scott D. Schellhammer, Vladimir Odnoblyudov, Jeremy S. Frei
  • Patent number: 8383443
    Abstract: A non-uniform gate dielectric charge for pixel sensor cells, e.g., CMOS optical imagers, and methods of manufacturing are provided. The method includes forming a gate dielectric on a substrate. The substrate includes a source/drain region and a photo cell collector region. The method further includes forming a non-uniform fixed charge distribution in the gate dielectric. The method further includes forming a gate structure on the gate dielectric.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Anderson, Andres Bryant, William F. Clark, Jr., John J. Ellis-Monaghan, Edward J. Nowak
  • Patent number: 8377762
    Abstract: An object of the invention is to improve the reliability of a light-emitting device. Another object of the invention is to provide flexibility to a light-emitting device having a thin film transistor using an oxide semiconductor film. A light-emitting device has, over one flexible substrate, a driving circuit portion including a thin film transistor for a driving circuit and a pixel portion including a thin film transistor for a pixel. The thin film transistor for a driving circuit and the thin film transistor for a pixel are inverted staggered thin film transistors including an oxide semiconductor layer which is in contact with a part of an oxide insulating layer.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: February 19, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shingo Eguchi, Yoshiaki Oikawa, Kenichi Okazaki, Hotaka Maruyama
  • Publication number: 20130039615
    Abstract: Three dimensionally integrated semiconductor systems include a photoactive device operationally coupled with a current/voltage converter on a semiconductor-on-insulator (SeOI) substrate. An optical interconnect is operatively coupled to the photoactive device. A semiconductor device is bonded over the SeOI substrate, and an electrical pathway extends between the current/voltage converter and the semiconductor device bonded over the SeOI substrate. Methods of forming such systems include forming a photoactive device on an SeOI substrate, and operatively coupling an waveguide with the photoactive device. A current/voltage converter may be formed over the SeOI substrate, and the photoactive device and the current/voltage converter may be operatively coupled with one another. A semiconductor device may be bonded over the SeOI substrate and operatively coupled with the current/voltage converter.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 14, 2013
    Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
    Inventors: Bich-Yen Nguyen, Mariam Sadaka
  • Patent number: 8368088
    Abstract: A light-emitting device and a method for manufacturing the same are provided. The light-emitting device comprises a substrate, a light-emitting element and a light-electricity-transforming element. The substrate has a first region and a second region which are non-overlapping. The light-emitting element is disposed over the substrate and located in the second region. The light-electricity-transforming element is disposed over the substrate and located in the first region. At least a portion of a side wall of the light-electricity-transforming element corresponds to at least a portion of a side wall of the light-emitting element, so that at least a side light from the light-emitting element is received and transformed into an electricity power by the light-electricity-transforming device.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: February 5, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Jing-Yi Yan, Jung-Jie Huang, Shu-Tang Yeh, Yen-Shih Huang, Hung-Chien Lin
  • Patent number: 8367438
    Abstract: An optoelectronic semiconductor component includes a semiconductor body connected to a main area of a carrier body by a solder layer, wherein sidewalls of the semiconductor body are provided with a dielectric layer, and a mirror layer applied to the dielectric layer.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: February 5, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Andreas Plöβl
  • Patent number: 8354282
    Abstract: An advanced, very high transmittance, back-illuminated, silicon-on-sapphire wafer substrate design is presented for enabling high quantum efficiency and high resolution, silicon or silicon-germanium avalanche photodiode detector arrays. The wafer substrate incorporates a stacked antireflective bilayer between the sapphire and silicon layers, comprised of single crystal aluminum nitride (AlN) and non-stoichiometric, silicon rich, amorphous silicon nitride (a-SiNX<1.33), that provides optimal refractive index matching between sapphire and silicon. A one quarter wavelength, magnesium fluoride (?/4-MgF2) antireflective layer deposited on the back surface of the thinned sapphire provides refractive index matching at the air-sapphire interface. Selecting a composition of x=0.62 for a-SiNX, tunes an optimal refractive index for the layer. Selecting design thicknesses of 52 nm for single crystal AlN, 30 nm for a-SiN0.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: January 15, 2013
    Inventor: Alvin Gabriel Stern
  • Publication number: 20130011945
    Abstract: An image displaying device having multiple photosensing devices have successfully suppressed a leakage current from each photosensing device and improved the S/N ratio. In the image displaying device, pixels and photosensing devices are disposed as pairs in a matrix pattern on a substrate. Each of the pixels and each of the photosensing devices are driven independently. Each photosensing device includes a semiconductor layer that is a photoelectric conversion layer connected to at least a first electrode and a second electrode. The contact surfaces of the first and second electrodes with respect to the semiconductor layer are disposed so that their center axes are separated from each other.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 10, 2013
    Applicants: Panasonic Liquid Crystal Display Co., Ltd., Hitachi Displays, Ltd.
    Inventors: Isao SUZUMURA, Yoshiaki Toyota
  • Patent number: 8350274
    Abstract: Provided are a light emitting device, a method for fabricating the light emitting device, a light emitting device package, and a lighting unit. The light emitting device includes a conductive support substrate, a first reflective layer on the conductive support substrate, a second reflective layer in which at least portion thereof is disposed on a side surface of the first reflective layer, a light emitting structure including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer on the first and second reflective layers, and an electrode on the light emitting structure. The second reflective layer schottky-contacts the light emitting structure.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: January 8, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hyun Kyong Cho
  • Publication number: 20120327029
    Abstract: This disclosure provides systems, methods and apparatus for touch systems. In one aspect, the touch system can include at least one light guide optically coupled to at least one light source and at least one optical detector. The light guide can be configured to transmit light from at least one light source across the surface in at least one direction and to receive at least a portion of the transmitted light reflected in an opposite direction in response to at least one reflecting object on the surface. The touch system also can include a touchscreen transceiver. The touch system can be configured to determine a location of at least one reflecting object on the surface by identifying a position of where the light guide or the touchscreen transceiver receives the reflected light and by determining time-of-flight of the transmitted light and the reflected light.
    Type: Application
    Filed: June 27, 2011
    Publication date: December 27, 2012
    Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.
    Inventor: Russel Allyn Martin
  • Patent number: 8338836
    Abstract: An AC light emitting device, in which a plurality of light emitting cells formed on a substrate are flip-bonded to a submount to be driven under an AC power source is disclosed. The light emitting device comprises a first serial array of light emitting cells, and a second serial array of light emitting cells, wherein the second serial array is connected in reverse parallel to the first serial array. Meanwhile, bonding patterns are formed on a submount substrate, and the light emitting cells of the first and second serial arrays are flip-bonded to the bonding patterns. Further, node connecting patterns are formed on the submount substrate, and connect the bonding patterns such that nodes corresponding to each other provided in the first and second serial arrays are electrically connected to each other.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: December 25, 2012
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Keon Young Lee, Dae Sung Kal
  • Patent number: 8338201
    Abstract: A method of manufacturing an organic lighting device, having a form factor substantially equal to or less than 900 square centimeters, without involving a cutting process is provided. The method includes providing one or more first substrates with a size substantially equal to the form factor. Thereafter, the method includes a high throughput first processing of the one or more first substrates and active layer deposition processing on the one or more first substrates. Further, one or more second substrates having a size substantially equal or less than the form factor are provided. Thereafter, a high throughput second processing is performed on the one or more second substrates. Finally, the method includes encapsulating at least one of the one or more first substrates with at least one of the one or more second substrates to form the organic lighting device having the form factor.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: December 25, 2012
    Assignee: Moser Baer India Limited
    Inventors: Gopalan Rajeswaran, Rajeev Jindal, Subrata Dutta
  • Publication number: 20120313113
    Abstract: A photovoltaic organic light emitting diodes (PV-OLED) device and manufacturing method thereof are introduced. The PV-OLED device includes a substrate, a solar cell module, and a plurality of organic light emitting diodes. The solar cell module is disposed on a surface of the substrate. The organic light emitting diodes are disposed on the same surface of the substrate that the solar cell module is disposed on. The organic light emitting diode is electrically isolated from the solar cell module. The solar cell module can apply power to the organic light emitting diodes for emitting light.
    Type: Application
    Filed: September 9, 2011
    Publication date: December 13, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Chih Chen, Ching-Chiun Wang, Chih-Yung Huang, Szu-Hao Chen, Chan-Hsing Lo, Chung-Ping Chiang
  • Patent number: 8319229
    Abstract: An optical semiconductor device is disclosed including an active region including an active layer and a diffraction grating having a ?/4 phase shift; passive waveguide regions each including a passive waveguide and a diffraction grating, disposed on the side of an emission facet and on the side of a rear facet sandwiching the active region between the passive waveguide regions, respectively; and an anti-reflection coating applied on the emission facet, wherein the passive waveguide region on the side of the emission facet has a length shorter than a length of the passive waveguide region on the side of the rear facet side.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: November 27, 2012
    Assignee: Fujitsu Limited
    Inventors: Tsuyoshi Yamamoto, Manabu Matsuda
  • Publication number: 20120288971
    Abstract: Disclosed are methods for co-integration of active and passive photonic devices on a planarized silicon-based photonics substrate. In one aspect, a method is disclosed that includes providing a planarized silicon-based photonics substrate comprising a silicon waveguide structure, depositing a dielectric layer over the planarized silicon-based photonics substrate, selectively etching the dielectric layer, thereby exposing at least a portion of the silicon waveguide structure, selectively etching the exposed portion of the silicon waveguide structure to form a template, using the silicon waveguide structure as a seed layer to selectively grow in the template a germanium layer that extends above the dielectric layer, and planarizing the germanium layer to form a planarized germanium layer, wherein the planarized germanium layer does not extend above the dielectric layer.
    Type: Application
    Filed: May 8, 2012
    Publication date: November 15, 2012
    Applicants: Universiteit Gent, IMEC
    Inventors: Wim Bogaerts, Joris Van Campenhout, Peter Verheyen, Philippe Absil
  • Patent number: 8310037
    Abstract: A light emitting apparatus comprising a substrate, a first functional chip and a first light emitting component is provided. The substrate, the first functional chip, and the first light emitting component have a plurality of first bumps. In addition, the first functional chip has a plurality of first vias. The first light emitting component and the first functional chip are stacked on the substrate. Hence, the first light emitting component is electrically connected to the first functional chip and the substrate by the first vias and the first bumps.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: November 13, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Chun-Kai Liu, Yu-Lin Chao, Ming-Ji Dai
  • Patent number: 8309949
    Abstract: Optoelectronic device modules, arrays optoelectronic device modules and methods for fabricating optoelectronic device modules are disclosed. The device modules are made using a starting substrate having an insulator layer sandwiched between a bottom electrode made of a flexible bulk conductor and a conductive back plane. An active layer is disposed between the bottom electrode and a transparent conducting layer. One or more electrical contacts between the transparent conducting layer and the back plane are formed through the transparent conducting layer, the active layer, the flexible bulk conductor and the insulating layer. The electrical contacts are electrically isolated from the active layer, the bottom electrode and the insulating layer.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: November 13, 2012
    Assignee: Nanosolar, Inc.
    Inventors: James R. Sheats, Sam Kao, Martin R. Roscheisen
  • Patent number: 8304273
    Abstract: The present invention provides a method to eliminate undesired parallel conductive paths of nanogap devices for aqueous sensing. The method involves the electrical insulation of an electrode pair, except for the nanogap region wherein electrical response is measured. The magnitude of undesired ionic current in a measurement is reduced by two orders of magnitude. The process to accomplish the present invention is self-aligned and avoids fabrication complexity. The invention has a great potential in nanogap device applications.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: November 6, 2012
    Assignee: Massachusetts Institute of Technology
    Inventors: Francesco Stellacci, J Robert Barsotti, Jr., Zhang Huijuan, John Thong
  • Publication number: 20120268701
    Abstract: Disclosed is a display device provided with a photosensor, which can improve sensor sensitivity without affecting display. The display device includes: a photosensor (FS) provided in a display region (1); a visible light blocking filter (18) that blocks visible light, which is disposed on an optical path of light that enters through an image display surface and that reaches the photosensor (FS); and a wavelength conversion layer (24) that is disposed between the visible light blocking filter (18) and the photosensor (FS) and that converts light in a specific wavelength range, which includes a range outside of the visible light range, into visible light.
    Type: Application
    Filed: December 14, 2010
    Publication date: October 25, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Tadashi Nemoto, Hiromi Katoh, Christopher Brown
  • Publication number: 20120268396
    Abstract: An array substrate for an in-cell type touch sensor liquid crystal display device includes: a substrate; a gate line and a data line on the substrate; a thin film transistor connected to the gate line and the data line; a first passivation layer on the thin film transistor; a common electrode on the first passivation layer; an etching preventing pattern covering the drain contact hole; an x sensing line and a y sensing line on the common electrode; a second passivation layer on the x sensing line and the y sensing line; and a pixel electrode on the second passivation layer.
    Type: Application
    Filed: December 21, 2011
    Publication date: October 25, 2012
    Inventors: Min-Su KIM, Myeong-Sik LEE
  • Patent number: 8294160
    Abstract: A method of making a light emitting device, includes a mounting and a light emitting element on a substrate; hot-pressing a glass material on the light emitting element to form a glass sealing portion for sealing the light emitting element; and forming a phosphor layer on a surface of the glass sealing portion.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: October 23, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yoshinobu Suehiro, Seiji Yamaguchi
  • Patent number: 8288212
    Abstract: A method of fabricating a pixel structure of a thin film transistor liquid crystal display is provided. A transparent conductive layer and a first metallic layer are sequentially formed over a substrate. The first metallic layer and the transparent conductive layer are patterned to form a gate pattern and a pixel electrode pattern. A gate insulating layer and a semiconductor layer are sequentially formed over the substrate. A patterning process is performed to remove the first metallic layer in the pixel electrode pattern while remaining the gate insulating layer and the semiconductor layer over the gate pattern. A second metallic layer is formed over the substrate. The second metallic layer is patterned to form a source/drain pattern over the semiconductor layer. A passivation layer is formed over the substrate and then the passivation layer is patterned to expose the transparent conductive layer in the pixel electrode pattern.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: October 16, 2012
    Assignee: Au Optronics Corporation
    Inventors: Mao-Tsun Huang, Tzufong Huang
  • Patent number: 8283677
    Abstract: A nitride semiconductor light-emitting device includes a substrate (101) made of silicon, a mask film (102) made of silicon oxide, formed on a principal surface of the substrate (101), and having at least one opening (102a), a seed layer (104) made of GaN selectively formed on the substrate (101) in the opening (102a), an LEG layer (105) formed on a side surface of the seed layer (104), and an n-type GaN layer (106), an active layer (107), and a p-type GaN layer (108) which are formed on the LEG layer (105). The LEG layer (105) is formed by crystal growth using an organic nitrogen material as a nitrogen source.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: October 9, 2012
    Assignee: Panasonic Corporation
    Inventors: Toshiyuki Takizawa, Tetsuzo Ueda, Manabu Usuda
  • Publication number: 20120235040
    Abstract: Provided is a photoconductive element which solves a problem inherent in an element for generating/detecting a terahertz wave by photoexcitation that terahertz wave generation efficiency is limited by distortions and defects of a low temperature grown semiconductor. The photoconductive element includes: a semiconductor substrate; a semiconductor low temperature growth layer; and a semiconductor layer, which is positioned between the semiconductor low temperature growth layer and the semiconductor substrate and is thinner than the semiconductor low temperature growth layer, in which the semiconductor low temperature growth layer includes a semiconductor which lattice-matches with the semiconductor layer and does not lattice-match with the semiconductor substrate.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 20, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Toshihiko Ouchi, Kousuke Kajiki
  • Publication number: 20120235120
    Abstract: A vertical electro-optical component and a method for forming the same are provided. The vertical electro-optical component includes a substrate, a first electrode layer formed on the substrate, a patterned insulating layer formed on the first electrode layer, a metal layer formed on the patterned insulating layer, a semiconductor layer formed on the first electrode layer, and a second electrode layer formed on the semiconductor layer, wherein the semiconductor layer encapsulates the patterned insulating layer and the metal layer. The vertical electro-optical component thus has a low operational voltage of a vertical transistor and a high reaction speed of a photo diode, and may be used to form light-emitting transistors.
    Type: Application
    Filed: May 19, 2011
    Publication date: September 20, 2012
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Hsiao-Wen Zan, Hsin-Fei Meng, Wu-Wei Tsai, Yu-Chiang Chao
  • Patent number: 8263986
    Abstract: Quantitative understanding of neural and biological activity at a sub-millimeter scale requires an integrated probe platform that combines biomarker sensors together with electrical stimulus/recording sites. Optically addressed biomarker sensors within such an integrated probe platform allows remote interrogation from the activity being measured. Monolithic or hybrid integrated silicon probe platforms would beneficially allow for accurate control of neural prosthetics, brain machine interfaces, etc as well as helping with complex brain diseases and disorders. According to the invention a silicon probe platform is provided employing ultra-thin silicon in conjunction with optical waveguides, optoelectronic interfaces, porous filter elements, and integrated CMOS circuitry. Such probes allowing simultaneously analysis of both neural electrical activities along with chemical activity derived from multiple biomolecular sensors with porous membrane filters.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: September 11, 2012
    Assignee: The Royal Institution for the Advancement of Learning/McGill University
    Inventors: Mohamad Hajj-Hassan, Vamsy Chodavarapu, Sam Musallam
  • Patent number: 8258593
    Abstract: An image sensor and a method of manufacturing the same. An image sensor may include a first interlayer dielectric layer having a first metal wiring and/or a bonding silicon including impurity regions on and/or over a first interlayer dielectric layer. An image sensor may include a second interlayer dielectric layer formed on and/or over a bonding silicon, and/or a first contact plug connected to a first metal wiring. An image sensor may include a third interlayer dielectric layer on and/or over a second interlayer dielectric layer, a second contact plug connected to a first impurity region and/or a second metal wiring on and/or over a second interlayer dielectric layer. An image sensor may include and a color filter layer and/or a microlens. A dielectric layer may be between a first contact plug and a first impurity region. A dielectric layer may be on and/or over a second interlayer dielectric layer.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: September 4, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ki-Jun Yun
  • Publication number: 20120213470
    Abstract: In the optical waveguide board, simultaneously with pattern formation of mirror members at arbitrary positions on a clad layer 11, guiding patterns 14 having convex shapes are formed respectively at arbitrary positions on peripheral parts of mirror patterns 13, and the mirror patterns 13 are worked into tapered shapes. Next, in a state that a mask member 100 having through holes at desired positions, and the guiding patterns 14 are guided by mating, a metal film is formed on surfaces of slope parts 22 of the mirror patterns and the guiding patterns 14. Furthermore, in a state that the guiding patterns 14 and the photomask 16 are guided, wiring core patterns 20 are formed on the clad layer 11 adjacent to the mirror patterns 13.
    Type: Application
    Filed: October 19, 2010
    Publication date: August 23, 2012
    Inventors: Yasunobu Matsuoka, Toshiki Sugawara
  • Publication number: 20120213466
    Abstract: An optocoupler device facilitates on-chip galvanic isolation. In accordance with various example embodiments, an optocoupler circuit includes a silicon-on-insulator substrate having a silicon layer on a buried insulator layer, a silicon-based light-emitting diode (LED) having a silicon p-n junction in the silicon layer, and a silicon-based photodetector in the silicon layer. The LED and photodetector are respectively connected to galvanically isolated circuits in the silicon layer. A local oxidation of silicon (LOCOS) isolation material and the buried insulator layer galvanically isolate the first circuit from the second circuit to prevent charge carriers from moving between the first and second circuits. The LED and photodetector communicate optically to pass signals between the galvanically isolated circuits.
    Type: Application
    Filed: February 17, 2011
    Publication date: August 23, 2012
    Inventors: Dusan Golubovic, Gerhard Koops, Tony Vanhoucke, Rob Van Dalen
  • Patent number: 8247243
    Abstract: Methods and devices for solar cell interconnection are provided. In one embodiment, the method includes physically alloying the ink metal to the underlying foil (hence excellent adhesion and conductivity with no pre-treatment), and by fusing the solid particles in the ink on the surface (eliminating any organic components) so that the surface is ideally suited for good conductivity and adhesion to an overlayer of finger ink, which is expected to be another adhesive. In some embodiments, contact resistance of conductive adhesives are known to be much lower on gold or silver than on any other metals.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: August 21, 2012
    Assignee: Nanosolar, Inc.
    Inventors: Jayna Sheats, Phil Stob
  • Patent number: 8247824
    Abstract: An electronic device includes a substrate. The substrate includes a first pixel driving circuit, a first conductive member, and a second conductive member. The first and second conductive members are spaced apart from each other. The first conductive member is connected to the first pixel driving circuit. The second conductive member is part of a power transmission line. The electronic device further includes a well structure overlying the substrate and defining a pixel opening, a via, and a channel. The pixel opening is connected to the via through the channel. In addition, the electronic device includes a first electronic component. The electronic component includes a first electrode that contacts the first conductive member in the pixel opening, a second electrode that contacts the second conductive member in the via, and an organic layer lying between the first and second electrodes.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: August 21, 2012
    Inventors: Matthew Stainer, Matthew Stevenson, Stephen Sorich
  • Patent number: 8247823
    Abstract: A light-emitting element includes a semiconductor laminated structure including a first semiconductor layer, a light-emitting layer and a second semiconductor layer, an insulation layer provided on the semiconductor laminated structure, a first wiring including a first vertical conducting portion and a first planar conducting portion and being electrically connected to the first semiconductor layer, the first vertical conducting portion extending inside the insulation layer, the light-emitting layer and the second semiconductor layer in a vertical direction and the first planar conducting portion extending inside the insulation layer in a planar direction, and a second wiring including a second vertical conducting portion and a second planar conducting portion and being electrically connected to the second semiconductor layer, the second vertical conducting portion extending inside the insulation layer in a vertical direction and the second planar conducting portion extending inside the insulation layer in a
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: August 21, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Kosuke Yahata, Naoki Nakajo, Masao Kamiya
  • Patent number: 8243770
    Abstract: Emissive quantum photonic imagers comprised of a spatial array of digitally addressable multicolor pixels. Each pixel is a vertical stack of multiple semiconductor laser diodes, each of which can generate laser light of a different color. Within each multicolor pixel, the light generated from the stack of diodes is emitted perpendicular to the plane of the imager device via a plurality of vertical waveguides that are coupled to the optical confinement regions of each of the multiple laser diodes comprising the imager device. Each of the laser diodes comprising a single pixel is individually addressable, enabling each pixel to simultaneously emit any combination of the colors associated with the laser diodes at any required on/off duty cycle for each color. Each individual multicolor pixel can simultaneously emit the required colors and brightness values by controlling the on/off duty cycles of their respective laser diodes.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: August 14, 2012
    Assignee: Ostendo Technologies, Inc.
    Inventors: Hussein S. El-Ghoroury, Robert G. W. Brown, Dale A. McNeill, Huibert DenBoer, Andrew J. Lanzone
  • Patent number: 8237177
    Abstract: In a silicon-based light emitting diode-photodiode (LED-PD) arrangement, the LED is implemented as an avalanche LED (ALED) and the ALED and PD are integrated into a common integrated circuit. The ALED is formed around a cross-shaped PD and is separated from the PD by a deep trench region. In order to create current crowding close to the deep trench the ALED includes an NBL or PBL having a narrowing at its end.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: August 7, 2012
    Assignee: National Semiconductor Corporation
    Inventor: Vladislav Vashchenko
  • Patent number: 8236582
    Abstract: Light emitting diode (LED) structures are fabricated in wafer scale by mounting singulated LED dies on a carrier wafer or a stretch film, separating the LED dies to create spaces between the LED dies, applying a reflective coating over the LED dies and in the spaces between the LED dies, and separating or breaking the reflective coating in the spaces between the LED dies such that some reflective coating remains on the lateral sides of the LED die. Portions of the reflective coating on the lateral sides of the LED dies may help to control edge emission.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: August 7, 2012
    Assignees: Philips Lumileds Lighting Company, LLC, Koninklijke Philips Electronics N.V.
    Inventors: James G. Neff, Serge J. Bierhuizen, John E. Epler
  • Publication number: 20120175644
    Abstract: Embodiments of displays with embedded MEMS sensors and related methods are described herein. Other embodiments and related methods are also disclosed herein.
    Type: Application
    Filed: July 27, 2011
    Publication date: July 12, 2012
    Applicant: Arizona Board of Regents, Acting for and on behalf of Arizona State University
    Inventors: Sameer M. Venugopal, Narendra V. Lakamraju
  • Publication number: 20120154812
    Abstract: The present invention relates to a sensor device. More particularly, the invention relates to a CMOS-based micro-optical-electromechanical-sensor (MOEMS) device with silicon light emitting devices, silicon waveguides and silicon detectors being fabricated using current Complementary Metal Oxide Semiconductor (CMOS) technology or Silicon on Insulator (SOI) technology. According to the invention there is provided a sensor comprising: a Silicon-based light emitting structure; an integrated electro-optical mechanical interface structure that is capable to sense mechanical deflections; an integrated electronic driving and processing circuitry so as to detect physical parameters such as vibration, motion, rotation, acceleration.
    Type: Application
    Filed: June 15, 2010
    Publication date: June 21, 2012
    Applicant: Tshwane University of Technology
    Inventor: Lukas Willem Snyman
  • Publication number: 20120154335
    Abstract: A photoelectric element including a transparent bottom electrode, a photosensitive layer, a first electrode, a second electrode and a transparent top electrode is provided. The photosensitive layer is located above the transparent bottom electrode. The first electrode and the second electrode are disposed on the photosensitive layer. The transparent top electrode is located above the photosensitive layer.
    Type: Application
    Filed: December 20, 2010
    Publication date: June 21, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Isaac Wing-Tak Chan
  • Publication number: 20120154810
    Abstract: An agent sensing system may comprise an emitter optical resonator, a functionalized optical resonator, and a reference optical resonator. The emitter optical resonator may be configured to emit light at one or more system peak wavelengths. The functionalized optical resonator may be optically coupled to the emitter optical resonator and configured to propagate the emitted light in the absence of a particular agent, and filter the emitted light in the presence of the particular agent. The reference optical resonator may be optically coupled to at least one of the emitter optical resonator and the functionalized optical resonator such that an intensity of light propagated by the reference optical resonator is based at least on whether light emitted by the emitter optical resonator is filtered or propagated by the functionalized optical resonator.
    Type: Application
    Filed: July 15, 2009
    Publication date: June 21, 2012
    Inventors: Frank B. Jaworski, Anuradha M. Agarwal
  • Patent number: 8198118
    Abstract: A mask and method for forming the same including carrying out a photolithographic patterning process the method including providing a substantially light transparent portion; forming a substantially light shielding layer disposed over the substantially light transparent portion; forming at least one barrier layer disposed over the substantially light shielding layer; forming a resist layer disposed over the at least one barrier layer; patterning the resist layer for producing a circuitry pattern; and, carrying out an etching process according to the circuitry pattern to expose a portion of the substantially light transparent portion to form a mask.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: June 12, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co.
    Inventors: Ken Wu, Hung-Chang Hsieh, Chang-Cheng Hung, Luke Hsu, Ren-Guey Hsieh, Hsin-Chang Lee, Chia-Jen Chen
  • Publication number: 20120127413
    Abstract: An LCD device includes a substrate including an active region and a dummy region; gate and data lines disposed on the substrate crossing each other to define a plurality of pixel regions in the active region; a pixel electrode disposed in each of the plural pixel regions; a common electrode which is patterned in the active region to define common electrode pattern portions, respective common electrode pattern portions and the pixel electrodes each forming an electric field; a first sensing line disposed on the common electrode and electrically connected with the common electrode to sense a user's touch; and at least one dummy electrode disposed in the dummy region adjacent one of the common electrode pattern portions.
    Type: Application
    Filed: September 22, 2011
    Publication date: May 24, 2012
    Inventors: Hee Sun SHIN, Kum Mi Oh, Han Seok Lee
  • Patent number: 8183065
    Abstract: An LED chip package structure with high-efficiency light emission by rough surfaces includes a substrate unit, a light-emitting unit, and a package colloid unit. The substrate unit has a substrate body, and a positive electrode trace and a negative electrode trace respectively formed on the substrate body. The light-emitting unit has a plurality of LED chips arranged on the substrate body. Each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with the positive electrode trace and the negative electrode trace of the substrate unit. The package colloid unit has a plurality of package colloids respectively covering the LED chips. Each package colloid has a cambered colloid surface and a light-emitting colloid surface respectively formed on its top surface and a lateral surface thereof.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: May 22, 2012
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Shih-Yu Wu, Wen-Kuei Wu
  • Publication number: 20120120978
    Abstract: An optoelectronic (OE) package or system and method for fabrication is disclosed which includes a silicon layer with a wiring layer. The silicon layer has an optical via for allowing light to pass therethrough. An optical coupling layer is bonded to the silicon layer, and the optical coupling layer includes a plurality of microlenses for focusing and or collimating the light through the optical via. One or more first OE elements are coupled to the silicon layer and electrically communicating with the wiring. At least one of the first OE elements positioned in optical alignment with the optical via for receiving the light. A second OE element embedded within the wiring layer. A carrier may be interposed between electrical interconnect elements and positioned between the wiring layer and a circuit board.
    Type: Application
    Filed: January 26, 2012
    Publication date: May 17, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Russell A. Budd, Paul Fortier, Frank R. Libsch
  • Patent number: 8169046
    Abstract: A light emitting diode (LED) includes a substrate, a temperature detecting pattern, and a semiconductor structure. The temperature detecting pattern is formed on the substrate. Then the semiconductor structure is formed on the temperature detecting pattern and the substrate. The semiconductor structure includes an n-type semiconductor layer, a p-type semiconductor layer, and an active layer. Per above-mentioned structural design, the temperature detecting pattern directly integrated into the LED can measure the actual temperature of PN junction with high precision.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: May 1, 2012
    Assignees: Silitek Electronic (Guangzhou) Co., Ltd., Lite-On Technology Corporation
    Inventor: Chen-Yu Chen
  • Patent number: 8158987
    Abstract: A transparent-substrate light-emitting diode (10) has a light-emitting layer (133) made of a compound semiconductor, wherein the area (A) of a light-extracting surface having formed thereon a first electrode (15) and a second electrode (16) differing in polarity from the first electrode (15), the area (B) of a light-emitting layer (133) formed as approximating to the light-extracting surface and the area (C) of the back surface of a light-emitting diode falling on the side opposite the side for forming the first electrode (15) and the second electrode (16) are so related as to satisfy the relation of A>C>B. The light-emitting diode (10) of this invention, owing to the relation of the area of the light-emitting layer (133) and the area of the back surface (23) of the transparent substrate and the optimization of the shape of a side face of the transparent substrate (14), exhibits high brightness and high exoergic property never attained heretofore and fits use with an electric current of high degree.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: April 17, 2012
    Assignee: Showa Denko K.K.
    Inventors: Wataru Nabekura, Ryouichi Takeuchi
  • Patent number: 8153456
    Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: April 10, 2012
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Atul Gupta, Nicholas P. T. Bateman
  • Patent number: 8148179
    Abstract: A hermetically sealed glass package and method for manufacturing the hermetically sealed glass package are described herein using an OLED display as an example. In one embodiment, the hermetically sealed glass package is manufactured by providing a first substrate plate and a second substrate plate. The second substrate contains at least one transition or rare earth metal such as iron, copper, vanadium, manganese, cobalt, nickel, chromium, neodymium and/or cerium. A sensitive thin-film device that needs protection is deposited onto the first substrate plate. A laser is then used to heat the doped second substrate plate in a manner that causes a portion of it to swell and form a hermetic seal that connects the first substrate plate to the second substrate plate and also protects the thin film device.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: April 3, 2012
    Assignee: Corning Incorporated
    Inventors: Bruce G. Aitken, Paul S. Danielson, James E. Dickinson, Jr., Stephan L. Logunov, Robert Morena, Mark L. Powley, Kamjula P. Reddy, Joseph F. Schroeder, III, Alexander Streltsov
  • Patent number: 8148185
    Abstract: A method for fabricating an active device array substrate is provided. First, a substrate having a display area and a sensing area is provided. Then, a first patterned conductor layer is formed on the display area of the substrate. A gate insulator is formed on the substrate. A patterned semiconductor layer, a second patterned conductor layer and a patterned photosensitive dielectric layer are formed on the gate insulator, wherein the second patterned conductor layer includes a source electrode, a drain electrode and a lower electrode, the patterned photosensitive dielectric layer covering the second patterned conductor layer includes an interface protection layer disposed on the source electrode and the drain electrode and a photo-sensing layer disposed on the lower electrode. A passivation layer is then formed on the substrate. After that, a third patterned conductor layer including a pixel electrode and an upper electrode is formed on the passivation layer.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: April 3, 2012
    Assignee: Au Optronics Corporation
    Inventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Ching-Chieh Shih, An-Thung Cho
  • Publication number: 20120074301
    Abstract: An improved method and apparatus for a device with minimized optical cross-talk are provided. In one example, the device includes a filtering material selected to maximize the attenuation of signals causing cross-talk while minimizing the attenuation of desired signals.
    Type: Application
    Filed: September 28, 2010
    Publication date: March 29, 2012
    Applicant: TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS, INC.
    Inventors: MATTHEW DEAN KROESE, TODD SHANNON BISHOP