Abstract: Provided is a display panel, comprising a substrate, and a plurality of film layers sequentially disposed on the substrate. The display panel has m paths orthogonal to a surface of the substrate, and including a first path and a second path comprising different film layers. When a thickness of the film layer is set to a preset thickness and/or when a refractive index is set to a preset refractive index, the display panel allows an externally incident light to enter therein in a direction orthogonal to the surface of the substrate, and pass through the first path and the second path. A difference value between optical lengths of the first path and the second path is an integer multiple of a wavelength of the externally incident light.

Abstract: In manufacturing a radio frequency (RF) switch, a heat spreader is provided. A first dielectric is deposited over the heat spreader. A trench is etched in the first dielectric. A heating element is deposited in the trench and over at least a portion of the first dielectric. A thermally conductive and electrically insulating material is deposited over at least the heating element, where the thermally conductive and electrically insulating material is self-aligned with the heating element. A conformability support layer is optionally deposited over the thermally conductive and electrically insulating material and the first dielectric. A phase-change material is deposited over the optional conformability support layer and the underlying thermally conductive and electrically insulating material and the first dielectric.

Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. In one embodiment, a material layer is formed over a substrate and a first hard mask (HM) feature is formed over the material layer. The HM feature includes an upper portion having a first width and a lower portion having a second width which is greater than the first width. The method also includes forming spacers along sidewalls of the first HM feature, forming second HM features over the material layer by using the spacers as a first etch mask and forming patterned features in the material layer by using the second HM features as a second etch mask.

Abstract: A semiconductor device and a manufacturing method thereof are disclosed. The semiconductor device includes a silicon substrate, a spacer, a doped region, and a deep trench isolation (DTI). The silicon substrate has a deep trench. The spacer is formed on an upper portion of the sidewall of the deep trench. The doped region is formed on a lower portion of the sidewall of the deep trench. The deep trench isolation is formed in the deep trench.

Abstract: A three-dimensional graphene structure, and methods of manufacturing and transferring the same including forming at least one layer of graphene having a periodically repeated three-dimensional shape. The three-dimensional graphene structure is formed by forming a pattern having a three-dimensional shape on a surface of a substrate, and forming the three-dimensional graphene structure having the three-dimensional shape of the pattern by growing graphene on the substrate on which the pattern is formed. The three-dimensional graphene structure is transferred by injecting a gas between the three-dimensional graphene structure and the substrate, separating the three-dimensional graphene structure from the substrate by bonding the three-dimensional graphene structure to an adhesive support, combining the three-dimensional graphene structure with an insulating substrate, and removing the adhesive support.

Abstract: The present disclosure relates to a method of forming an epitaxial layer through asymmetric cyclic deposition etch (CDE) epitaxy. An initial layer growth rate of one or more cycles of the CDE process are designed to enhance a crystalline quality of the epitaxial layer. A growth rate of the epitaxial material may be altered by adjusting a flow rate of one or more silicon-containing precursors within a processing chamber wherein the epitaxial growth takes place. An etch rate may also be altered by adjusting a temperature or partial pressure of one or more vapor etchants, or the temperature within the processing chamber. In some embodiments, an initial layer thickness that is greater than a critical thickness of the epitaxial material for strain relaxation is achieved with a low growth rate, followed by a high growth rate for the remainder of epitaxial growth. Other methods are also disclosed.

Abstract: A method of forming an amorphous silicon film includes: forming a seed layer on a surface of a base by heating the base and supplying an amino silane-based gas to the heated base, forming the amorphous silicon film with thickness for layer growth on the seed layer by heating the base and supplying a silane-based gas containing no amino group to the seed layer on the surface of the heated base, and decreasing a film thickness of the amorphous silicon film by etching the amorphous silicon film formed with thickness for layer growth.

Abstract: A method of forming an amorphous silicon film includes: forming a seed layer on a surface of a base by heating the base and supplying an amino silane-based gas to the heated base, forming the amorphous silicon film with thickness for layer growth on the seed layer by heating the base and supplying a silane-based gas containing no amino group to the seed layer on the surface of the heated base, and decreasing a film thickness of the amorphous silicon film by etching the amorphous silicon film formed with thickness for layer growth.

Abstract: In the frame of manufacturing a photovoltaic cell a layer (3) of silicon compound is deposited on a structure (1). The yet uncovered surface (3a) is treated in a predetermined oxygen (O2) containing atmosphere which additionally contains a dopant (D). Thereby, the silicon compound layer is oxidized and doped in a thin surface area (5).

Abstract: A method of selectively growing a plurality of semiconductor carbon nanotubes using light irradiation. The method includes disposing a plurality of nanodots, which include a catalyst material, on a substrate; growing a plurality of carbon nanotubes from the plurality of nanodots, and irradiating light onto the nanodot to selectively grow the plurality of semiconductor carbon nanotubes.

Abstract: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Abstract: Improved methods and apparatus for forming thin-film layers of chalcogenide on a substrate web. Solutions containing the reactants for the chalcogenide layer may be contained substantially to the front surface of the web, controlling the boundaries of the reaction and avoiding undesired deposition of chalcogenide upon the back side of the web.

Abstract: Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.

Abstract: A method for treating semiconducting materials includes providing a semiconducting material having a crystalline structure, pre-heating a portion of the semiconducting material to a temperature less than the melting temperature of the semiconducting material, and then cooling the semiconducting material prior to exposing at least the portion of the semiconducting material to a heat source to create a melt pool, and cooling the semiconducting material.

Abstract: There is provided a method for continual preparation of granular polycrystalline silicon using a fluidized bed reactor, enabling a stable, long-term operation of the reactor by effective removal of silicon deposit accumulated on the inner wall of the reactor tube. The method comprises (i) a silicon particle preparation step, wherein silicon deposition occurs on the surface of the silicon particles, while silicon deposit is accumulated on the inner wall of the reactor tube encompassing the reaction zone; (ii) a silicon particle partial discharging step, wherein a part of the silicon particles remaining inside the reactor tube is discharged out of the fluidized bed reactor so that the height of the bed of the silicon particles does not exceed the height of the reaction gas outlet; and (iii) a silicon deposit removal step, wherein the silicon deposit is removed by supplying an etching gas into the reaction zone.

Abstract: Aspects of the invention are directed to laser patterning apparatus capable of performing laser patterning on a thin film formed on a flexible substrate with a good yield and a laser patterning method thereof. The thin film formed on the flexible substrate can be patterned by laser using a laser patterning apparatus that can include a processing stage that has a reference processing surface on which the flexible substrate having the thin film formed thereon is disposed, a wrinkle removing device that is configured as a mechanism for stretching an outer periphery of a processing region of the flexible substrate so that tension is applied outward in the width direction and forward and backward in the transporting direction, and a laser scanner that scans a predetermined line of the thin film formed on the flexible substrate while emitting a laser beam thereto.

Abstract: A device for generating sprays of charged droplets, and resulting nanoparticles, the device comprising a first needle connected to an electrical potential line to generate a first spray of charged particles from the first needle, and a second needle spaced apart from and facing the first needle, and connected to an electrical line configured to ground the second needle or to apply a voltage to the second needle that is the same polarity as the voltage applied to the first needle. The device also comprising an electric field modifier connected to the first needle, and configured to modify an electrical field to generate a second spray of charged particles from the second needle.

Abstract: It is an object to provide a homogeneous semiconductor film in which variation in the size of crystal grains is reduced. Alternatively, it is an object to provide a homogeneous semiconductor film and to achieve cost reduction. By introducing a glass substrate over which an amorphous semiconductor film is formed into a treatment atmosphere set at more than or equal to a temperature that is needed for crystallization, rapid heating due to heat conduction from the treatment atmosphere is performed so that the amorphous semiconductor film is crystallized. More specifically, for example, after the temperature of the treatment atmosphere is increased in advance to a temperature that is needed for crystallization, the substrate over which the semiconductor film is formed is put into the treatment atmosphere.

Abstract: There is provided a method for producing an a-IGZO oxide thin film by sputtering, which can control the carrier density of the film to a given value with high reproducibility. The method is an amorphous In—Ga—Zn—O based oxide thin film production method including: providing a sintered oxide material consisting essentially of indium (In), gallium (Ga), zinc (Zn), and oxygen (O) as constituent elements, wherein the ratio [In]/([In]+[Ga]) of the number of indium atoms to the total number of indium and gallium atoms is from 20% to 80%, the ratio [Zn]/([In]+[Ga]+[Zn]) of the number of zinc atoms to the total number of indium, gallium and zinc atoms is from 10% to 50%, and the sintered oxide material has a specific resistance of 1.0×10?1 ?cm or less; and producing a film on a substrate by direct current sputtering at a sputtering power density of 2.5 to 5.5 W/cm2 using the sintered oxide material as a sputtering target.

Abstract: A method of treating a sheet of semiconducting material comprises forming a sinterable first layer over each major surface of a sheet of semiconducting material, forming a second layer over each of the first layers to form a particle-coated semiconductor sheet, placing the particle-coated sheet between end members, heating the particle-coated sheet to a temperature effective to at least partially sinter the first layer and at least partially melt the semiconducting material, and cooling the particle-coated sheet to solidify the semiconducting material and form a treated sheet of semiconducting material.

Abstract: A semiconductor device having a highly responsive thin film transistor (TFT) with low subthreshold swing and suppressed decrease in the on-state current and a manufacturing method thereof are demonstrated. The TFT of the present invention is characterized by its semiconductor layer where the thickness of the source region or the drain region is larger than that of the channel formation region. Manufacture of the TFT is readily achieved by the formation of an amorphous semiconductor layer on a projection portion and a depression portion, which is followed by subjecting the melting process of the semiconductor layer, resulting in the formation of a crystalline semiconductor layer having different thicknesses. Selective addition of impurity to the thick portion of the semiconductor layer provides a semiconductor layer in which the channel formation region is thinner than the source or drain region.

Abstract: A manufacturing method of a nitride substrate includes the steps of: preparing a ground substrate; forming a mask on the ground substrate; placing the ground substrate in a reactor, and heating the ground substrate to a temperature of 850° C. to 1100° C. In the step of heating the ground substrate, HCl and NH3 are supplied into the reactor so that partial pressure PHCl satisfies (1.5+0.0005p) kPa?PHCl?(4+0.0005p) kPa and partial pressure PNH3 satisfies (15?0.0009p) kPa?PNH3?(26?0.0017p) kPa, whereby an AlxGayIn1-x-yN crystal (0?x<1, 0<y?1) is grown, and whereby a ridge-volley structure including a plurality of ridges and valleys parallel to one another is formed. The AlxGayIn1-x-yN crystal is grown so that the ridge-valley structure is not buried while a height of the volleys from the ground substrate is allowed to exceed 2.5 (p?s).

Abstract: Methods and compositions for the deposition of ternary oxide films containing ruthenium and an alkali earth metal.

Abstract: A pattern film forming method includes a step of producing a transfer sheet in which a thin film is formed on a surface of a sheet-shaped material and a step of pressing the thin film against a pattern film formation surface of the substrate with a pressing member having convex portions corresponding to the pattern film from a reverse surface of the transfer sheet opposite to the thin film or a reverse surface of the substrate opposite to the pattern film formation surface to transfer the thin film to the substrate. A pattern film forming apparatus includes a sheet supply device, a pressing device and a substrate transport device. A high-definition pattern film having a desired pattern and a sharp edge can be formed with high productivity.

Abstract: The present invention relates to a film formation apparatus including a first transfer chamber having a roller for sending a substrate, a film formation chamber having a discharging electrode, a buffer chamber provided between the transfer chamber and the film formation chamber or between the film formation chambers, a slit provided in a portion where the substrate comes in and out in the buffer chamber, and a second transfer chamber having a roller for rewinding the substrate. The slit is provided with at least one touch roller, and the touch roller is in contact with a film formation surface of the substrate. In addition, the present invention also relates to a method for forming a film and a method for manufacturing a photoelectric conversion device that are performed by using such a film formation apparatus.

Abstract: The present invention provides methods, systems and system components for transferring, assembling and integrating features and arrays of features having selected nanosized and/or microsized physical dimensions, shapes and spatial orientations. Methods of the present invention utilize principles of ‘soft adhesion’ to guide the transfer, assembly and/or integration of features, such as printable semiconductor elements or other components of electronic devices. Methods of the present invention are useful for transferring features from a donor substrate to the transfer surface of an elastomeric transfer device and, optionally, from the transfer surface of an elastomeric transfer device to the receiving surface of a receiving substrate. The present methods and systems provide highly efficient, registered transfer of features and arrays of features, such as printable semiconductor element, in a concerted manner that maintains the relative spatial orientations of transferred features.

Abstract: A deposition method and a system are provided to deposit a CdS buffer layer on a surface of a solar cell absorber layer of a flexible workpiece from a process solution including all chemical components of the CdS buffer layer material. CdS is deposited from the deposition solution while the flexible workpiece is heated and elastically shaped by a heated shaping plate to retain the process solution on the solar cell absorber layer. The flexible workpiece is elastically shaped by pulling a back surface of the flexible workpiece into a cavity area in the heated shaping plate using an attractive force.

Abstract: Disclosed is a semiconductor light emitting device comprising a seed layer, a first conductive semiconductor layer into which the seed layer is partially inserted, a first electrode electrically connected to the first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, a second conductive semiconductor layer under the active layer, and a second electrode layer under the second conductive semiconductor layer.

Abstract: Provided is a deposited film containing microcrystalline silicon by plasma CVD, which includes changing at least one of conditions selected from a high frequency power density, a bias voltage with respect to an interelectrode distance, a bias current with respect to an electrode area, a high frequency power with respect to a source gas flow rate, a ratio of a diluting gas flow rate to a source gas flow rate, a substrate temperature, a pressure, and an interelectrode distance, between conditions for forming a deposited film of a microcrystalline region and conditions for forming a deposited film of an amorphous region; and forming a deposited film under conditions within a predetermined range in the vicinity of boundary conditions under which the crystal system of the deposited film substantially changes between a amorphous state and a microcrystalline state.

Abstract: The present invention relates to a film formation apparatus including a first transfer chamber having a roller for sending a substrate, a film formation chamber having a discharging electrode, a buffer chamber provided between the transfer chamber and the film formation chamber or between the film formation chambers, a slit provided in a portion where the substrate comes in and out in the buffer chamber, and a second transfer chamber having a roller for rewinding the substrate. The slit is provided with at least one touch roller, and the touch roller is in contact with a film formation surface of the substrate. In addition, the present invention also relates to a method for forming a film and a method for manufacturing a photoelectric conversion device that are performed by using such a film formation apparatus.

Abstract: Compositions, inks and methods for forming a patterned silicon-containing film and patterned structures including such a film. The composition generally includes (a) passivated semiconductor nanoparticles and (b) first and second cyclic Group IVA compounds in which the cyclic species predominantly contains Si and/or Ge atoms. The ink generally includes the composition and a solvent in which the composition is soluble. The method generally includes the steps of (1) printing the composition or ink on a substrate to form a pattern, and (2) curing the patterned composition or ink. In an alternative embodiment, the method includes the steps of (i) curing either a semiconductor nanoparticle composition or at least one cyclic Group IVA compound to form a thin film, (ii) coating the thin film with the other, and (iii) curing the coated thin film to form a semiconducting thin film.

Abstract: The present invention provides amorphous silicon thin-film transistors and methods of making such transistors for use with active matrix displays. In particular, one aspect of the present invention provides transistors having a structure based on a channel passivated structure wherein the amorphous silicon layer thickness and the channel length can be optimized. In another aspect of the present invention thin-film transistor structures that include a contact enhancement layer that can provide a low threshold voltage are provided.

Abstract: A method for manufacturing a silicon carbide (SiC) semiconductor device is disclosed that uses dry etching with the use of high-density inductive coupled plasma (ICP). The method employs a first dry etching and a sequential second dry etching under conditions that differ from those used in the first dry etching. The dry etch process allows a trench to be deeply etched to a depth of more than 3 ?m in a SiC laminated semiconductor substrate and allows the bottom of the trench to be flat without forming a convexo-concave shape having an acute angle which has an influence on characteristics of a breakdown voltage due to electric field concentration being caused in the bottom.

Abstract: A method for forming an underlayer composed of a GaN-based compound semiconductor is provided. In this method, at the time of epitaxial growth of an underlayer on the surface of a sapphire substrate, no gap is generated between the underlayer and the surface of the sapphire substrate. The method for forming an underlayer composed of a GaN-based compound semiconductor includes the steps of forming strip seed layers composed of a GaN-based compound semiconductor on the surface of a sapphire substrate, forming a crystal growth promoting layer composed of a GaN-based compound semiconductor on the top surfaces and both the side surfaces of the seed layers, and on the exposed surfaces of the sapphire substrate, and epitaxially growing an underlayer composed of a GaN-based compound semiconductor from the parts of the crystal growth promoting layer.

Abstract: A method is provided for fabricating integrated electronic components. According to the method, an initial structure is produced on the surface of a first substrate. This initial structure incorporates a defined pattern formed from volumes of differentiated materials. At least part of the initial substrate that includes the defined pattern is transferred onto a second substrate, preferably by inverting the first substrate against the second substrate and then removing the first substrate. An additional structure is then produced on the second substrate. This additional structure includes volumes of material placed in correspondence with some of the volumes of differentiated material of the defined pattern. The electronic components thus produced may have a suitable configuration in accordance with technological or geometrical constraints.

Abstract: A vapor deposition source including a crucible configured to hold a quantity of molten constituent material and at least one nozzle to pass vapor evaporated from the molten constituent material out of the crucible.

Abstract: A flip chip bonding method and substrate architecture are disclosed for enhancing bonding performance between a chip and a substrate by forming a bump on the chip or the substrate. The flip chip bonding method includes performing pretreatment of a wafer having chips, dicing, and obtaining the pretreated individual chip; performing pretreatment of a substrate; aligning the pads of the pretreated chip with the pads of the pretreated substrate, and bonding the chip and the substrate together by applying an ultrasonic wave and heat using a collet and simultaneously applying pressure. Post treatment is performed by filling or molding resin after bonding. The chip or the substrate is formed with a plated bump, a stud bump or a wedge bump. The stud bump or the wedge bump can be additionally formed on the plated bump.

Abstract: A circuit substrate includes a board, a plurality of metal layers and an insulator. The board has a plurality of conductive traces layers and a via formed therein. The metal layers are formed on the inner wall of the via and each of the metal layers is electrically connected to its corresponding conductive traces layer. The via is filled with the insulator so that each of the metal layers is electrically isolated from each other. In addition, this invention also provides a fabrication method of the circuit substrate.

Abstract: A method and system for cutting a wafer comprising a conductive substrate attached to an array of integrated devices includes placing the wafer on a stage such as a movable X-Y stage including a vacuum chuck having a porous mounting surface, and securing the wafer during and after cutting by vacuum pressure through the pores. The wafer is cut by directing UV pulses of laser energy at the conductive substrate using a solid-state laser. An adhesive membrane can be attached to the separated die to remove them from the mounting surface, or the die can otherwise be removed after cutting from the wafer.

Abstract: A wide-slit lateral growth projection mask, projection system, and corresponding crystallization process are provided. The mask includes an opaque region with at least one a transparent slit in the opaque region. The slit has a width in the range of 10X to 50X micrometers, with respect to a X:1 demagnification system, and a triangular-shaped slit end. The triangular-shaped slit end has a triangle height and an aspect ratio in the range of 0.5 to 5. The aspect ratio is defined as triangle height/slit width. In some aspects, the triangular-shaped slit end includes one or more opaque blocking features. In another aspect, the triangular-shaped slit end has stepped-shaped sides. The overall effect of the mask is to promote uniformly oriented grain boundaries, even in the film areas annealed under the slit ends.

Abstract: An inexpensive sheet with excellent evenness and a desired uniform thickness can be obtained by cooling a base having protrusions, dipping the surfaces of the protrusions of the cooled base into a melt material containing at least one of a metal material and a semiconductor material for crystal growth of the material on the surfaces of the protrusions. In addition, by rotating a roller having on its peripheral surface protrusions and a cooling portion for cooling said protrusions, the surfaces of the cooled protrusions can be dipped into a melt material containing at least one of a metal material and a semiconductor material for crystal growth of the material on the surfaces of the protrusions. Thus, a sheet with a desired uniform thickness can be obtained without slicing process.

Abstract: The present invention provides a cost effective and simple method of forming isolation regions, such as shallow trench isolation regions, in a semiconductor substrate that avoids etching into the trench. In the present invention, the isolation regions are formed by utilizing a selective ion implantation process that creates an oxygen implant region near the upper surface of the substrate. Upon a subsequent anneal step, the oxygen implant region is converted into an isolation region that has an upper surface that is substantially coplanar with the upper surface of the substrate.

Abstract: A semiconductor component having a metallization system that includes a multi-metal seed layer and a method for manufacturing the semiconductor component. A layer of dielectric material is formed over a lower level interconnect. A hardmask is formed over the dielectric layer and an opening is etched through the hardmask into the dielectric layer. The opening is lined with a thin conformal barrier material. A plurality of metal oxide layers are formed over the conformal barrier material. The plurality of metal oxide layers are reduced by heat treatment to form a multi-metal seed layer. An electrically conductive material is formed over the multi-metal seed layer.

Abstract: A method for testing a core power distribution system for an integrated circuit chip which includes arranging a plurality of experiments for an integrated circuit chip, performing the plurality of experiments for the integrated circuit chip over a range of frequencies over a range of power distribution system impedances, generating a schmoo diagram for each of the plurality of experiments, and analyzing the schmoo diagrams to determine whether the core power distribution system functions is acceptable at a particular frequency.

Abstract: With a conventional cylindrical can method, a region used as a film formation ground electrode is a portion of the cylindrical can, and an apparatus becomes larger in size in proportion to the surface area of the electrode. A conveyor device and a film formation apparatus having the conveyor device are provided, which have a unit for continuously conveying a flexible substrate from one end to the other end, and which are characterized in that a plurality of cylindrical rollers are provided between the one end and the other end along an arc with a radius R, the cylindrical rollers being arranged such that their center axes run parallel to each other, and that a mechanism for conveying the flexible substrate while the substrate is in contact with each of the plurality of cylindrical rollers is provided.

Abstract: A method for forming a highly activated ultra shallow ion implanted semiconductive elements for use in sub-tenth micron MOSFET technology is described. A key feature of the method is the ability to activate the implanted impurity to a highly active state without permitting the dopant to diffuse further to deepen the junction. A selected single crystalline silicon active region is first amorphized by implanting a heavy ion such as silicon or germanium. A semiconductive impurity for example boron is then implanted and activated by pulsed laser annealing whereby the pulse fluence, frequency, and duration are chosen to maintain the amorphized region just below it's melting temperature. It is found that just below the melting temperature there is sufficient local ion mobility to secure the dopant into active positions within the silicon matrix to achieve a high degree of activation with essentially no change in concentration profile.

Abstract: A novel structure for a photodiode is disclosed. It is comprised of a p-type region, which can be a p-substrate or p-well, extending to the surface of a semiconductor substrate. A multiplicity of parallel finger-like n-wells is formed in the p-type region. The fingers are connected to a conductive region at one end.

Abstract: A method of crystallizing silicon including preparing a substrate having an amorphous silicon film formed thereon, aligning a mask having a first energy region and a second energy region over a first region of the amorphous silicon film formed on the substrate, irradiating a laser beam through the first and second energy regions of the mask onto the first region of the amorphous silicon film, crystallizing the first region of the amorphous silicon film by irradiating the laser beam through the first energy region of the mask, and activating the crystallized first region by irradiating the laser beam through the second energy region.

Abstract: In a method for manufacturing an FET having a gate insulation film with an SiO2 equivalent thickness of 2 nm or more and capable of suppressing the leak current to {fraction (1/100)} or less compared with existent SiO2 films, an SiO2 film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2 film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.

Abstract: A plasma is produced in a treatment space by diffusing a plasma gas at atmospheric pressure and subjecting it to an electric field created by two metallic electrodes separated by a dielectric material, a vapor precursor is mixed with the plasma, and a substrate material is coated by vapor deposition of the vaporized substance at atmospheric pressure in the plasma field. The use of vaporized silicon-based materials, fluorine-based materials, chlorine-based materials, and organo-metallic complex materials enables the manufacture of coated substrates with improved properties with regard to moisture-barrier, oxygen-barrier, hardness, scratch- and abrasion-resistance, chemical-resistance, low-friction, hydrophobic and/or oleophobic, hydrophilic, biocide and/or antibacterial, and electrostatic-dissipative/conductive characteristics.