Responsive To Electromagnetic Radiation Patents (Class 438/57)
  • Patent number: 11362138
    Abstract: An electrically-powered device, structure and/or component is provided that includes an attached electrical power source in a form of a unique, environmentally-friendly energy harvesting element or component. The energy harvesting component provides a mechanism for generating autonomous renewable energy, or a renewable energy supplement, in the integrated circuit system, structure and/or component. The energy harvesting element includes a first conductor layer, a low work function layer, a dielectric layer, and a second conductor layer that are particularly configured in a manner to promote electron migration from the low work function layer, through the dielectric layer, to the facing surface of the second conductor layer in a manner that develops an electric potential between the first conductor layer and the second conductor layer. The energy harvesting component includes a plurality of energy harvesting elements electrically connected to one another to increase an electrical power output.
    Type: Grant
    Filed: September 7, 2020
    Date of Patent: June 14, 2022
    Assignee: FACE INTERNATIONAL CORPORATION
    Inventors: Clark D. Boyd, Bradbury R Face, Jeffrey D Shepard
  • Patent number: 11342369
    Abstract: An image sensor package may include a semiconductor wafer having a pixel array, a color filter array (CFA) formed over the pixel array, and one or more lenses formed over the CFA. A light block layer may couple over the semiconductor wafer around a perimeter of the lenses and an encapsulation layer may be coupled around the perimeter of the lenses and over the light block layer. The light block layer may form an opening providing access to the lenses. A mold compound layer may be coupled over the encapsulation layer and the light block layer. A temporary protection layer may be used to protect the one or more lenses from contamination during application of the mold compound and/or during processes occurring outside of a cleanroom environment.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: May 24, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Larry Duane Kinsman, Swarnal Borthakur, Marc Allen Sulfridge, Scott Donald Churchwell, Brian Vaartstra
  • Patent number: 11296404
    Abstract: An interface in accordance with present embodiments includes a base and a theme portion disposed on the base. A first layer is disposed on the base and includes a mixture with metallic powder suspended within a translucent medium. A second layer is disposed on the base over the first layer and over the theme portion, and includes the mixture. A third layer is disposed on the base and on the theme portion over only portions of the second layer. The third layer includes paint and paint thinner. A fourth layer is disposed on the theme portion over the third layer and exposed portions of the second layer. The fourth layer also includes the mixture.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: April 5, 2022
    Assignee: Universal City Studios LLC
    Inventors: Richard Joseph Swim, Jr., George Peter Gakoumis, Jr., Matthew Tangan Usi, Jason William Hawk, Anthony Louis Mandile, Brian Matthew Stuckey, Vanessa Rachael Luedtke, Douglas Evan Goodner
  • Patent number: 11264529
    Abstract: Provided is a solar cell and a method for manufacturing the same, the method includes: forming a doped layer on a surface of a semiconductor substrate, the doped layer having a first doping concentration of a doping element in the doped layer; depositing, on a surface of the doped layer, a doped amorphous silicon layer including the doping element; selectively removing at least one region of the doped amorphous silicon layer; performing annealing treatment, for the semiconductor substrate to form a lightly doped region having the first doping concentration and a heavily doped region having a second doping concentration in the doped layer, the second doping concentration is greater than the first doping concentration; and forming a solar cell by post-processing the annealed semiconductor substrate. The solar cell and the method for manufacturing the same simplify the manufacturing process and improve conversion efficiency of the solar cell.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: March 1, 2022
    Assignees: JINKO GREEN ENERGY (SHANGHAI) MANAGEMENT CO., LTD, ZHEJIANG JINKO SOLAR CO., LTD
    Inventors: Jie Yang, Zhao Wang, Peiting Zheng, Xinyu Zhang, Hao Jin
  • Patent number: 11256171
    Abstract: A film resist is a member for being bonded to a main surface of a substrate, which main surface is provided with a mark. The film resist includes a cutout for the mark to be checked.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: February 22, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroyuki Nakamura, Shinya Soneda, Shoichi Kuga
  • Patent number: 11178326
    Abstract: Provided is an image sensor including a pixel array including a plurality of pixels, and a micro lens array including a first micro lens of a first size provided in a first area of the pixel array and a second micro lens of a second size provided in a second area of the pixel array, the second size being different from the first size.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: November 16, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yohwan Noh, Daekwan Kim, Chaesung Kim, Tae-Shick Wang
  • Patent number: 11152410
    Abstract: An image sensor pixel comprises a semiconductor substrate and a gate having a dielectric layer with a first section and a second section over the semiconductor substrate. The first section of the dielectric layer is thinner than the second section. A photodiode is disposed substantially beneath the gate. A gate well region is disposed beneath the gate and overlying the photodiode. A first doped semiconductor region separates the gate well region from a second doped semiconductor region. The second doped semiconductor region is in the semiconductor substrate and is adjacent to the gate.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: October 19, 2021
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Khee Yong Lim, Chia Ching Yeo, Kiok Boone Elgin Quek
  • Patent number: 11107732
    Abstract: A method for processing a wide band gap semiconductor wafer is proposed. The method includes depositing a non-monocrystalline support layer at a back side of a wide band gap semiconductor wafer, depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer, and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer including at least a part of the epitaxial layer, and a remaining wafer including the non-monocrystalline support layer.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: August 31, 2021
    Assignee: Infineon Technologies AG
    Inventors: Francisco Javier Santos Rodriguez, Guenter Denifl, Tobias Franz Wolfgang Hoechbauer, Martin Huber, Wolfgang Lehnert, Roland Rupp, Hans-Joachim Schulze
  • Patent number: 11101391
    Abstract: A method for screen printing, including: by using a screen printing apparatus provided with a screen printing plate having an opening part corresponding to a printing pattern, a scraper, and a squeegee, filling a paste supplied on an upper surface of the screen printing plate into the opening part of the screen printing plate by the scraper; and, after that, pushing out the paste to a predetermined position of an object to be printed from the opening part of the screen printing plate by the squeegee to screen-print the paste corresponding to the printing pattern on the object to be printed, wherein the humidity in the screen printing apparatus is adjusted during the screen printing. As a result, by controlling an amount of moisture in the paste on the screen printing plate, a screen printing method is capable of improving the printing property of the paste.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: August 24, 2021
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Shintarou Tsukigata, Norifumi Takahashi, Hiroyuki Otsuka
  • Patent number: 11069828
    Abstract: A method for manufacturing a crystalline silicon-based solar cell includes performing a plasma treatment on a plurality of conductive single-crystalline silicon substrates in a chemical vapor deposition (CVD) chamber, each of the conductive single-crystalline silicon substrates having an intrinsic silicon-based layer on a first principal surface thereof. The first principal surface of the conductive single-crystalline silicon substrate may have a pyramidal texture that comprises a plurality of projections having a top portion, a middle portion, and a valley portion. The plasma treatment may include introducing a hydrogen gas and a silicon-containing gas into the CVD chamber and exposing a surface of the intrinsic silicon-based layer to hydrogen plasma. An amount of the hydrogen gas introduced into the CVD chamber during the plasma treatment may be 150 to 2500 times an amount of the silicon-containing gas introduced into the CVD chamber.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: July 20, 2021
    Assignee: KANEKA CORPORATION
    Inventor: Daisuke Adachi
  • Patent number: 11056521
    Abstract: An imaging device, includes: an imaging unit in which are disposed a plurality of pixels, each including a filter that is capable of changing a wavelength of light passing therethrough to a first wavelength and to a second wavelength and a light reception unit that receives light that has passed through the filter, and that captures an image via an optical system; an analysis unit that analyzes the image captured by the imaging unit; and a control unit that controls the wavelength of the light to be transmitted, by the filter based upon a result of analysis by the analysis unit.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: July 6, 2021
    Assignee: NIKON CORPORATION
    Inventor: Sota Nakanishi
  • Patent number: 11003290
    Abstract: A flexible transparent sensing film with embedded electrodes is described in the present invention, which would greatly improve the optical transmittance, electrical conductivity and reliability. The present sensing film can also simultaneously enable multiple touches for distinct locations sensing and at least another set of electrical signal sensing. The present sensing film includes a top conductive electrode, a bottom conductive electrode (140) and a dielectric substrate or a functional substrate that would generate electrical signal response due to a specific input such as motion, light, chemical, or temperature. The present sensing film apparatus could be configured to have the top and bottom conductive electrodes which are partially or fully embedded onto the surfaces of the dielectric and/or functional substrates.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: May 11, 2021
    Assignee: New Asia Group Holdings Limited
    Inventors: Chung Pui Chan, Wing Hong Choi, Lai Fan Lai, Chien Chung
  • Patent number: 10991740
    Abstract: Various embodiments of the present application are directed to a narrow band filter with high transmission and an image sensor comprising the narrow band filter. In some embodiments, the filter comprises a first distributed Bragg reflector (DBR), a second DBR, a defect layer between the first and second DBRs, and a plurality of columnar structures. The columnar structures extend through the defect layer and have a refractive index different than a refractive index of the defect layer. The first and second DBRs define a low transmission band, and the defect layer defines a high transmission band dividing the low transmission band. The columnar structures shift the high transmission band towards lower or higher wavelengths depending upon a refractive index of the columnar structures and a fill factor of the columnar structures.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: April 27, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu
  • Patent number: 10906382
    Abstract: A roof construction for a vehicle having an opening in its fixed roof, comprises at least one panel for at least closing said opening. The panel comprises a first and a second layer of glass and in between said first and second layer of glass a sheet of photo voltaic cells as a third layer. The sheet of photo voltaic cells has an active layer of a thin film of solar cell material and further has a first area which is semi-transparent and a second area which is substantially opaque.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: February 2, 2021
    Assignee: INALFA ROOF SYSTEMS GROUP B.V.
    Inventor: Sander de Bie
  • Patent number: 10812708
    Abstract: An imaging device may have an array of image sensor pixels. The array of image sensor pixels may have main pixels and reference pixels that are overlapped by optical stacks. The reference pixels may be more resistant to weathering, such as solar degradation, than the main pixels. For example, optical stacks overlapping the main pixels may include antireflection coatings, while optical stacks overlapping the reference pixels may not include antireflection coatings. Alternatively or additionally, the optical stacks overlapping the main pixels may include color filter resist formed from a first pigment, and the optical stacks overlapping the reference pixels may include color filter resist formed from a second pigment that is more resistant to weathering than the first pigment. Processing circuitry may compare outputs of the main pixels and the reference pixels to determine whether pixels in the array have been damaged.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: October 20, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Richard Scott Johnson
  • Patent number: 10763092
    Abstract: A dual-spectrum photocathode capable of emitting photo-electrons into a first vacuum space includes a first photodetector array formed using a first optoelectronic material that generates photo-electrons responsive to incident electromagnetic energy in a first spectral band. The dual-spectrum photocathode also includes a second photodetector array formed using a second optoelectronic material that generates photo-electrons responsive to incident electromagnetic energy in a second spectral band that is different from the first spectral band. The first spectral band may include the visible electromagnetic spectrum between 390 nanometers and 700 nanometers and the second spectral band may include the short-wave infrared (SWIR) electromagnetic spectrum above 900 nanometers.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: September 1, 2020
    Assignee: L-3 COMMUNICATIONS CORPORATION-INSIGHT TECHNOLOGY DIVISION
    Inventors: Jon Burnsed, Stephen Styonavich
  • Patent number: 10727367
    Abstract: A method for forming a photovoltaic device includes providing a substrate. A layer is deposited to form one or more layers of a photovoltaic stack on the substrate. The depositing of the amorphous layer includes performing a high power flash deposition for depositing a first portion of the layer. A low power deposition is performed for depositing a second portion of the layer.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: July 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Tze-Chiang Chen, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana
  • Patent number: 10644172
    Abstract: The present embodiments provide a transparent electrode having a laminate structure of: a first metal oxide layer having an amorphous structure and electroconductivity, a metal layer made of a metallic material containing silver or copper, a second metal oxide layer having an amorphous structure and electroconductivity, and a third metal oxide layer having an amorphous structure and continuity, stacked in this order.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: May 5, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naomi Shida, Katsuyuki Naito, Mitsunaga Saito, Takeshi Niimoto
  • Patent number: 10490678
    Abstract: A photoelectric conversion element includes a light guiding unit in which, on each of a first plane, a second plane, and a third plane, a first part of the light guiding unit and a second part of the light guiding unit, which is surrounded by the first part and a refractive index of which is lower than that of the first part, are included, a width of the second part on the first plane is a first length, the width of the second part on the second plane is a second length, and the width of the second part on the third plane is a third length, and the second length is shorter than each of the first length and the third length.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: November 26, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazunari Kawabata, Yusuke Onuki, Koki Takami
  • Patent number: 10490687
    Abstract: Example embodiments relate to controlling detection time in photodetectors. An example embodiment includes a device. The device includes a substrate. The device also includes a photodetector coupled to the substrate. The photodetector is arranged to detect light emitted from a light source that irradiates a top surface of the device. A depth of the substrate is at most 100 times a diffusion length of a minority carrier within the substrate so as to mitigate dark current arising from minority carriers photoexcited in the substrate based on the light emitted from the light source.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: November 26, 2019
    Assignee: Waymo LLC
    Inventors: Caner Onal, Simon Verghese, Pierre-Yves Droz
  • Patent number: 10472722
    Abstract: Provided herein are scalable photoreactors that can include a membrane-free water-splitting electrolyzer and systems that can include a plurality of membrane-free water-splitting electrolyzers. Also provided herein are methods of using the scalable photoreactors provided herein.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: November 12, 2019
    Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Kazuhiro Takanabe, Tatsuya Shinagawa
  • Patent number: 10451751
    Abstract: Provided herein are charge generating devices and methods of making and use thereof. The charge generating devices comprise a substrate having a top surface; a plurality of spaced-apart three-dimensional elements disposed on the top surface of the substrate; and a plurality of cavities formed by the plurality of spaced-apart three-dimensional elements, the plurality of cavities being the area between the plurality of spaced-apart three-dimensional elements. The charge generating devices can further comprise a radioactive layer disposed on at least a portion of the plurality of spaced-apart three-dimensional elements and the top surface such that the plurality of cavities and the top surface are substantially coated by the radioactive layer. In some examples, the charge generating devices can comprise a radiation material and/or a scintillating material disposed within at least a portion of the plurality of cavities.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: October 22, 2019
    Assignee: Ohio State Innovation Foundation
    Inventor: Lei Cao
  • Patent number: 10355038
    Abstract: A solid-state imaging device includes: a first lens layer; and a second lens layer, wherein the second lens layer is formed at least at a periphery of each first microlens formed based on the first lens layer, and the second lens layer present at a central portion of each of the first microlenses is thinner than the second lens layer present at the periphery of the first microlens or no second lens layer is present at the central portion of each of the first microlenses.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: July 16, 2019
    Assignee: Sony Corporation
    Inventors: Yoichi Ootsuka, Tomoyuki Yamashita, Kiyotaka Tabuchi, Yoshinori Toumiya, Akiko Ogino
  • Patent number: 10270000
    Abstract: A multijunction solar cell and its method of manufacture including interconnected first and second discrete semiconductor regions disposed adjacent and parallel to each other in a single semiconductor body, including first top subcell, second (and possibly third) lattice matched middle subcells; a graded interlayer adjacent to the last middle solar subcell; and a bottom solar subcell adjacent to said graded interlayer being lattice mismatched with respect to the last middle solar subcell; wherein the interconnected regions form at least a four junction solar cell by a series connection being formed between the bottom solar subcell in the first semiconductor region and the bottom solar subcell in the second semiconductor region.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: April 23, 2019
    Assignee: SolAero Technologies Corp.
    Inventor: Daniel Derkacs
  • Patent number: 10256359
    Abstract: A multijunction solar cell and its method of manufacture including interconnected first and second discrete semiconductor regions disposed adjacent and parallel to each other in a single semiconductor body, including first top subcell, second (and possibly third) lattice matched middle subcells; and a bottom solar subcell adjacent to said last middle subcell and lattice matched thereto; wherein the interconnected regions form at least a four junction solar cell by a series connection being formed between the bottom solar subcell in the first semiconductor region and the bottom solar subcell in the second semiconductor region.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: April 9, 2019
    Assignee: SolAero Technologies Corp.
    Inventor: Daniel Derkacs
  • Patent number: 10249580
    Abstract: In conventional device packages, separate standalone inductors are provided and mounted on an interposer substrate along with a die. Separate inductors reduce integration density, decrease flexibility, increase footprint, and generally increase costs. To address such disadvantages, it is proposed to provide a part of an inductor in a substrate below a die. The proposed stacked substrate inductor may include a first inductor in a first substrate, a second inductor in a second a second substrate stacked on the first substrate, and an inductor interconnect coupling the first and second inductors. The core regions of the first and second inductors may overlap with each other at least partially. The proposed stacked substrate inductor may enhance integration density, increase flexibility, decrease footprint, and/or reduce costs.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: April 2, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Daeik Daniel Kim, Changhan Hobie Yun, David Francis Berdy, Chengjie Zuo, Mario Francisco Velez, Jonghae Kim
  • Patent number: 10211243
    Abstract: A method of image sensor package fabrication includes providing an image sensor, including a pixel array disposed in a semiconductor material, and a first transparent shield adhered to the semiconductor material. The pixel array is disposed between the semiconductor material and the first transparent shield. A light blocking layer is deposited and disposed between lateral edges of the pixel array and lateral edges of the first transparent shield, and a second transparent shield is placed on the image sensor package, where the light blocking layer is disposed between the first transparent shield and the second transparent shield.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: February 19, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventors: Chia-Chun Miao, Yin Qian, Chao-Hung Lin, Chen-Wei Lu, Dyson H. Tai, Ming Zhang, Jin Li
  • Patent number: 10153310
    Abstract: A photon detection device includes a single photon avalanche diode (SPAD) disposed in a semiconductor layer. A guard ring structure is disposed in the semiconductor layer surrounding the SPAD to isolate the SPAD. A well region is disposed in the semiconductor layer surrounding the guard ring structure and disposed along an outside perimeter of the photon detection device. A contact region is disposed in the well region only in a corner region of the outside perimeter such that there is no contact region disposed along side regions of the outside perimeter. A distance between an inside edge of the guard ring structure and the contact region in the corner region of the outside perimeter is greater than a distance between the inside edge of the guard ring structure and the side regions of the outside perimeter such that an electric field distribution is uniform around the photon detection device.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: December 11, 2018
    Assignee: OmniVision Technologies, Inc.
    Inventors: Bowei Zhang, Vincent Venezia, Gang Chen, Dyson H. Tai, Duli Mao
  • Patent number: 10141466
    Abstract: Provided is a substrate for a solar cell, wherein a flat chamfered portion is formed on one corner of a silicon substrate having a square shape in a planar view, or a notch is formed on the corner or close to the corner. This invention makes it possible to easily check the position of the substrate and determine the direction of the substrate in a solar cell manufacturing step, and suppresses failures generated due to the direction of the substrate.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: November 27, 2018
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Hideo Ooiwa, Takenori Watabe, Hiroyuki Otsuka, Kazuo Hara
  • Patent number: 10109752
    Abstract: A transparent electrode can include a graphene sheet on a substrate, a layer including a conductive polymer disposed over the graphene sheet, and a plurality of semiconducting nanowires, such as ZnO nanowires, disposed over the layer including the conductive polymer.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: October 23, 2018
    Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Hyesung Park, Sehoon Chang, Jing Kong, Silvija Gradecak
  • Patent number: 10109672
    Abstract: An electrically-powered device, structure and/or component is provided that includes an attached electrical power source in a form of a unique, environmentally-friendly energy harvesting element or component. The energy harvesting component provides a mechanism for generating autonomous renewable energy, or a renewable energy supplement, in the integrated circuit system, structure and/or component. The energy harvesting element includes a first conductor layer, a low work function layer, a dielectric layer, and a second conductor layer that are particularly configured in a manner to promote electron migration from the low work function layer, through the dielectric layer, to the facing surface of the second conductor layer in a manner that develops an electric potential between the first conductor layer and the second conductor layer. The energy harvesting component includes a plurality of energy harvesting elements electrically connected to one another to increase an electrical power output.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: October 23, 2018
    Assignee: Face International Corporation
    Inventors: Clark D Boyd, Bradbury R Face, Jeffrey D Shepard
  • Patent number: 10096640
    Abstract: Certain embodiments provide a solid-state imaging apparatus including a first impurity layer, a second impurity layer, a third impurity layer, and an electrode. The first impurity layer is a photoelectric conversion layer, and is formed to have a constant depth on a semiconductor substrate. The second impurity layer is formed on a surface of the first impurity layer, to have a depth which becomes shallower toward a direction from the first impurity layer to the third impurity layer. The third impurity layer is formed in a position spaced apart from the first impurity layer and the second impurity layer on the surface of the semiconductor substrate. The electrode can transport electric charges from the first impurity layer to the third impurity layer, and is formed between the second impurity layer and the third impurity layer, on the surface of the semiconductor substrate.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: October 9, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoyuki Arai, Fumiaki Sano
  • Patent number: 9994684
    Abstract: Described is a doping technique that forms a stable amorphous silicon film and a stable polycrystalline silicon film at a low temperature and simultaneously that imparts conductivity in an atmospheric pressure environment. A method for producing a compound containing a bond between different elements belonging to Group 4 to Group 15 of the periodic table, the method including: applying, at a low frequency and atmospheric pressure, high voltage to an inside of an electric discharge tube obtained by attaching high-voltage electrodes to a metal tube or an insulator tube or between flat plate electrodes while passing an introduction gas, so as to convert molecules present in the electric discharge tube or between the flat plate electrodes into a plasma; and applying the plasma to substances to be irradiated, the substances to be irradiated being two or more elementary substances or compounds.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: June 12, 2018
    Assignee: Nissan Chemical Industries, Ltd.
    Inventors: Hitoshi Furusho, Yuki Nohara, Hisayuki Watanabe, Yuichi Goto
  • Patent number: 9985077
    Abstract: The present invention relates to a serial module of organic solar cells and the method for manufacturing the same. The structure comprises a transparent conductive layer composed by a plurality of conductive blocks, an active layer having notches on the periphery, and a metal layer composed by a plurality of metal blocks. The active layer according to the present invention is a complete layer except the notches on the periphery for exposing a portion of the transparent conductive layer. The metal blocks can contact the conductive blocks of adjacent organic solar cell via the exposure areas and thus connecting the organic solar cells in series. The present invention can improves the power generating efficiency of organic solar cells in a limited space, which is beneficial to the development of promotion of future organic solar cells.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: May 29, 2018
    Assignee: ATOMIC ENERGY COUNCIL—INSTITUTE OF NUCLEAR ENERGY RESEARCH
    Inventors: Yu-Ching Huang, De-Han Lu, Hou-Chin Cha, Cheng-Wei Chou, Chih-Min Chuang, Yeong-Der Lin, Charn-Ying Chen, Cheng-Si Tsao
  • Patent number: 9972492
    Abstract: Provided is a method of doping a substrate. The method includes providing the substrate, providing a target material on the substrate, and implanting a dopant of the target material into the substrate by providing a laser beam to the target material.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: May 15, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Moon Youn Jung, Jisu Lee
  • Patent number: 9955087
    Abstract: Photodetectors based on hydrogen-doped, single-crystalline germanium, including waveguide integrated photodetectors for photonic chip applications are provided. Hydrogen doping provides the single-crystalline germanium with increased radiation absorption in the near infrared region of the electromagnetic spectrum, including at wavelengths of 1550 nm and above.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: April 24, 2018
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Zhenqiang Ma, Munho Kim
  • Patent number: 9954121
    Abstract: Examples of the various techniques introduced here include, but not limited to, a mesa height adjustment approach during shallow trench isolation formation, a transistor via first approach, and a multiple absorption layer approach. As described further below, the techniques introduced herein include a variety of aspects that can individually and/or collectively resolve or mitigate one or more traditional limitations involved with manufacturing PDs and transistors on the same substrate, such as above discussed reliability, performance, and process temperature issues.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: April 24, 2018
    Assignee: Artilux Inc.
    Inventors: Szu-Lin Cheng, Shu-Lu Chen
  • Patent number: 9905602
    Abstract: A semiconductor device including a first material layer adjacent to a second material layer, a first via passing through the first material layer and extending into the second material layer, and a second via extending into the first material layer, where along a common cross section parallel to an interface between the two material layers, the first via has a cross section larger than that of the second via.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: February 27, 2018
    Assignee: Sony Corporation
    Inventors: Hiroshi Takahashi, Shunichi Sukegawa, Keishi Inoue
  • Patent number: 9893117
    Abstract: A pixel structure comprises an epitaxial layer (1) of a first conductivity type. A photo-sensitive element comprises a first region (4) of a second conductivity type and a second region (3) of the first conductivity type positioned between the epitaxial layer (1) and the first region (4). A charge storage node (ø2) is arranged to store charges acquired by the photo-sensitive element, or to form part of a charge storage element. A third region (2) of the second conductivity type is positioned between the charge storage node and the epitaxial layer. The pixel structure further comprises a charge-to-voltage conversion element (13) for converting charges from the charge storage node to a voltage signal and an output circuit (21, 22) for selectively outputting the voltage signal from the pixel structure.
    Type: Grant
    Filed: February 13, 2014
    Date of Patent: February 13, 2018
    Assignee: CMOSIS BVBA
    Inventors: Guy Meynants, Koen Van Wichelen
  • Patent number: 9893224
    Abstract: A system and method of patterning dopants of opposite polarity to form a solar cell is described. Two dopant films are deposited on a substrate. A laser is used to pattern the N-type dopant, by mixing the two dopant films into a single film with an exposure to the laser and/or drive the N-type dopant into the substrate to form an N-type emitter. A thermal process drives the P-type dopant from the P-type dopant film to form P-type emitters and further drives the N-type dopant from the single film to either form or further drive the N-type emitter.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: February 13, 2018
    Assignee: SunPower Corporation
    Inventors: Paul Loscutoff, Gabriel Harley
  • Patent number: 9887234
    Abstract: A complementary metal oxide semiconductor (CMOS) image sensor and a method for fabricating the same are provided. An example CMOS image sensor includes first active regions of a semiconductor substrate, where the first active regions are arranged in rows or columns. Photosensitive regions are formed in the first active regions. The CMOS image sensor also includes second active regions of the semiconductor substrate that are interposed between the first active regions. Each of the second active regions includes a device isolation region formed by doping the semiconductor substrate with impurities. Each of the second active regions also includes a channel region of a field effect transistor (FET) that is formed within the device isolation region and is configured to connect source and drain regions of the FET. At least one control gate is formed over each of the second active regions.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: February 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Min-Feng Kao, Wei-Cheng Hsu, Tzu-Jui Wang, Hsiao-Hui Tseng, Tzu-Hsuan Hsu, Jen-Cheng Liu, Jhy-Jyi Sze, Dun-Nian Yaung
  • Patent number: 9888156
    Abstract: A photoelectric conversion apparatus includes a photoelectric conversion unit having a light incident surface and including: a first electrode; a second electrode disposed further toward the light incident surface; and a photoelectric conversion layer disposed between the first and second electrodes. The photoelectric conversion apparatus includes a member in contact with the photoelectric conversion layer and constituting a light guide together with the layer. An area of a first surface parallel to the light incident surface at a portion of the photoelectric conversion layer surrounded by the member is smaller than an area of a second surface disposed between the first surface and the second electrode at a portion of the photoelectric conversion layer surrounded by the member, and an area of orthogonal projection to the light incident surface of the first electrode is smaller than an area of orthogonal projection to the light incident surface of the second surface.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: February 6, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takashi Matsuda, Sho Suzuki, Hidekazu Takahashi, Nobuhiko Sato
  • Patent number: 9884966
    Abstract: Photovoltaic devices such as solar cells, hybrid solar cell-batteries, and other such devices may include an active layer disposed between two electrodes. The active layer may have perovskite material and other material such as mesoporous material, interfacial layers, thin-coat interfacial layers, and combinations thereof. The perovskite material may be photoactive. The perovskite material may be disposed between two or more other materials in the photovoltaic device. Inclusion of these materials in various arrangements within an active layer of a photovoltaic device may improve device performance. Other materials may be included to further improve device performance, such as, for example: additional perovskites, and additional interfacial layers.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: February 6, 2018
    Assignee: Hee Solar, L.L.C.
    Inventors: Michael D. Irwin, Jerred A. Chute, Vivek V. Dhas
  • Patent number: 9881906
    Abstract: According to one embodiment, a semiconductor module includes: a substrate; a first interconnect layer provided on the substrate; a plurality of first semiconductor elements provided on the first interconnect layer, each of the first semiconductor elements having a first electrode, a second electrode, and a third electrode, and the second electrode being electrically connected to the first interconnect layer; a plurality of first rectifying elements provided on the first interconnect layer, each of the first rectifying elements having a fourth electrode and a fifth electrode, and the fifth electrode being electrically connected to the first interconnect layer; and a second interconnect layer provided on the substrate, and the second interconnect layer being electrically connected to the first electrode and the fourth electrode. The second interconnect layer includes a corrugated surface or the first interconnect layer includes a corrugated surface.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: January 30, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroshi Matsuyama
  • Patent number: 9859314
    Abstract: A curved image sensor chip has a first side and a second side opposite the first side. The second side includes light sensors configured to generate electrical signals in response to receiving light. A substrate is in contact with the first side of the curved image sensor chip and is configured to increase in volume so as to apply a bending force to form the curved image sensor chip.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: January 2, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Geoffrey P. McKnight, John J. Vajo, Jason A. Graetz
  • Patent number: 9741893
    Abstract: An amorphous-silicon photoelectric device and a fabricating method thereof are disclosed. The amorphous-silicon photoelectric device includes: a substrate; a thin-film transistor and a photosensor with the photodiode structure, which are provided at different positions on the substrate; and a contact layer; in which the contact layer is located below the photosensor, and the contact layer is partially covered by the photosensor, moreover, the contact layer and the gate-electrode layer in the thin-film transistor are provided in a same layer and of a same material. According to the technical solutions of the present disclosure, the fabricating procedure of an a-Si photoelectric device can be simplified, thereby improving the fabrication efficiency and reducing costs.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: August 22, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhenyu Xie, Xu Chen, Shaoying Xu
  • Patent number: 9698196
    Abstract: A demodulation pixel improves the charge transport speed and sensitivity by exploiting two effects of charge transport in silicon in order to achieve the before-mentioned optimization. The first one is a transport method based on the CCD gate principle. However, this is not limited to CCD technology, but can be realized also in CMOS technology. The charge transport in a surface or even a buried channel close to the surface is highly efficient in terms of speed, sensitivity and low trapping noise. In addition, by activating a majority carrier current flowing through the substrate, another drift field is generated below the depleted CCD channel. This drift field is located deeply in the substrate, acting as an efficient separator for deeply photo-generated electron-hole pairs. Thus, another large amount of minority carriers is transported to the diffusion nodes at high speed and detected.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: July 4, 2017
    Assignee: Heptagon Micro Optics Pte. Ltd.
    Inventors: Bernhard Buettgen, Jonas Felber, Michael Lehmann, Thierry Oggier
  • Patent number: 9685581
    Abstract: A manufacturing method of a solar cell having diffusion layers of different conductivity types on a front surface of a semiconductor substrate and a back surface thereof, respectively, includes a step of forming a diffusion protection mask containing impurities to cover at least a partial region of the semiconductor substrate, and a diffusion step of performing a diffusion step including a thermal step in a state where at least the partial region of the semiconductor substrate is covered with the diffusion protection mask containing impurities, forming a first-impurity diffusion layer in a first region covered with the diffusion protection mask, and forming a second-impurity diffusion layer having a different impurity concentration or a different conductivity type from that of the diffusion protection mask in a second region exposed from the diffusion protection mask.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: June 20, 2017
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Hayato Kohata
  • Patent number: 9653502
    Abstract: There is provided a solid-state imaging device including a semiconductor substrate having an effective region in which a photodiode performing a photoelectric conversion is formed and, an optical black region shielded by a light shielding film; a first film which is formed on the effective region and in which at least one layer or more of layers having a negative fixed charge are laminated; and a second film which is formed on the light shielding region and in which at least one layer or more of layers having a negative fixed charge are laminated, in which the number of layers formed in the first film is different from the number of layers formed in the second film.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: May 16, 2017
    Assignee: Sony Corporation
    Inventor: Kai Yoshitsugu
  • Patent number: 9620666
    Abstract: A diffusing agent composition including a condensation product and an impurity diffusion component. The condensation product is a reaction product resulting from hydrolysis of an alkoxysilane. The impurity diffusion component is a monoester or diester of phosphoric acid, or a mixture thereof.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: April 11, 2017
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Toshiro Morita, Takashi Kamizono