Abstract: A compound of formula (I) wherein X is aluminium, gallium or indium; each Y, which may be the same or different, is nitrogen or phosphorus; R1 and R2, which may be the same or different, are hydrogen, halogen or alkyl; and R3 to R7, which may be the same or different, are hydrogen or a saturated group, or R3 and R4, or R5 and R6 together represent a saturated divalent link thus completing a ring.

Abstract: An integrated circuit structure and a method for packaging an integrated circuit are described. The integrated structure includes an integrated circuit that is inverted and solder bump mounted to a substrate. An underfill is used to encapsulate the solder bumps and form a rigid support layer between the integrated circuit and the substrate. A heatspreader, which has larger planar dimensions than the integrated circuit, is centrally attached to an upper surface of the integrated circuit with a thermally conductive material. Lateral portions of the heatspreader extending beyond the edges of the integrated circuit are attached to the substrate and sides of the integrated circuit by a thermally conductive underfill material. The thermally conductive underfill material thus employed, among other things, provides a robust mechanical support to the heatspreader and integrated circuit structure and eliminates the need for additional support structures such as conventional stiffener rings.

Abstract: An active matrix substrate includes a line layer formed of an Al-based metal layer and a part of which is exposed through a contact hole formed in an insulating film. In the active matrix substrate, pixel electrodes are formed of an ITO film on the insulating film, and a jumper line for connecting a disconnected portion of a protect ring, a surface layer of a data line connecting pad, and a line protecting film are formed at the same time as the pixel electrodes are formed. This reduces the number of fabrication steps. The ITO film is patterned by dry etching due to reactive ion etching using a mixed gas of a hydrogen halide gas and an inert gas, with the temperatures of the center portion and peripheral portion of the substrate substantially equalized to each other.

Abstract: The invention relates to the deposition of transparent conducting thin films, such as transparent conducting oxides (TCO) such as tin doped indium oxide (ITO) and aluminum doped zinc oxide (AZO) on flexible substrates by pulsed laser deposition. The coated substrates are used to construct low cost, lightweight, flexible displays based on organic light emitting diodes (OLEDs).

Abstract: The present invention provides a method including the steps of: forming a first diffusion barrier on an insulating layer and in a contact hole; forming a conductive layer on the first diffusion barrier; forming a conductive plug in the contact hole by removing the conductive layer thereby obtaining a first recess in the contact hole, wherein the first recess is surrounded by the conductive layer in the contact hole; etching the first diffusion barrier on the insulating layer thereby forming a second recess in the contact hole, wherein a portion of the conductive plug is surrounded by the second recess and the second recess is surrounded by the insulating layer; removing the portion of the conductive plug surrounded by the second recess thereby forming a third recess in the contact hole, wherein the third recess is surrounded by the insulating layer and bottom of the of the third recess expose the first diffusion barrier and the conductive plug in the contact hole; and forming a second diffusion barrier in the

Abstract: A ZnO based oxide semiconductor layer is grown on a sapphire substrate 1 by supplying, for example, raw materials made of Zn and O constituting ZnO and a p-type dopant material made of N without supplying an n-type dopant material (a-step). By stopping the supply of the material of O and further supplying an n-type dopant material made of Ga, the semiconductor layer is doped with the p-type dopant and the n-type dopant, thereby forming a p-type ZnO layer (2a) (b-step). By repeating the steps (a) and (b) plural times, a p-type ZnO based oxide semiconductor layer is grown. As a result, N to be the p-type dopant can be doped in a stable carrier concentration also during high temperature growth in which a residual carrier concentration can be reduced, and the carrier concentration of the p-type layer made of the ZnO based oxide semiconductor can be increased sufficiently.

Abstract: The invention provides a method for forming a metal nitride film by depositing a metal oxide film on the substrate and exposing the metal oxide film to a nitrating gas to densify the metal oxide and form a metal nitride film. The metal oxide film is deposited by the decomposition of a chemical vapor deposition precursor. The nitrating step comprises exposing the metal oxide film to a thermally or plasma enhanced nitrating gas preferably comprising nitrogen, oxygen, and ammonia. The invention also provides a process for forming a liner/barrier scheme for a metallization stack by forming a metal nitride layer over the substrate by the densification of a metal oxide layer by a nitrating gas depositing a metal liner layer. Optionally, a metal liner layer may be deposited over substrate prior to the metal nitride layer to forma metal/metal nitride liner/barrier scheme.

Abstract: The invention relates to the deposition of transparent conducting thin films, such as transparent conducting oxides (TCO) such as tin doped indium oxide (ITO) and aluminum doped zinc oxide (AZO) on flexible substrates by pulsed laser deposition. The coated substrates are used to construct low cost, lightweight, flexible displays based on organic light emitting diodes (OLEDs).

Abstract: An array substrate for use in an X-ray sensing device is fabricated using an etching stopper that enables good control of the etching process and that prevents over-etch of drain electrodes and second capacitor electrodes while forming contact holes and a cutting furrow. The etching stopper is located in a tiling portion that is utilized for tiling substrates to form a large-sized X-ray detector. During fabrication, gate lines can have gate-protruded portions located near the etching stopper, and the etching stopper can have stopper-protruded portions near the gate lines. The stopper-protruded portions electrically connect to the gate-protruded portions through gate line contact holes such that the etching stopper and the gate lines have equipotentials. This can reduce static electricity damage.

Abstract: Disclosed is an ISFET comprising a H+-sensing membrane consisting of RF-sputtering a-WO3. The a-WO3/SiO2-gate ISFET of the present invention is very sensitive in aqueous solution, and particularly in acidic aqueous solution. The sensitivity of the present ISFET ranges from 50 to 58 mV/pH. In addition, the disclosed ISFET has high linearity. Accordingly, the disclosed ISFET can be used to detect effluent.

Abstract: A method is disclosed for avoiding oxidation of a bonding pad served as an electrical connection to devices mounted on a transparent insulating substrate of a thin-film transistor applied to an organic light emitting diode (OLED). Firstly, the bonding pads are defined on the transparent insulating substrate. Then, an ITO defending layer and an indium tin oxide (ITO) anode are defined simultaneously on the bonding pads and partial of the transparent insulating substrate surface, respectively. The ITO defending layer described above is provided to prevent the bonding pad from being oxidized. The oxidation upon the bonding pad is reduced, so that the conductivity thereof can be ensured.

Abstract: The present invention provides a method of forming a zinc oxide film on a conductive substrate, which comprises dipping the conductive substrate and a counter electrode in an aqueous solution containing at least nitric acid ion and zinc ion and supplying a current between these electrodes to form a zinc oxide film, wherein the aqueous solution further contains polycarboxylic acid in which a carboxyl radical is bonded to each of carbon having sp2 hybrid orbital, or its ester with a concentration of 0.5 &mgr;mol/L to 500 &mgr;mol/L. Thereby, it is possible to form in a short time a thin film having texture structure exhibiting an optical confinement effect, to prevent abnormal growth of a deposited film, and to obtain a zinc oxide thin film having excellent uniformity and adhesion on a surface thereof where the film is formed. Also, by applying the photovoltaic device to a stacked structure, it is possible to enhance the photoelectric characteristics and mass producibility.

Abstract: A thin film transistor includes a low resistance metal film covering a drain region and an interconnecting metal line disposed thereon. Covering the drain region with the low resistance metal film reduces oxidation in the drain region, and thus reduces the contact resistance between the drain region and the interconnecting metal line.

Abstract: A novel contact structure and method for a multilayer gettering contact metallization is provided utilizing a thin layer of a pure metal as the initial layer formed on a semiconductor cap layer. During formation of the contact structure, this thin metal layer reacts with the cap layer and the resulting reacted layer traps mobile impurities and self-interstitials diffusing within the cap layer and in nearby metal layers, preventing further migration into active areas of the semiconductor device. The contact metallization is formed of pure metal layers compatible with each other and with the underlying semiconductor cap layer such that depth of reaction is minimized and controllable by the thickness of the metal layers applied. Thin semiconductor cap layers, such as InGaAs cap layers less than 200 nm thick, may be used in the present invention with extremely thin pure metal layers of thickness 10 nm or less, thus enabling an increased level of integration for semiconductor optoelectronic devices.

Abstract: A process of forming a high-k dielectric in an integrated circuit structure is disclosed. The process cleans a substrate to remove residual organic materials and strip native oxide from the surface of the substrate. Next, the process introduces precursors on the substrate in molar ratios consistent with formation of dielectric glass films. Following that, the process oxidizes the precursors, heats the precursors, and cools the precursors at a rate that avoids crystallization of the precursors.

Abstract: One embodiment of the present invention provides a conductive pigment powder, which includes indium oxide, tin and gold, and having a purple color tone. Other embodiments of the present invention provide a method of producing a conductive pigment powder; a dispersion solution and a transparent conductive film, which include the above-mentioned conductive pigment powder; a method of forming a transparent conductive film; and a cathode ray tube, which includes the above-mentioned transparent conductive film and a transparent substrate.

Abstract: A method for forming a gate electrode of a semiconductor device, which improves thermal stability of a tungsten/polysilicon structure. The method for forming a gate electrode of a semiconductor device includes: sequentially forming a first insulating film, a polysilicon layer and a tungsten layer on a semiconductor substrate; adding oxygen to the tungsten layer; forming a second insulating film on the tungsten layer to which oxygen is added; and selectively removing the second insulating film, the tungsten layer, the polysilicon layer and the first insulating film to form a gate electrode.

Abstract: Provided is an organic electroluminescent (EL) device including a substrate, a transparent electrode formed on the substrate, an organic light-emitting layer formed on the transparent electrode, a metal electrode formed on the organic light-emitting layer, a first insulating layer formed on the metal electrode, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, an organic semiconducting layer formed on the second insulating layer, a source electrode connected to one end of the organic semiconducting layer on the second insulating layer and connected to the metal electrode, and a drain electrode connected to the other end of the organic semiconducting layer on the second insulating layer.

Abstract: The present invention provides a method to prevent an ITO from opening. A dummy material layer with tapered edges is formed on a substrate. A first insulating layer is formed on the dummy material layer. Then a metal layer is formed on the first insulating layer, wherein one edge of the metal layer corresponds to any part of one of the tapered edges of the dummy material layer and the other tapered edge is situated away from the metal layer. After a second insulating layer is formed on the metal layer, an ITO layer is formed thereon without opening.

Abstract: This invention relates to manufacturing of integrated circuits (ICs) and especially conductive layers suitable for use in an IC. According to the preferred method a metal oxide thin film is deposited on a substrate surface and reduced thereafter essentially into a metallic form with an organic reducing agent. The metal oxide is preferably deposited according to the principles of atomic layer deposition (ALD) using a metal source chemical and an oxygen source chemical. The reduction step is preferably carried out in an ALD reactor using one or more vaporized organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO and —COOH.

Abstract: In devices such as flat panel displays, an aluminum oxide layer is provided between an aluminum layer and an ITO layer when such materials would otherwise be in contact to protect the ITO from optical and electrical defects sustained, for instance, during anodic bonding and other fabrication steps. This aluminum oxide barrier layer is preferably formed either by: (1) partially or completely anodizing an aluminum layer formed over the ITO layer, or (2) an in situ process forming aluminum oxide either over the ITO layer or over an aluminum layer formed on the ITO layer. After either of these processes, an aluminum layer is then formed over the aluminum oxide layer.

Abstract: A semiconductor device includes: a silicon substrate; a MOS semiconductor device provided on the silicon substrate, the MOS semiconductor device including a silicide region on an outermost surface thereof; a first insulating film covering the MOS semiconductor device; a capacitor element provided on the first insulating film, the capacitor element comprising a lower electrode, an upper electrode, and a capacitor film interposed between the lower electrode and the upper electrode, and the capacitor film comprising a ferroelectric material; a second insulating film covering the first insulating film and the capacitor element; a contact hole provided in the first insulating film and the second insulating film over the MOS semiconductor device and the capacitor element; and an interconnection layer provided on the second insulating film for electrically connecting the MOS semiconductor device and the capacitor element to each other, wherein a bottom portion of the interconnection layer comprises a conductive mate

Abstract: Methods for forming multiple dielectric layers at low temperatures include forming a number of metallic layers on a substrate and oxidizing the metallic layers to different dielectric oxides. Oxidation is performed one layer at a time, or all layers together. Dielectric layers thus formed have multiple different oxides in layers, reducing defects, providing high capacitance, and low leakage currents.

Abstract: An improved sputtering method for sputter deposition from non-conducting metal oxide, ceramic, and ferroelectric targets is disclosed. Enhancements in deposition rate and composition control have been demonstrated using a pulsed DC sputtering method using a power supply in the frequency range of 100 to 250 KHz and a low frequency RF sputtering method using a power supply in the range of 200 to 500 KHz. The enhancement in composition control comes from an improvement in the sticking efficiencies of the volatile components in ferroelectric films. The low frequency and/or pulsed DC supplies provide lead content control for optimizing ferroelectric performance in pressure regimes that favor better cross wafer composition and thickness uniformity in PVD (Physical Vapor Deposition) sputtering tools.

Abstract: Methods are provided for selective formation of oxidation-resistant caps for conductive plugs in semiconductor device fabrication. One embodiment of the present invention forms a sacrificial layer over a recessed polysilicon plug. The sacrificial layer is readily planarized using chemical mechanical planarization to isolate the cap within a recessed via. Then, an immersion plating process is used to replace the atoms of the sacrificial layer with atoms of a desired metal, such as platinum, thereby creating a metal cap isolated within the via. The advantages of planarization to isolate material within recessed via are thus obtained without having to planarize or otherwise etch the desired metal. The cap layer can be further reacted to form a barrier compound prior to forming a capacitor over the plug. Advantageously, the plug structure resists oxidation during fabrication of overlying capacitors that incorporate high dielectric constant materials.

Abstract: A method of manufacturing integrated circuits using a thin metal oxide film as a seed layer for building multilevel interconnects structures in integrated circuits. Thin layer metal oxide films are deposited on a wafer, and standard optical lithography is used to expose the metal oxide film in a pattern corresponding to a metal line pattern. The metal oxide film is converted to a layer of metal, and a metal film may then be deposited on the converted oxide film by either selective CVD or electroless plating. Via holes are then fabricated in a similar process using via hole lithography. The process is continued until the desired multilevel structure is fabricated.

Abstract: An oxide film is formed on an insulating substrate by means of a wet type film forming technique such as a sol-gel method, a chemical deposition method or a liquid phase deposition method. Next, the oxide film is patterned according to the shape of interconnections. Then, a metal film made of Ni is formed on an oxide film pattern by such a wet type film forming technique as a wet type plating method. Further, a metal film made of Au that has a low resistance is laminated on the metal film made of Ni by electroless plating, and a metal film made of Cu that has a low resistance and is low cost is laminated on the Au film by electroplating. Thus, by the above method for manufacturing electric interconnections, a large-area interconnection substrate for a display device and an image detector is able to be fabricated at low cost without using a vacuum film forming apparatus.

Abstract: In a method of manufacturing a thin film, a buffer layer is formed a substrate. Thereafter, a ferroelectric thin film material is applied thereto before thermally decomposing the buffer layer. Subsequently, the buffer layer and the ferroelectric thin film are decomposed together. Finally, a crystallized thermal process is performed.

Abstract: A method for fabricating a patterned layer from a layer material. The method includes steps of: providing a substrate with at least one target region and at least one migration region; applying a layer material; adding a material to the layer material; and performing a heat treatment such that the layer material migrates from the migration region to the target region and a layer which is self-aligned and self-patterned with respect to the target region is formed. The method has the advantage that the layer material, which can often only be etched with difficulty, does not have to be patterned directly. The desired structure of the layer is predetermined by preliminarily structuring the substrate into a target region and a migration region, and is produced by the migration of the layer material as a result of the heat treatment.

Abstract: A semiconductor device for use in a memory cell includes an active matrix provided with a silicon substrate, a transistor formed on the silicon substrate and isolation regions for isolating the transistor, a capacitor structure formed on top of the active matrix and a metal interconnection for electrically connecting the capacitor structure to the transistor, wherein the capacitor structure includes a bottom and a top electrodes and a capacitor thin film sandwiched therebetween. In the semiconductor device, the bottom electrode is made of a material such as iridium, ruthenium or the like. In order to improve the adhesion between the bottom electrode and insulating layers adjacent thereto, the bottom electrode is encompassed with a metal oxide such as a iridium oxide, ruthenium oxide or the like.

Abstract: When films of Ru(C2H5C5H4)2 are formed on a substrate by means of a thermal CVD method, the films are also deposited on members around the substrate, resulting in the formation of particles on the substrate and hence a reduction in the manufacturing yield. Thus, it is necessary to clean the interior of the reaction chamber, but in a conventional cleaning process, a cleaning time is long and hence manufacturing efficiency is low, increasing manufacturing costs. To improve these, a method of manufacturing semiconductor devices according to the present invention includes: a deposition process for forming a film containing Ru on a substrate in a reaction chamber; and a cleaning process for supplying a CIF3 gas to the reaction chamber so as to remove films, which were deposited on an inner surface of the reaction chamber in the deposition process, through thermochemical reactions.

Abstract: Fabrication of a polysilicon TFT having a lightly doped drain or offset structure. Fabrication includes forming a semiconductor layer, a gate insulating film, and a gate electrode on a substrate. Then, forming lightly doped impurity regions in the semiconductor layer on both sides of the gate electrode. Next, forming an insulating film having a thickness that gradually becomes thinner away from the gate electrode. Then, forming heavily doped impurity regions in the lightly doped impurity regions in the semiconductor layer on both sides of the gate, resulting in regions with continuously varied impurity concentrations.

Abstract: A thick-film conductor, a method for forming the conductor, and a method for attaching a surface-mount circuit device to the conductor with a solder connection. The conductor is formed of a thick-film conductive ink that would normally produce a solderable conductor, but is rendered unsolderable by additions of a fine inorganic particulate material. A solderable region, preferably a pillar, is then selectively formed on the unsolderable conductor to determine the distribution and height of the solder connection on the conductor. In order to suitably affect the solderability of the conductor, the particulate material is present as a fine dispersion and in a sufficient quantity, but not in quantities that significantly affect the electrical, mechanical and processing characteristics of the conductor.

Abstract: An electrode for a capacitor having two electrodes and a capacitor insulation layer formed of a dielectric film sandwiched between the two electrodes, at least one of the electrodes being formed of a metal layer and a metal oxide layer, and the metal oxide layer being formed by oxidizing a surface of the metal layer on the basis of a diffusion-controlling reaction and being positioned in an interface to the capacitor insulation layer.

Abstract: In devices such as flat panel displays, an aluminum oxide layer is provided between an aluminum layer and an ITO layer when such materials would otherwise be in contact to protect the ITO from optical and electrical defects sustained, for instance, during anodic bonding and other fabrication steps. This aluminum oxide barrier layer is preferably formed either by: (1) partially or completely anodizing an aluminum layer formed over the ITO layer, or (2) an in situ process forming aluminum oxide either over the ITO layer or over an aluminum layer formed on the ITO layer. After either of these processes, an aluminum layer is then formed over the aluminum oxide layer.

Abstract: An ohmic contact of semiconductor and its manufacturing method are disclosed. The present invention provides a low resistivity ohmic contact so as to improve the performance and reliability of the semiconductor device. This ohmic contact is formed by first coating a transition metal and a noble metal on a semiconductor material; then heat-treating the transition metal and the noble metal in an oxidizing environment to oxidize the transition metal. In other words, this ohmic contact primarily includes a transition metal oxide and a noble metal. The oxide in the film can be a single oxide, or a mixture of various oxides, or a solid solution of various oxides. The metal of the film can be a single metal, or various metals or an alloy thereof. The structure of the film can be a mixture or a laminate or multilayered including oxide and metal. The layer structure includes at least one oxide layer and one metal layer, in which at least one oxide layer is contacting to semiconductor.

Abstract: The invention provides a method for forming a metal nitride film by depositing a metal oxide film on the substrate and exposing the metal oxide film to a nitrating gas to densify the metal oxide and form a metal nitride film. The metal oxide film is deposited by the decomposition of a chemical vapor deposition precursor. The nitrating step comprises exposing the metal oxide film to a thermally or plasma enhanced nitrating gas preferably comprising nitrogen, oxygen, and anunonia. The invention also provides a process for forming a liner/barrier scheme for a metallization stack by forming a metal nitride layer over the substrate by the densification of a metal oxide layer by a nitrating gas depositing a metal liner layer. Optionally, a metal liner layer may be deposited over substrate prior to the metal nitride layer to form a metal/metal nitride liner/barrier scheme.

Abstract: A semiconductor memory device includes: a capacitor formed on a substrate and including a lower electrode, a dielectric film and an upper electrode; a selection transistor formed at the substrate; an electrically conductive plug for providing electrical connection between the selection transistor and the capacitor; and a diffusion barrier film provided between the electrically conductive plug and the lower electrode of the capacitor. The diffusion barrier film is a TaxSi1−xNy film or a HfxSi1−xNy film (where 0.2<x<1 and 0<y<1). The lower electrode includes an Ir film and an IrO2 film which are sequentially formed.

Abstract: A conductive metal oxide based layer on a substrate is prepared by chemically reducing a metal salt in aqueous solution, coating the resulting aqueous metal dispersion after washing onto a substrate, preferably glass, and subjecting the coated layer to an oxidizing treatment, e.g. a heat step. In a preferred embodiment the metal oxide is tin oxide, or a mixture of tin oxide and another metal oxide.

Abstract: A method for forming a tantalum-based anti-reflective coating (ARC) layer begins by forming an MOS metallic gate electrode layer (20) over a substrate (20). The MOS metallic gate electrode layer (20) is covered with an ARC layer (22). The ARC layer is preferably tantalum pentoxide or a tantalum pentoxide layer doped with one or more of nitrogen atoms and/or silicon atoms. The layers (22 and 20) are then selectively masked photoresist (24) that is selectively exposed to deep ultraviolet (DUV) radiation (28). The ARC layer (22) improves lithographic critical dimension (CD) control of the MOS metallic gate during exposure. The final MOS metallic gate is then patterned and etched using a fluorine-chlorine-fluorine time-progressed reactive ion etch (RIE) process, whereby metallic-gate MOS transistors are eventually formed.

Abstract: There is disclosed a method of manufacturing a capacitor in a semiconductor device. In a Ta2O5 capacitor using a Ru lower electrode, the method processes the Ru lower electrode at low temperature before a Ta2O5 film of a dielectric film is deposited, so that Ru crystal particles are filled with oxygen atoms to form a good quality RuO2. Therefore, the disclosed method can prevent a lift phenomenon of a thin film by prohibiting a stress of the Ta2O5 dielectric film due to RuO2 generated between the Ta2O5 dielectric film and the Ru lower electrode during the deposition process of a Ta2O5 dielectric and a subsequent annealing process. Also, the disclosed method can prevent diffusion of oxygen atoms and oxidization of a TiN film underlying the Ru film from the Ta2O5 dielectric film. As a result, the method can improve leakage current and electrical characteristics of a capacitor.

Abstract: A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula LyRhYz is provided. Also provided is a chemical vapor co-deposited platinum-rhodium alloy barriers and electrodes for cell dielectrics for integrated circuits, particularly for DRAM cell capacitors. The alloy barriers protect surrounding materials from oxidation during oxidative recrystallization steps and protect cell dielectrics from loss of oxygen during high temperature processing steps. Also provided are methods for CVD co-deposition of platinum-rhodium alloy diffusion barriers.

Abstract: A method of manufacturing an integrated thin film solar battery module including a substrate, and a plurality of unit cells connected in series on the substrate, each of the unit cells having a first electrode layer, a semiconductor layer and a second electrode layer which are stacked one upon the other on the substrate. The method includes the steps of scribing the first electrode layer formed on the substrate, forming a semiconductor layer on the first electrode layer, scribing the semiconductor layer for each of the plurality of unit cells to form openings for connection to the first electrode layer, forming a second electrode layer on the semiconductor layer, scribing the second electrode layer and the semiconductor layer in the vicinity of the openings formed in the semiconductor layer, allowing an edge surface of the semiconductor layer to be exposed to the outside by removing residues of the second electrode layer and the semiconductor layer, and applying a heat treatment at 130° C.

Abstract: A method of providing nickel barrier end terminations for a zinc oxide semiconductor device with exposed body surfaces and end terminal regions, in which the device is controllably reacted with a nickel plating solution only on an exposed end terminal region and thereafter provided with a final tin or tin-lead termination.

Abstract: The present invention relates to a thin film transistor and a fabricating method thereof wherein a source/drain region and a gate electrode are formed in the same layer, which improves the degree of planarization. Because source/drain electrodes and a gate electrode are formed by patterning the same layer with a single mask, the invention reduces the number of fabrication steps. The TFT includes an insulated substrate which is transparent, a source electrode and a drain electrode on the insulated substrate. The source and drain electrodes are separated from each other, and a gate electrode is between the source and drain electrodes on the insulated substrate. A gate insulating layer covers the source and drain electrodes and the gate electrodes on the gate insulating layer. An active layer is then formed on the gate insulating layer. Source and drain regions are formed at each end of the active layer corresponding to the gate electrode and a channel region is formed between the source and drain regions.

Abstract: The subject invention pertains to a method and device for producing large area single crystalline III-V nitride compound semiconductor substrates with a composition AlxInyGal-x-y N (where O≦x≦1, 0≦y≦1, and 0≦x+y≦1). In a specific embodiment, GaN substrates, with low dislocation densities (˜107 cm2) can be produced. These crystalline III-V substrates can be used to fabricate lasers and transistors. Large area free standing single crystals of III-V compounds, for example GaN, can be produced in accordance with the subject invention. By utilizing the rapid growth rates afforded by hydride vapor phase epitaxy (HVPE) and growing on lattice matching orthorhombic structure oxide substrates, good quality III-V crystals can be grown. Examples of oxide substrates include LiGaO2, LiAlO2, MgAlScO4, Al2MgO4, and LiNdO2. The subject invention relates to a method and apparatus, for the deposition of III-V compounds, which can alternate between MOVPE and HVPE, combining the advantages of both.

Abstract: A semiconductor device and a method for making a semiconductor device having a pillar-shaped capacitor storage node compatible with a high dielectric film, wherein the pillar-shaped capacitor storage node includes a thick conductive metal layer that is easily etched and a thin conductive layer completely coating the thick conductive metal layer. The thin conductive layer protects the thick conductive metal layer during subsequent high dielectric deposition and annealing and various oxidation process.

Abstract: An encapsulated copper plug on a doped silicon semiconductor substrate has a substrate surface, covered with insulation, with a plug hole with a diffusion barrier formed on the walls and the bottom of the hole to the top of the hole. The plug hole is partially filled with an electrolessly deposited copper metal plug. An encapsulating metal deposit caps the plug without any intervening oxidation and degradation. In a transition from copper to a codeposit of copper, an encapsulating Pt, Pd, and/or Ag metal deposits in the electroless bath without oxidation and degradation followed by a pure deposit of the encapsulating metal layer to cap the plug.

Abstract: A semiconductor fabrication method is provided for fabricating resistors in integrated circuits. This method allows the resistors to be formed with a wider range of resistance values, in contrast to the prior art in which polysilicon is used to form the resistors. In accordance with this method, the resistors are formed from refractory metal oxides. To provide only one specific resistive characteristic, one stage of hydrogen treatment is performed on a selected part of the refractory metal oxide layer where the resistor is to be formed. Through the hydrogen treatment, the selected part of the reactory metal oxide layer is converted into a semi-conductive oxide or a conductive oxide to serve as the desired resistor. Moreover, when forming a plurality of resistors with various resistive characteristics, a number of stages of hydrogen treatment are performed successively on selected portions of the refractory metal oxide layer where the resistors to be formed in the integrated circuit are defined.

Abstract: A method of manufacturing an electronic device including an oxide film of perovskite-type, said method comprising the steps of forming on a base substrate a first conductive oxide film of perovskite type in an atmosphere of reduced pressure at a first temperature, and performing heat treatment on the first conductive oxide film in an oxidizing atmosphere containing oxygen at a second temperature which is higher than the first temperature.