Abstract: An electrical device having carbonized conductors and a method and a device for the production thereof is disclosed. The electrical device has electrical components having connections. Furthermore, there are situated between the electrical components regions made of plastic with conductors having carbonized plastic and/or agglomerated nanoparticles. The conductors are connected to the connections of the components and/or to external connections of the electronic device.

Abstract: A substrate support (201) having a flat supporting surface (201a) is prepared, and a semiconductor substrate (1) is fixed to the substrate supporting surface (201) by attaching a wiring forming surface (1a) to the supporting surface (201a) by suction, for example, by vacuum suction. On this occasion, the wiring forming surface (1a) is forcibly flattened by being attached to the supporting surface (201a) by suction, and therefore the wiring forming surface (1a) becomes a reference plane for planarization of a back surface (1b). In this state, planarization processing is performed by mechanically grinding the back surface (1b) to grind away projecting portions (12) of the back surface (1b). Hence, variations in the thickness of the substrate (especially, semiconductor substrate) are made uniform, and high-speed planarization is realized easily and inexpensively without disadvantages such as dishing and without any limitation on a wiring design.

Abstract: An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a dielectric layer, a composite plug and a conductive line. The dielectric layer is disposed on the substrate covering the conductive part. The composite plug is disposed in the dielectric layer electrically connecting with the conductive part, and includes a first plug and a second plug on the first plug, wherein the material or the critical dimension of the second plug is different from that of the first plug. The conductive line is disposed on the dielectric layer electrically connecting with the composite plug.

Abstract: A method of forming a polycrystalline thin film for a thin film transistor, a mask used in the method, and a method of making a flat panel display device using the method of forming a polycrystalline thin film for a thin film transistor are disclosed. Certain embodiments are capable of providing a display device in which the polycrystalline thin film is uniformly crystallized such luminance non-uniformity is reduced. In the method of forming a polycrystalline thin film for a thin film transistor, amorphous material is crystallized using a laser and a mask having a mixed structure of one or more transmission region sets each comprising one or more transmission regions through which the laser beam is capable of passing and one or more non-transmission regions through which the laser beam is not capable of passing. The laser beam is directed onto overlapping regions of the material.

Abstract: The present invention relates to systems, materials and methods for the formation of conducting, semiconducting, and dielectric layers, structures and devices from suspensions of nanoparticles. Drop-on-demand systems are used in some embodiments to fabricate various electronic structures including conductors, capacitors, FETs. Selective laser ablation is used in some embodiments to pattern more precisely the circuit elements and to form small channel devices.

Abstract: After crystallization of a semiconductor film is performed by irradiating first laser light (energy density of 400 to 500 mJ/cm2) in an atmosphere containing oxygen, an oxide film formed by irradiating the first laser light is removed. It is next performed to irradiate second laser light under an atmosphere that does not contain oxygen (at a higher energy density than that of the first laser light irradiation), thus to increase the flatness of the semiconductor film.

Abstract: The present invention facilitates semiconductor device operation and fabrication by providing a cap-annealing process that improves channel electron mobility without substantially degrading PMOS transistor devices. The process uses an oxide/nitride composite cap to alter the active dopant profile across the channel regions. During an annealing process, dopants migrate out of the Si/SiO2 in a channel region thereby altering the dopant profile of the channel region. This altered profile generally improves channel mobility thereby improving transistor performance and permitting smaller density designs.

Abstract: Methods of forming a silicon carbide semiconductor device are disclosed. The methods include forming a semiconductor device at a first surface of a silicon carbide substrate having a first thickness, and mounting a carrier substrate to the first surface of the silicon carbide substrate. The carrier substrate provides mechanical support to the silicon carbide substrate. The methods further include thinning the silicon carbide substrate to a thickness less the first thickness, forming a metal layer on the thinned silicon carbide substrate opposite the first surface of the silicon carbide substrate, and locally annealing the metal layer to form an ohmic contact on the thinned silicon carbide substrate opposite the first surface of the silicon carbide substrate. The silicon carbide substrate is singulated to provide a singulated semiconductor device.

Abstract: A method of making an etched structure in the fabrication of a MEMS device involves depositing a bulk layer, typically of polysilicon, prone to surface roughness. At least one layer of photo-insensitive spin-on planarizing material, such as silicate-based spin-on glass, is formed on the bulk layer to reduce surface roughness. This is patterned with a photoresist layer. A deep etch is then performed through the photoresist layer into the bulk layer. This technique results in much more precise etch structures.

Abstract: An ohmic contact for a silicon slider body is disclosed. A scanned laser beam locally heats a metal film on the slider body to interdiffuse the metal and silicon while minimizing the total thermal load on the slider body. This localized heating avoids thermal damage to the sensitive magnetic head region on the slider. The native oxide layer on the slider is removed by a sputter etch, followed by deposition of a diffusion layer. A capping layer is then deposited to reduce oxidation during subsequent processing. The metal layer is then locally annealed by scanning the laser beam over the target area. Contact resistance of less than 100 ohms is achieved while minimizing the thermal load on the slider body.

Abstract: A method is described for the manufacture of structured flexible metallic patterns in which a metallic layer on a flexible substrate is structured using laser ablation. The flexible patterns manufactured in this fashion may be used as interposers (strap) for RFID tags or RFID antennas.

Abstract: The present invention provides a method for forming a wiring having a minute shape on a large substrate with a small number of steps, and further a wiring substrate formed by the method. Moreover, the present invention provides a semiconductor device in which cost reduction and throughput improvement are possible due to the small number of steps and reduction of materials and which has a semiconductor element with a minute structure, and further a manufacturing method thereof. According to the present invention, a composition including metal particles and organic resin is irradiated with laser light and a part of the metal particles is baked to form a conductive layer typified by a wiring, an electrode or the like over a substrate. Further, a semiconductor device having the baked conductive layer as a wiring or an electrode is formed.

Abstract: A method of forming a conductive pattern in which the conductive pattern can be easily formed at a low temperature without a photolithography process by forming the conductive pattern using a laser ablation method and an inkjet method, an organic thin film transistor manufactured using the method, and a method of manufacturing the organic thin film transistor. The method of forming a conductive pattern in a flat panel display device includes preparing a base member, forming a groove having the same shape as the conductive pattern in the base member, and forming the conductive pattern by applying a conductive material into the groove. The base member has one of a structure including a plastic substrate having the groove and a structure including a substrate and an insulating layer which is arranged on the substrate and which has the groove.

Abstract: To remove the disparate substrate from nitride semiconductor layer grown over the disparate substrate, that is made of a material different from nitride semiconductor, by irradiating the disparate substrate with laser beam having a wavelength shorter than the band gap wavelength of the nitride semiconductor layer, while supplying an acidic or alkaline etching solution to the interface between the disparate substrate and the nitride semiconductor layer.

Abstract: A method for adding an additional layer to an integrated circuit, the method including providing an integrated circuit having an interconnect layer, depositing, over substantially all of an exposed surface of the integrated circuit, an additional layer of material whose conductivity can be altered, and selectively altering the conductivity of a first portion of the additional layer by selective annealing, to produce a sub-circuit in the additional layer, the sub-circuit being in operative electrical communication with the integrated circuit. Related apparatus and methods are also described.

Abstract: A MEMS microphone is formed on a single substrate that also includes microelectronic circuitry. High-temperature tolerance metals are used to form contacts in a metallization step before performing deep reactive ion etching and back patterning steps to form a MEMS microphone. High-temperature tolerant metals such as titanium, tungsten, chromium, etc. can be used for the contacts. Another approach uses laser annealing in place of deep reactive ion etching so that high-temperature tolerant metals do not need to be used in earlier metallization steps. Different orderings for device, circuit, and metallization series of steps are presented.

Abstract: A method for producing an electronic component, especially a memory chip, using a laser-induced correction to equalize an integrated circuit by means of at least one laser via in a layer at least partially covering the circuit. The component comprises a rewiring of the contact pads. The inventive method comprises the following steps: each laser via is closed by means of a separate covering layer which is to be applied locally; a rewiring extending between the local covering layers is created; the local covering layers are removed; and the laser-induced correction is carried out by means of the open laser vias.

Abstract: An alloying method includes the steps of forming a metal layer on a semiconductor having been transferred to a material having a low thermal conductivity, and alloying an interface between the semiconductor and the metal layer by irradiating the interface with a laser beam having a wavelength absorbable in at least one of the semiconductor and the metal layer. The irradiation energy of the laser beam is set in a range of 20 to 100 mJ/cm2. The material having a low thermal conductivity is a resin or amorphous silicon. According to the alloying method using laser irradiation, since the entire semiconductor is not heated and only a necessary portion is locally heated, the necessary portion can be readily alloyed to be converted into an ohmic contact without exerting adverse effect on characteristics of the semiconductor device.

Abstract: Methods for reducing contact resistance in semiconductor devices are provided in the present invention. In one embodiment, the method includes providing a substrate having semiconductor device formed thereon, wherein the device has source and drain regions and a gate structure formed therein, performing a silicidation process on the substrate by a thermal annealing process, and performing a laser anneal process on the substrate. In another embodiment, the method includes providing a substrate having implanted dopants, performing a silicidation process on the substrate by a thermal annealing process, and activating the dopants by a laser anneal process.

Abstract: After crystallization of a semiconductor film is performed by irradiating first laser light (energy density of 400 to 500 mJ/cm2) in an atmosphere containing oxygen, an oxide film formed by irradiating the first laser light is removed. It is next performed to irradiate second laser light under an atmosphere that does not contain oxygen (at a higher energy density than that of the first laser light irradiation), thus to increase the flatness of the semiconductor film.

Abstract: A salicide process is conducted to a thin film integrated circuit without worrying about damages to a glass substrate, and thus, high-speed operation of a circuit can be achieved. A base metal film, an oxide and a base insulating film are formed over a glass substrate. A TFT having a sidewall is formed over the base insulating film, and a metal film is formed to cover the TFT. Annealing is conducted by RTA or the like at such a temperature that does not cause shrinkage of the substrate, and a high-resistant metal silicide layer is formed in source and drain regions. After removing an unreacted metal film, laser irradiation is conducted for the second annealing; therefore a silicide reaction proceeds and the high-resistant metal silicide layer becomes a low-resistant metal silicide layer.

Abstract: An example method of forming a bitline contact region and bitline contact plug for a memory device using a laser irradiation activation process. An example embodiment comprises: providing a substrate having a logic region and a SONOS memory region. We form in the memory region, a memory transistor comprised of a memory gate dielectric, a memory gate electrode, memory LDD regions, memory spacers on the sidewalls of the memory gate electrode. We then perform a “memory Cell Source Line” implant to form a memory source line in the memory region adjacent to the memory gate electrode. We form silicide over the memory gate electrode and on the memory source line. We form an ILD dielectric layer over the substrate surface. We form a contact opening in the ILD dielectric layer over the memory Drain in the memory area. We etch an opening in the substrate in the drain region adjacent to the memory gate electrode. The opening exposes the memory cell first well and exposes the memory drain on the sidewall of the opening.

Abstract: A process for manufacturing a wiring board comprising a substrate made of an insulation material and having first and second surfaces, first and second conductor patterns formed on the first and second surfaces, respectively, and a via conductor penetrating the substrate to electrically connect the first conductor pattern with the second conductor pattern; the process comprising the following steps of: forming the substrate with a through-hole penetrating thereto and defining openings at the first and second surfaces, respectively; plating the substrate with a metal so that a metal layer having a predetermined thickness is formed on the respective first and second surfaces of the substrate and the through-hole is substantially filled with the metal to be the via conductor; irradiating a laser beam, as a plurality of spots, around a metal-less portion of the plated metal, such as a dimple or seam, at positions corresponding to the openings of the through-hole, so that the a part of the plated metal melts to fi

Abstract: A method for forming via holes includes placing an insulating layer on a first wiring layer, forming opening portions in the insulating layer, and forming a second wiring layer on the insulating layer. At the time of forming the opening portions, the insulating layer is irradiated with a laser beam with the focus position staggered.

Abstract: Embodiments of methods, apparatuses, devices, and/or systems for forming an interconnect are described.

Abstract: A method and apparatus for processing a thin metal layer on a substrate to control the grain size, grain shape, and grain boundary location and orientation in the metal layer by irradiating the metal layer with a first excimer laser pulse having an intensity pattern defined by a mask to have shadow regions and beamlets. Each region of the metal layer overlapped by a beamlet is melted throughout its entire thickness, and each region of the metal layer overlapped by a shadow region remains at least partially unmelted. Each at least partially unmelted region adjoins adjacent melted regions. After irradiation by the first excimer laser pulse, the melted regions of the metal layer are pemitted to resolidify. During resolidification, the at least partially unmelted regions seed growth of grains in adjoining melted regions to produce larger grains.

Abstract: Exemplary embodiments of the present invention provide a method to form a patterned conductive film by modifying a conductive thin film on a substrate irrespective of the material used for the substrate. Exemplary embodiments include a substrate having a conductive layer containing a conductive material and a photothermal conversion layer containing a photothermal conversion material that converts light energy into heat energy that is irradiated with a laser beam to fire at least part of the conductive layer with the photothermal conversion material.

Abstract: For forming a fine structure of a desired material, nanoparticles of the same material are prepared in a suspension. A layer of the suspension is applied by a drop-on-demand printing system to a substrate. At least part of the layer is exposed to laser light for melting the nanoparticles at least partially. Upon solidification, the molten particles are sintered together to form the desired structure. Due to the low melting point of nanoparticles as compared to the melting point of bulk material, this procedure avoids damage to the substrate and provides a better control over the structure generation process. It can be used for generating metallic and non-metallic structures on various substrates. The laser light may have non-Gaussian intensity distribution or can combine multiple beams of Gaussian and non-Gaussian distribution for improving the quality of the generated structure, or it may be pulsed for improved control of the heat flow into the substrate.

Abstract: Formation of a mixed-material composition through diffusion using photo-thermal energy. The diffusion may be used to create electrically conductive traces. The diffusion may take place between material layers on one of a package substrate, semiconductor substrate, substrate for a printed circuit board (PCB), or other multilayered substrate. The photo-thermal energy may be supplied by various devices, for example a YAG laser device, CO2 laser device, or other energy source.

Abstract: An alloying method includes the steps of forming a metal layer on a semiconductor having been transferred to a material having a low thermal conductivity, and alloying an interface between the semiconductor and the metal layer by irradiating the interface with a laser beam having a wavelength absorbable in at least one of the semiconductor and the metal layer. The irradiation energy of the laser beam is set in a range of 20 to 100 mJ/cm2. The material having a low thermal conductivity is a resin or amorphous silicon. According to the alloying method using laser irradiation, since the entire semiconductor is not heated and only a necessary portion is locally heated, the necessary portion can be readily alloyed to be converted into an ohmic contact without exerting adverse effect on characteristics of the semiconductor device.

Abstract: A semiconductor comprises a substrate including a single crystal semiconductor region, and a pattern including a line pattern provided on the substrate, the line pattern having a longitudinal direction differing from a crystal orientation of the single crystal semiconductor region.

Abstract: A method of production of a multilayer ceramic capacitor or other multilayer ceramic electronic device with few structural defects and improved highly accelerated life, that is, a method of production of a multilayer ceramic electronic device having a firing step of firing a stack comprised of a dielectric layer paste and an internal electrode layer paste including a base metal alternately arranged in a plurality of layers, a first annealing step of annealing, at a temperature T1 of 600 to 900° C., the stack after firing and a second annealing step of annealing, at a temperature T2 of 900 to 1200° C. (however, excluding 900° C.), the stack after said first annealing.

Abstract: A method for forming via holes includes placing an insulating layer on a first wiring layer, forming opening portions in the insulating layer, and forming a second wiring layer on the insulating layer. At the time of forming the opening portions, the insulating layer is irradiated with a laser beam with the focus position staggered.

Abstract: An alloying method includes the steps of forming a metal layer on a semiconductor having been transferred to a material having a low thermal conductivity, and alloying an interface between the semiconductor and the metal layer by irradiating the interface with a laser beam having a wavelength absorbable in at least one of the semiconductor and the metal layer. The irradiation energy of the laser beam is set in a range of 20 to 100 mJ/cm2. The material having a low thermal conductivity is a resin or amorphous silicon. According to the alloying method using laser irradiation, since the entire semiconductor is not heated and only a necessary portion is locally heated, the necessary portion can be readily alloyed to be converted into an ohmic contact without exerting adverse effect on characteristics of the semiconductor device.

Abstract: An alloying method includes the steps of forming a metal layer on a semiconductor having been transferred to a material having a low thermal conductivity, and alloying an interface between the semiconductor and the metal layer by irradiating the interface with a laser beam having a wavelength absorbable in at least one of the semiconductor and the metal layer. The irradiation energy of the laser beam is set in a range of 20 to 100 mJ/cm2. The material having a low thermal conductivity is a resin or amorphous silicon. According to the alloying method using laser irradiation, since the entire semiconductor is not heated and only a necessary portion is locally heated, the necessary portion can be readily alloyed to be converted into an ohmic contact without exerting adverse effect on characteristics of the semiconductor device.

Abstract: For suppressing decomposition of an organic group (for example, a CH3 group) which is bonded to an Si atom of an organic SOG film for use in a flattening process at the time of an ashing process, there is provided a method comprising the steps of: forming an organic SOG layer directly on a lower wiring layer or on a predetermined film including a hillock protection layer which is formed on the lower wiring layer in advance; forming an upper wiring layer on the organic SOG layer without using an etching back process; forming a via hole through an etching process by using a patterned resist layer provided on the upper wiring layer as a mask; performing an ashing process with a plasma by making ions or radicals which are induced from oxygen gas as a main reactant, under an atmospheric pressure ranging from 0.01 Torr to 30.0 Torr; and filling said via hole with a conductive material so as to electrically connect the lower wiring layer to the upper wiring layer.

Abstract: To provide a continuous-oscillating laser apparatus capable of improving the efficiency of substrate treatment, a method of irradiating a laser beam, and a method of manufacturing a semiconductor device using the laser apparatus. Of the entire semiconductor film, a portion that needs to be left on the substrate after patterning is identified according to a mask. Then, a portion to be scanned by respective lasers are defined, so that a laser beam is irradiated twice in different scanning directions to a portion to be obtained at least through patterning and beam spots are impinged upon the scanned portion, thereby partially crystallizing the semiconductor film. In other words, in the invention, it is arranged in such a manner that a laser beam is not irradiated by scanning a laser beam across the entire semiconductor film but by scanning a laser beam twice at least to the absolutely necessary portion.

Abstract: A method of improving the tolerance of a back-end-of-the-line (BEOL) thin film resistor is provided. Specifically, the method of the present invention includes an anodization step which is capable of converting a portion of base resistor film into an anodized region. The anodized resistor thus formed has a sheet resistivity that is higher than that of the base resistor film.

Abstract: An alloying method includes steps of forming a metal layer on a semiconductor that is then transferred to a material having a low thermal conductivity. An interface between the semiconductor and the metal layer is formed into an alloy by irradiating the interface with a laser beam having a wavelength that is absorbable in at least one of the semiconductor and the metal layer. Preferably, the material having a low thermal conductivity is a resin or amorphous silicon. Because the entire semiconductor is not heated and only a necessary portion is locally heated, the necessary portion can be readily alloyed to be converted into an ohmic contact without exerting adverse effects on the characteristics of the semiconductor device.

Abstract: A method of manufacturing a semiconductor device includes forming a layer over a substrate, and doping the layer with a dopant, after which the layer is laser thermal annealed. The layer can be a nitride, an oxide, or a polysilicon layer. The dopants can be arsenic, phosphorous, boron, or nitrogen. During the laser thermal annealing, certain portions of a surface of the semiconductor device are laser thermal annealed and other portions of a surface of the semiconductor device are not exposed. Also, the surface of the layer is smoother after the laser thermal annealing.

Abstract: A light emitting-layer is provided on a substrate. A p-type semiconductor layer is provided on the light-emitting layer. An upper electrode is provided on the p-type semiconductor layer. The upper electrode includes an Au thin film coming into contact with the p-type semiconductor layer and an n-type transparent conductor film formed thereon. The n-type transparent conductor film is formed by laser ablation. Particularly, the method involves placing a substrate in a vacuum chamber, placing a target of the film material in the chamber, introducing oxygen into the chamber, laser-irradiating the target to emit atoms or molecular ions by ablation, and then depositing and oxidizing the atoms or ions to grow the transparent conductor film.

Abstract: An exemplary solution-processed thin film transistor formation method of the invention forms solution-processed thin film layers into a transistor structure. During formation, semiconductor portions of the transistor structure are selectively heated via a laser to modify the material state of semiconductor material from a solution deposited material state to a thin film layer material state.

Abstract: A semiconductor is cut by directing a green laser beam of high power, and subsequently directing a UV beam along the cut line. The first beam performs cutting with relatively rough edges and a high material removal rate, and the second beam completes the cut at the edges for the required finish, with a lower material quantity removal.

Abstract: A method for manufacturing a semiconductor structure having an interlevel dielectric comprising (i) patterning features in the interlevel dielectric, (ii) depositing a metal into the features, and (iii) melting and recrystallizing metal in the features using a laser. Semiconductor structures having an interlevel dielectric that are made by the method. The recrystallizing step comprises exposing the metal in the features to a laser annealing protocol. The protocol includes exposing the metal to a laser having a predetermined wavelength selected from the range of 150 nm to 900 nm. In some instances, the laser used in the laser annealing protocol has an output pulse energy of about 1.0 joules/cm2 to about 4.0 joules/cm2. In some instances, the semiconductor structure is on a substrate and the recrystallizing step comprises simultaneously exposing the entire semiconductor structure to the laser.

Abstract: Dopant deactivation, particularly at the Si/silicide interface, is avoided by forming deep source/drain implants after forming silicide layers on the substrate and activating the source/drain regions by laser thermal annealing. Embodiments include forming source/drain extensions, forming metal silicide layers on the substrate surface and gate electrode, forming preamorphized regions under the metal silicide layers in the substrate, ion implanting to form deep source/drain implants overlapping the preamorphized regions and extending deeper into the substrate then the preamorphized regions, and laser thermal annealing to activate the deep source/drain regions.

Abstract: There is provided a beam homogenizer which can unify the energy distribution of a linear laser beam in a longitudinal direction. In the beam homogenizer including cylindrical lens groups for dividing a beam, and a cylindrical lens and a cylindrical lens group for condensing the divided beams, the phases, in the longitudinal direction, of linear beams passing through individual cylindrical lenses of the cylindrical lens group for condensing the divided beams are shifted, and then, the beams are synthesized, so that the intensity of interference fringes of the linear beam on a surface to be irradiated is made uniform.

Abstract: Disclosed is a method for crystallizing amorphous silicon, in which a substrate on which an amorphous silicon layer is formed is first prepared, and then a mask is disposed above the substrate. The mask is divided into first and second blocks, the first block having a plurality of first transmission slits and a plurality of interception portions formed between the first transmission slits, the second block having a plurality of second transmission slits alternately arranged with the first transmission slits and a plurality of third transmission slits formed corresponding to middle portions of the first transmission slits. Afterwards, first crystalline regions are formed on the amorphous silicon layer by irradiating a laser beam through the first transmission slits.

Abstract: A high temperature thermal annealing process creates a low resistance contact between a metal material and an organic material of an organic semiconductor device, which improves the efficiency of carrier injection. The process forms ohmic contacts and Schottky contacts. Additionally, the process may cause metal ions or atoms to migrate or diffuse into the organic material, cause the organic material to crystallize, or both. The resulting organic semiconductor device has enhanced operating characteristics such as faster speeds of operation. Instead of using heat, the process may use other forms of energy, such as voltage, current, electromagnetic radiation energy for localized heating, infrared energy and ultraviolet energy. An example enhanced organic diode comprising aluminum, carbon C60, and copper is described, as well as example insulated gate field effect transistors.

Abstract: A novel method for forming a C54 phase titanium disilicide film in the fabrication of an integrated circuit is described. A semiconductor substrate is provided having silicon regions to be silicided. A titanium layer is deposited overlying the silicon regions to be silicided. The substrate is subjected to a first annealing whereby the titanium is transformed to phase C40 titanium disilicide where it overlies the silicon regions and wherein the titanium not overlying the silicon regions is unreacted. The unreacted titanium layer is removed. The substrate is subjected to a second annealing whereby the phase C40 titanium disilicide is transformed to phase C54 titanium disilicide to complete formation of a phase 54 titanium disilicide film in the manufacture of an integrated circuit.

Abstract: A polymer film including an adhesive layer, which can be peeled off with heat, is bonded to the upper surface of a semiconductor layer. Then, a KrF excimer laser light beam is applied to a surface of a substrate opposite to the semiconductor layer. This causes local heating at the laser spot, so that the bonding of atoms is cut off at the interface between the semiconductor layer and the substrate, thereby forming a thermal decomposition layer between the substrate and the semiconductor layer. Subsequently, the substrate is heated at a given temperature, so that the adhesive layer foams to lose its adhesive power. As a result, the polymer film is easily peeled off from the semiconductor layer.