Abstract: A semiconductor device having nickel silicide and a method for fabricating nickel silicide. A semiconductor substrate having a plurality of doped regions is provided. Subsequently, a nickel layer is formed on the semiconductor substrate, and a first rapid thermal process (RTP) is performed to react the nickel layer with the doped regions disposed there under. Thereafter, the unreacted nickel layer is removed, and a second rapid thermal process is performed to form a semiconductor device having nickel silicide. The second rapid thermal process is a spike anneal process whose process temperature is between 400 and 600° C.

Abstract: A semiconductor substrate, a semiconductor chip and a semiconductor component with areas composed of a stressed monocrystalline material, and a method for production of a semiconductor component is disclosed. In one embodiment, the semiconductor chip includes relatively thick stressed layers achieving reduced switching times. For this purpose, the semiconductor substrate has one or more areas with extrinsic, permanent curvature, with the crystal structure K being compressed and/or widened and/or distorted in these areas.

Abstract: In an ohmic layer and methods of forming the ohmic layer, a gate structure including the ohmic layer and a metal wiring having the ohmic layer, the ohmic layer is formed using tungsten silicide that includes tungsten and silicon with an atomic ratio within a range of about 1:5 to about 1:15. The tungsten silicide may be obtained in a chamber using a reaction gas including a tungsten source gas and a silicon source gas by a partial pressure ratio within a range of about 1.0:25.0 to about 1.0:160.0. The reaction gas may have a partial pressure within a range of about 2.05 percent to about 30.0 percent of a total internal pressure of the chamber. When the ohmic layer is employed for a conductive structure, such as a gate structure or a metal wiring, the conductive structure may have a reduced resistance.

Abstract: A method of fabricating a suspended structure. First, a substrate including a photoresist layer hardened by heat is provided. Subsequently, the hardened photoresist layer is etched so as to turn the photoresist layer into a predetermined edge profile. Thereafter, a structure layer is formed on parts of the substrate and parts of the photoresist layer. Next, a dry etching process is performed so as to remove the photoresist layer, and to turn the structure layer into a suspended structure.

Abstract: In one embodiment, a method for forming a tantalum-containing material on a substrate is provided which includes heating a liquid tantalum precursor containing tertiaryamylimido-tris(dimethylamido) tantalum (TAIMATA) to a temperature of at least 30° C. to form a tantalum precursor gas and exposing the substrate to a continuous flow of a carrier gas during an atomic layer deposition process. The method further provides exposing the substrate to the tantalum precursor gas by pulsing the tantalum precursor gas into the carrier gas and adsorbing the tantalum precursor gas on the substrate to form a tantalum precursor layer thereon. Subsequently, the tantalum precursor layer is exposed to at least one secondary element-containing gas by pulsing the secondary element-containing gas into the carrier gas while forming a tantalum barrier layer on the substrate.

Abstract: A method of manufacturing a semiconductor device includes providing a first layer over a wafer substrate, providing a polysilicon layer over the first layer, implanting nitrogen ions into the polysilicon layer, forming a polycide layer over the polysilicon layer, and forming source and drain regions.

Abstract: A method for forming a stabilized metal silicide film, e.g., contact (source/drain or gate), that does not substantially agglomerate during subsequent thermal treatments, is provided In the present invention, ions that are capable of attaching to defects within the Si-containing layer are implanted into the Si-containing layer prior to formation of metal silicide. The implanted ions stabilize the film, because the implants were found to substantially prevent agglomeration or at least delay agglomeration to much higher temperatures than in cases in which no implants were used.

Abstract: The present invention provides a method of fabricating semiconductor device comprising at least one field effect transistor (FET) having source and drain (S/D) metal silicide layers with intrinsic tensile or compressive stress. First, a metal layer containing a silicide metal M is formed over S/D regions of a FET, followed by a first annealing step to form S/D metal silicide layers that comprise a metal silicide of a first phase (MSix). A silicon nitride layer is then formed over the FET, followed by a second annealing step. During the second annealing step, the metal silicide is converted from the first phase (MSix) into a second phase (MSiy) with x<y. The metal silicide conversion causes either volumetric shrinkage or expansion in the S/D metal silicide layers of the FET, which in turn generates intrinsic tensile or compressive stress in the S/D metal silicide layers under confinement by the silicon nitride layer.

Abstract: A fully silicided gate with a selectable work function includes; a gate dielectric over the substrate; and a first metal silicide layer over the gate dielectric, and a second metal silicide layer wherein the first metal silicide has a different phase then the second metal silicide layer. The metal silicide layers comprises at least one alloy element. The concentration of the alloy element on the interface between the gate dielectric and the metal silicide layers influence the work function of the gate.

Abstract: A method for producing a silicide contact. The method comprises the steps of depositing a metal on a SiC substrate; forming an encapsulating layer on deposited metal; and annealing said deposited metal to form a suicide contact. The encapsulating layer prevents agglomeration and formation of stringers during the annealing process.

Abstract: Fully and uniformly silicided gate conductors are produced by deeply “perforating” silicide gate conductors with sub-lithographic, sub-critical dimension, nanometer-scale openings. A silicide-forming metal (e.g. cobalt, tungsten, etc.) is then deposited, polysilicon gates, covering them and filling the perforations. An anneal step converts the polysilicon to silicide. Because of the deep perforations, the surface area of polysilicon in contact with the silicide-forming metal is greatly increased over conventional silicidation techniques, causing the polysilicon gate to be fully converted to a uniform silicide composition. A self-assembling diblock copolymer is used to form a regular sub-lithographic nanometer-scale pattern that is used as an etching “template” for forming the perforations.

Abstract: A field effect transistor having metallic silicide layers is formed in a semiconductor layer on an insulating layer of an SOI substrate. The metallic silicide layers are composed of refractory metal and silicon. The metallic silicide layers extend to bottom surfaces of source and drain regions. A ratio of the metal to the silicon in the metallic silicide layers is X to Y. A ratio of the metal to the silicon of metallic silicide having the lowest resistance among stoichiometric metallic silicides is X0 to Y0. X, Y, X0 and Y0 satisfy the following inequality: (X/Y)>(X0/Y0).

Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.

Abstract: In one embodiment, a method for forming a metal-containing material on a substrate is provided which includes forming a metal containing barrier layer on a substrate by a plasma-enhanced cyclical vapor deposition process, exposing the substrate to a soak process, and depositing a conductive material on the substrate by a second vapor deposition process. The substrate may be exposed to a silicon-containing compound (e.g., silane) during the soak process. In some examples, a metallic nitride layer may be deposited subsequent to the soak process and prior to the second vapor deposition process. In other examples, the metal containing barrier layer contains metallic titanium, the metallic nitride layer contains titanium nitride, and the conductive material contains tungsten or copper. The plasma-enhanced cyclical vapor deposition process may further include exposing the substrate to a nitrogen precursor, such as nitrogen, hydrogen, a nitrogen/hydrogen mixture, ammonia, hydrazine, or derivatives thereof.

Abstract: A method of forming a non-volatile memory device may include forming a fin protruding from a substrate, forming a tunnel insulating layer on portions of the fin, and forming a floating gate on the tunnel insulting layer so that the tunnel insulating layer is between the floating gate and the fin. A dielectric layer may be formed on the floating gate so that the floating gate is between the dielectric layer and the fin, and a control gate electrode may be formed on the dielectric layer so that the dielectric layer is between the control gate and the fin. Related devices are also discussed.

Abstract: A method of forming a nickel monosilicide layer on silicon-containing features of an electronic device that includes depositing a nickel film over the silicon-containing features. The nickel film is co-deposited with a selected material. The selected material has an atomic percentage in a range of about 10% to 25%. A single anneal step is then applied to the nickel film thus directly forming the nickel monosilicide layer.

Abstract: The present invention provides a complementary metal oxide semiconductor integration process whereby a plurality of silicided metal gates are fabricated atop a gate dielectric. Each silicided metal gate that is formed using the integration scheme of the present invention has the same silicide metal phase and substantially the same height, regardless of the dimension of the silicide metal gate. The present invention also provides various methods of forming a CMOS structure having silicided contacts in which the polySi gate heights are substantially the same across the entire surface of a semiconductor structure.

Abstract: A nonvolatile memory device includes a semiconductor substrate. A charge storage insulating film containing metal silicide nanocrystals is on the substrate. A gate electrode is on the charge storage insulating film. Related methods of forming metal silicide nanocrystals, and methods of forming nonvolatile memory devices including metal silicide nanocrystals, are also disclosed.

Abstract: A method of forming a metal layer on the conductive region of a semiconductor device includes concurrently supplying a mixture gas including a hydrogen gas and a metal chloride compound gas, and a purge gas into a chamber having a sealed space for a predetermined time, thereby forming a first metal layer on the semiconductor substrate, using a plasma enhanced chemical vapor deposition (PECVD) method. The hydrogen gas and metal chloride gases are thereafter alternately supplied for a predetermined time while the purge gas is continuously supplied into the chamber, thereby forming a second metal layer on the first metal layer, using a PECVD method. Deterioration of semiconductor devices due to high heat by a conventional CVD method can be prevented using a PECVD method as a low temperature process, thereby improving a production yield.

Abstract: A semiconductor capacitor structure comprising sidewalls of conductive hemispherical grained material, a base of metal silicide material, and a metal nitride material overlying the conductive hemispherical grained material and the metal silicide material. The semiconductor capacitor structure is fabricated by forming a base of metal silicide material along the sidewalls of an insulative material having an opening therein, forming sidewalls of conductive hemispherical grained material on the metal silicide material, and forming a metal nitride material overlying the conductive hemispherical grained material and the metal silicide material.

Abstract: Enhanced step coverage and reduced resistivity of a TaSiN layer may be achieved when a semiconductor device is manufactured by: forming an interlayer insulating layer on a semiconductor substrate, the interlayer insulating layer having a contact hole that partially exposes the substrate; depositing a TaN thin film on the interlayer insulating layer and in the contact hole using a reaction gas containing a Ta precursor and a nitrogen source gas; removing impurities from the TaN thin film; forming a TaSiN thin film by reacting the impurity-removed TaN thin film with a silicon source gas, and repeating the TaN-depositing, impurity-removing, and silicon source gas-reacting steps.

Abstract: A semiconductor component having a titanium silicide contact structure and a method for manufacturing the semiconductor component. A layer of dielectric material is formed over a semiconductor substrate. An opening having sidewalls is formed in the dielectric layer and exposes a portion of the semiconductor substrate. Titanium silicide is disposed on the dielectric layer, sidewalls, and the exposed portion of the semiconductor substrate. The titanium silicide may be formed by disposing titanium on the dielectric layer, sidewalls, and exposed portion of the semiconductor substrate and reacting the titanium with silane. Alternatively, the titanium silicide may be sputter deposited. A layer of titanium nitride is formed on the titanium silicide. A layer of tungsten is formed on the titanium nitride. The tungsten, titanium nitride, and titanium silicide are polished to form the contact structures.

Abstract: The invention includes methods of forming titanium-containing materials, such as, for example, titanium silicide. The invention can use alternating cycles of titanium halide precursor and one or more reductants to form the titanium-containing material. For instance, the invention can utilize alternating cycles of titanium tetrachloride and activated hydrogen to form titanium silicide on a surface of a silicon-containing substrate.

Abstract: A metallization layer that includes a tantalum layer located on the component, a tantalum silicide layer located on the tantalum layer, and a platinum silicide layer located on the tantalum silicide layer. In another embodiment the invention is a component having a metallization layer on the component. In another embodiment, the metallization layer has a post-annealing adhesive strength to silicon of at least about 100 MPa as measured by a mechanical shear test after exposure to a temperature of about 600° C. for about 30 minutes, and the metallization layer remains structurally intact after exposure to a temperature of about 600° C. for about 1000 hours. The metallization is useful for bonding with brazing alloys.

Abstract: Methods of fully siliciding semiconductive materials of semiconductor devices are disclosed. A preferred embodiment comprises depositing an alloy comprised of a first metal and a second metal over a semiconductive material. The device is heated, causing atoms of the semiconductive material to move towards and bond to the atoms of the second metal, leaving vacancies in the semiconductive material, and causing atoms of the first metal to move into the vacancies in the semiconductive material.

Abstract: A method that solves the increased nucleation temperature that is exhibited during the formation of cobalt disilicides in the presence of Ge atoms is provided. The reduction in silicide formation temperature is achieved by first providing a structure including a Co layer including at least Ni, as an additive element, on top of a SiGe containing substrate. Next, the structure is subjected to a self-aligned silicide process which includes a first anneal, a selective etching step and a second anneal to form a solid solution of (Co, Ni) disilicide on the SiGe containing substrate. The Co layer including at least Ni can comprise an alloy layer of Co and Ni, a stack of Ni/Co or a stack of Co/Ni. A semiconductor structure including the solid solution of (Co, Ni) disilicide on the SiGe containing substrate is also provided.

Abstract: A method of forming an ohmic contact layer including forming an insulation layer pattern on a substrate, the insulation pattern layer having an opening selectively exposing a silicon bearing layer, forming a metal layer on the exposed silicon bearing layer using an electrode-less plating process, and forming a metal silicide layer from the silicon bearing layer and the metal layer using a silicidation process. Also, a method of forming metal wiring in a semiconductor device using the foregoing method of forming an ohmic contact layer.

Abstract: An insulation film having an open part in which a silicon part is exposed at a bottom surface is formed on a silicon substrate for forming a semiconductor device. Titanium is deposited to form a titanium film on the bottom surface and side wall surfaces of the contact hole. The silicon substrate and the titanium film are reacted with each other by a first annealing process to form a titanium silicide film on the bottom surface. After the titanium film that remains on the side wall surfaces of the contact hole is removed, a hydrogen annealing process is performed. This hydrogen annealing reduces the density of the interface level in the interface between the silicon substrate, the gate insulation film on the substrate surface, or the like, and improves the characteristics of the semiconductor device. After the hydrogen annealing, tungsten is deposited in the remaining space of the contact hole to form a tungsten plug.

Abstract: A semiconductor device and a method for forming it are described. The semoiconductor device comprises a metal NMOS gate electrode that is formed on a first part of a substrate, and a silicide PMOS gate electrode that is formed on a second part of the substrate.

Abstract: Formation of an WNX film 24 constituting a barrier layer of a gate electrode 7A having a polymetal structure is effected in an atmosphere containing a high concentration nitrogen gas, whereby release of N (nitrogen) from the WNX film 24 is suppressed in the heat treatment step after the formation of the gate electrode 7A.

Abstract: There are disclosed TFTs that have excellent characteristics and can be fabricated with a high yield. The TFTs are fabricated, using an active layer crystallized by making use of nickel. Gate electrodes are comprising tantalum. Phosphorus is introduced into source/drain regions. Then, a heat treatment is performed to getter nickel element in the active layer and to drive it into the source/drain regions. At the same time, the source/drain regions can be annealed out. The rate electrodes of tantalum can withstand this heat treatment.

Abstract: The invention includes methods of forming conductive metal silicides by reaction of metal with silicon. In one implementation, such a method includes providing a semiconductor substrate comprising an exposed elemental silicon containing surface. At least one of a nitride, boride, carbide, or oxide comprising layer is atomic layer deposited onto the exposed elemental silicon containing surface to a thickness no greater than 15 Angstroms. Such layer is exposed to plasma and a conductive reaction layer including at least one of an elemental metal or metal rich silicide is deposited onto the plasma exposed layer. Metal of the conductive reaction layer is reacted with elemental silicon of the substrate effective to form a conductive metal silicide comprising contact region electrically connecting the conductive reaction layer with the substrate. Other aspects and implementations are contemplated.

Abstract: A method for forming a silicide layer on a silicon surface is provided. First, inert gas ions are implanted into the silicon surface. Then, a metal layer is formed on the surface and subsequently converted into the suicide layer. Thereby the resistance of the silicide can be reduced and the uniformity can be raised without substantially altering the doping concentration of conductive component(s). Thus, the efficiency of the semiconductor device can be enhanced.

Abstract: A method of manufacture of a semiconductor device includes forming a gate insulating film and a gate electrode made of polycrystalline silicon over a semiconductor substrate; implanting ions into the semiconductor substrate to form a semiconductor region as a source or drain; forming a cobalt film and a titanium nitride film over the semiconductor substrate to cover the gate electrode; carrying out annealing to cause a reaction between Co and Si and the semiconductor region to form a CoSi layer; carrying out wet cleaning to remove the titanium nitride film and unreacted cobalt film to leave the CoSi layer over the gate electrode and semiconductor region; carrying out annealing to cause a reaction between the CoSi layer and the gate electrode and semiconductor region to form a CoSi2 layer; carrying out HPM cleaning; and forming over the semiconductor substrate a silicon nitride film by low-pressure CVD to cover the gate electrode.

Abstract: A semiconductor device including at least one conductive structure is provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal salicide layer and a protection layer. The refractory metal salicide layer is disposed over the silicon-containing conductive layer. The protection layer is disposed over the refractory metal salicide layer. Another semiconductor device including at least one conductive structure is also provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal alloy salicide layer and a protection layer. The refractory metal alloy salicide layer is disposed over the silicon-containing conductive layer. The refractory metal alloy salicide layer is formed from a reaction of silicon of the silicon-containing conductive layer and a refractory metal alloy layer which includes a first refractory metal and a second refractory metal. The protection layer is disposed over the refractory metal alloy salicide layer.

Abstract: By performing a silicidation process on the basis of a patterned dielectric layer, such as an interlayer dielectric material, the respective metal silicide portions may be provided in a highly localized manner at the respective contact regions, while the overall amount of metal silicide may be significantly reduced. In this way, a negative influence of the stress of metal silicide on the channel regions of field effect transistors may be significantly reduced, while nevertheless maintaining a low contact resistance.

Abstract: In the method for manufacturing a semiconductor device relating to the present invention, first, a metal film is formed onto a substrate in the state where a silicide forming region is exposed onto the surface of substrate. Next, thermal processes at pressure higher than atmosphere are conducted to the substrate where the metal film is formed, and a silicide film is formed by reacting silicon contained in the silicide forming region with the metal film. Subsequently, after an unreacted metal film is removed during the thermal process, crystalline phase transition is initiated via the thermal process, and low resistance of the silicide film formed on the substrate is realized. These steps enable the stable formation of the silicide film with low resistance.

Abstract: A method for producing an electro-optical apparatus includes forming a WSi film by sputtering including bombarding a target with plasma ions of an atmosphere injected into a vacuum chamber under reduced pressure to eject particles from the target and depositing the particles on a substrate to be used to form the electro-optical apparatus. The WSi film is formed in such a manner that the average deposition rate of the WSi film deposited on the substrate is equal to or higher than an average deposition rate at the limit of discharge maintenance in sputtering and 35 ?/s or less.

Abstract: A method for forming a metal silicate as a high k dielectric in an electronic device, comprising the steps of: providing diethylsilane to a reaction zone; concurrently providing a source of oxygen to the reaction zone; concurrently providing a metal precursor to the reaction zone; reacting the diethylsilane, source of oxygen and metal precursor by chemical vapor deposition to form a metal silicate on a substrate comprising the electronic device. The metal is preferably hafnium, zirconium or mixtures thereof. The dielectric constant of the metal silicate film can be tuned based upon the relative atomic concentration of metal, silicon, and oxygen in the film.

Abstract: A method of fabricating a via and a trench is disclosed. A disclosed method comprises: forming a via hole and a trench in a interlayer dielectric layer on a semiconductor substrate where a predetermined device is formed; depositing a thin Hf layer on the substrate; performing a thermal treatment of the substrate to getter oxygen and forming a barrier layer; and filling copper into the via hole and the trench.

Abstract: A W plug (24) is formed and a W oxidation preventing barrier metal film (25) is formed thereon. After that, an SiON film (27) thinner than the W oxidation preventing barrier metal film (25) is formed and Ar sputter etching is performed on the SiON film (27). As a result, the shape of the surface of the SiON film (27) becomes gentler and deep trenches disappear. Next, an SiON film (28) is formed on the whole surface. A voidless W oxidation preventing insulating film (29) is composed of the SiON (28) film and the SiON film (27).

Abstract: Methods for depositing a metal layer on an integrated circuit device comprising providing a transition metal precursor, carrier gas and hydrogen gas to a deposition chamber such that the partial pressure of the precursor and carrier gas exceeds about 0.25 Torr and the partial pressure of hydrogen gas exceeds about 2.5 Torr are disclosed. Methods of forming a cobalt layer on an integrated circuit device are also disclosed.

Abstract: A nonvolatile semiconductor memory device of a split gate structure having a gate of low resistance suitable to the arrangement of a memory cell array is provided. When being formed of a side wall spacer, a memory gate is formed of polycrystal silicon and then replaced with nickel silicide. Thus, its resistance can be lowered with no effect on the silicidation to the selection gate or the diffusion layer.

Abstract: A cleaning solution selectively removes a titanium nitride layer and a non-reacting metal layer. The cleaning solution includes an acid solution and an oxidation agent with iodine. The cleaning solution also effectively removes a photoresist layer and organic materials. Moreover, the cleaning solution can be employed in tungsten gate electrode technologies that have been spotlighted because of the capability to improve device operation characteristics.

Abstract: In a semiconductor device using a polysilicon contact, such as a poly plug between a transistor and a capacitor in a container cell, an interface is provided where the poly plug would otherwise contact the bottom plate of the capacitor. The interface bars silicon from the plug from diffusing into the capacitor's dielectric. The interface can also include an oxygen barrier to prevent the poly plug from oxidizing during processing. Below the interface is a silicide layer to help enhance electrical contact with the poly plug. In a preferred method, the interface is created by selectively depositing a layer of titanium over a recessed poly plug to the exclusion of the surrounding oxide. The deposition process allows for silicidation of the titanium. The top half of the titanium silicide is then nitridized. A conformal ruthenium or ruthenium oxide layer is subsequently deposited, covering the titanium nitride and lining the sides and bottom of the container cell.

Abstract: For improving the reliability of a semiconductor device having a stacked structure of a polycrystalline silicon film and a tungsten silicide film, the device is manufactured by forming a polycrystalline silicon film, a tungsten silicide film and an insulating film successively over a gate insulating film disposed over the main surface of a semiconductor substrate, and patterning them to form a gate electrode having a stacked structure consisting of the polycrystalline silicon film and tungsten silicide film. The polycrystalline silicon film has two regions, one region formed by an impurity-doped polycrystalline silicon and the other one formed by non-doped polycrystalline silicon. The tungsten silicide film is deposited so that the resistivity of it upon film formation would exceed 1000 ??cm.

Abstract: The process for forming a film of TiSiN includes the following sequence of steps: deposition of a TiN film at medium temperature, for example, 300-450° C., by thermal decomposition of a metallorganic precursor, for example TDMAT (Tetrakis Dimethylamino Titanium); exposition to a silicon releasing gas, such as silane (SiH4) and dichlorosilane (SiH2Cl2) at 10-90 sccm—standard cube centimeters per minute—for a quite long time, for example, longer than 10 s but less than 90 s, preferably about 40 s; exposition to a H2/N2 plasma at 200-800 sccm, for 10-90 s, preferably about 40 s.

Abstract: In one example of the invention, a method for depositing a tantalum-containing material on a substrate in a process chamber is provided which includes exposing the substrate to a tantalum precursor that contains TAIMATA and to at least one secondary precursor to deposit a tantalum-containing material during an atomic layer deposition (ALD) process. The ALD process is repeated until the tantalum-containing material is deposited having a predetermined thickness. Usually, the TAIMATA is preheated prior to pulsing the tantalum precursor into the process chamber. Subsequently, a metal layer, such as tungsten or copper, may be deposited on the tantalum-containing material. The tantalum-containing material may contain tantalum, tantalum nitride, tantalum silicon nitride, tantalum boron nitride, tantalum phosphorous nitride, or tantalum oxynitride. The tantalum-containing material may be deposited as a barrier or adhesion layer within a via or as a gate electrode material within a source/drain device.

Abstract: A metal salicide layer is formed by sequentially depositing a physical vapor deposition (PVD) metal layer and a chemical vapor deposition (CVD) metal layer on a semiconductor device having an exposed silicon surface so as to form a double metal layer. The semiconductor device is annealed to react the double metal layer with the silicon surface. At least a portion of the double layer that has not reacted with the silicon surface is stripped. The semiconductor device is annealed after stripping at least the portion of the double metal layer.

Abstract: A semiconductor manufacturing process for depositing a tungsten silicide film on a substrate includes deposition of a tungsten silicide nucleation layer on the substrate using a (CVD) process with a silane source gas followed by deposition of the tungsten silicide film with a dichlorosilane source gas. This two step process allows dichlorosilane to be used as a silicon source gas for depositing a tungsten silicide film at a lower temperature than would otherwise by possible and without plasma enhancement. Tungsten silicide films deposited by this process are characterized by low impurities, good step coverage, and low stress with the silicon substrate.