With Substrate Handling (e.g., Conveying, Etc.) Patents (Class 438/716)
  • Patent number: 5849638
    Abstract: The present invention includes a method and system to increase the deep trench sidewall surface area in a storage node on a DRAM chip. By tilting the trenches the capacitance is increased without taking up more space on the semiconductor chip.
    Type: Grant
    Filed: January 21, 1997
    Date of Patent: December 15, 1998
    Assignee: International Business Machines Corporation
    Inventors: Herbert Lei Ho, David Edward Kotecki, Carl John Radens
  • Patent number: 5789324
    Abstract: A uniform gas flow is provided at the surface of a planar device or wafer in a processing system having a substantially cylindrical chamber through which processing gases flow toward an asymmetrically located outlet port by using an appropriately disposed collar or baffle along the gas stream in the chamber in the plane of the surface of the planar device or wafer.
    Type: Grant
    Filed: March 18, 1997
    Date of Patent: August 4, 1998
    Assignee: International Business Machines Corporation
    Inventors: Anthony John Canale, Randy Dean Cox, Dennis Stanley Grimard, Tracy Charles Hetrick
  • Patent number: 5788868
    Abstract: An interface apparatus is disposed between a processing unit for performing varied treatments on substrates before and after exposure of the substrates, and an exposure unit for performing the exposure. The interface apparatus includes first and second substrate transfer robots, and a substrate storage having a plurality of storage racks for storing a plurality of substrates. The first substrate transfer robot transfer substrates between the processing unit and substrate storage while the second substrate transfer robot transfers substrates between the substrate storage and exposure unit. Each of the robots is operable independently of and parallel to the other robot. The first transfer robot may be omitted, and when it is so omitted, a substrate transport robot in the processing unit performs the functions of the first transfer robot.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: August 4, 1998
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Masayuki Itaba, Kazuhiro Nishimura
  • Patent number: 5744400
    Abstract: An ion milling technique for forming non-planar features on a semiconductor wafer into relatively planar features for further layer deposition replaces the conventional polishing technique currently in use. The technique employs a first ion gun directing a beam normal to the wafer surface and operative to impact the features uniformly to exaggerate the hills of the feature into steep peaks and to form the valleys therebetween into shallow valleys. The technique also employs a second ion gun directed normal to the steep slopes of the peaks and aimed at a portion of the radius of the wafer while the wafer is rotated. The second beam takes advantage of the fact that the peaks mill at a rate twice as fast as the shallow valleys and the first ion beam operates to magnify the aspect ratio between the peaks and the valleys to ensure that the different rates of milling actually occurs when the second ion beam is brought into play.
    Type: Grant
    Filed: May 6, 1996
    Date of Patent: April 28, 1998
    Assignee: Accord Semiconductor Equipment Group
    Inventor: Timothy Scott Dyer
  • Patent number: 5662770
    Abstract: This invention is a hardware modification which permits greater uniformity of etching to be achieved in a high-density-source plasma reactor (i.e., one which uses a remote source to generate a plasma, and which also uses high-frequency bias power on the wafer chuck). The invention addresses the uniformity problem which arises as the result of nonuniform power coupling between the wafer and the walls of the etch chamber. The solution to greatly mitigate the nonuniformity problem is to increase the impedance between the wafer and the chamber walls. This may be accomplished by placing a cylindrical dielectric wall around the wafer. Quartz is a dielectric material that is ideal for the cylindrical wall if silicon is to be etched selectively with respect to silicon dioxide, as quartz it is virtually inert under such conditions.
    Type: Grant
    Filed: April 16, 1993
    Date of Patent: September 2, 1997
    Assignee: Micron Technology, Inc.
    Inventor: Kevin G. Donohoe