Abstract: In one example, a chamber inlet assembly includes a chamber inlet, an outer coupling for a delivery line, and an inner coupling for a processing region of a processing chamber. The inner coupling and the outer coupling are on inner and outer ends, respectively, of the chamber inlet, wherein a cross-sectional area of the inner coupling is larger than a cross-sectional area of the outer coupling. The chamber inlet assembly also includes a longitudinal profile including the inner and outer ends and a first side and a second side, the first and second sides being on opposite sides of the chamber inlet, wherein a shape of the longitudinal profile comprises at least one of triangular, modified triangular, trapezoidal, modified trapezoidal, rectangular, modified rectangular, rhomboidal, and modified rhomboidal. The chamber inlet assembly also includes cassette including the chamber inlet and configured to set into a side wall of the processing chamber.

Abstract: A sputtering target including an oxide that includes an indium (In) element, a tin (Sn) element, a zinc (Zn) element and an aluminum (Al) element, wherein the oxide includes a homologous structure compound represented by InAlO3(ZnO)m (m is 0.1 to 10) and a bixbyite structure compound represented by In2O3.

Abstract: Provided is a physical vapor deposition (PVD) method in which a thick, hard carbon film having excellent durability can be formed, and chipping resistance and wear resistance can bot be achieved while improving the low friction properties and peeling resistance of the formed hard carbon film. Provided is a coating film having a total film thickness of greater than 1 ?m and less than or equal to 50 ?m, wherein, when observed using a bright field TEM image, the cross section of the coating film is revealed to consist of relatively white hard carbon layers and relatively black hard carbon layers alternately stacked in the thickness direction, and the white hard carbon layers have a region having a columns-shape, which has grown in the thickness direction.

Abstract: Apparatus and methods for generating a flow of radicals are provided. An ion blocker is positioned a distance from a faceplate of a remote plasma source. The ion blocker has openings to allow the plasma to flow through. The ion blocker is polarized relative to a showerhead positioned on an opposite side of the ion blocker so that there are substantially no plasma gas ions passing through the showerhead.

Abstract: Interconnect structures and corresponding techniques for forming the interconnect structures are disclosed herein. An exemplary method includes forming a contact opening in a dielectric layer. The contact opening has sidewalls defined by the dielectric layer and a bottom defined by a conductive feature. An ALD-like nitrogen-containing plasma pre-treatment process is performed on the sidewalls (and, in some implementations, the bottom) of the contact opening. An ALD process is performed to form a titanium-and-nitrogen containing barrier layer over the sidewalls and the bottom of the contact opening. A cobalt-containing bulk layer is then formed over the titanium-and-nitrogen-containing barrier layer. A cycle of the ALD-like nitrogen-containing plasma pre-treatment process can include a nitrogen-containing plasma pulse phase and a purge phase. A cycle of the ALD process can include a titanium-containing pulse phase, a first purge phase, a nitrogen-containing plasma pulse phase, and a second purge phase.

Abstract: A semiconductor device has a silicon layer having a photoelectric conversion portion, a transfer electrode of a transfer portion disposed on the silicon layer, the transfer portion transferring a charge of the photoelectric conversion portion, and an insulator film having a first portion located between the transfer electrode and the silicon layer and a second portion located on the photoelectric conversion portion, the first portion and the second portion of the insulator film contain nitrogen, oxygen, and silicon, and the distance between the position where the nitrogen concentration shows the largest value in the second portion and the silicon layer is larger than the distance between the position where the nitrogen concentration shows the largest value in the first portion and the silicon layer.

Abstract: A photoelectric conversion section contains a semiconductor element having a laminated structure which contains an electroconductor, a semiconductor, and an insulator provided between the electroconductor and the semiconductor, in which the insulator is a silicon oxide film containing nitrogen in a main portion located between the electroconductor and the semiconductor.

Abstract: A nonvolatile trapped-charge memory device and method of fabricating the same are described. Generally, the memory device includes a tunneling layer on a substrate, a charge trapping layer on the tunneling layer, and a blocking layer on the charge trapping layer. The tunneling layer includes a nitrided oxide film formed by annealling an oxide grown on the substrate using a nitrogen source. The tunneling layer comprises a first region proximate to the substrate, and a second region proximate to the charge trapping layer, and wherein the nitrogen concentration decreases from a first interface between the second region and the charge trapping layer to a second interface between the first region and the substrate to reduce nitrogen trap density at the second interface. Other embodiments are also described.

Abstract: Methods for plasma treatment of films to remove impurities are disclosed herein. Methods for removing impurities can include positioning a substrate with a barrier layer in a processing chamber, the barrier layer comprising a barrier metal and one or more impurities, maintaining the substrate at a bias, creating a plasma comprising a treatment gas, the treatment gas comprising an inert gas, delivering the treatment gas to the substrate to reduce the ratio of one or more impurities in the barrier layer, and reacting a deposition gas comprising a metal halide and hydrogen-containing gas to deposit a bulk metal layer on the barrier layer. The methods can further include the use of diborane to create selective nucleation in features over surface regions of the substrate.

Abstract: Methods of and hybrid factories for thin-film battery manufacturing are described. A method includes operations for fabricating a thin-film battery. A hybrid factory includes one or more tool sets for fabricating a thin-film battery.

Abstract: SiC substrates are cleaned and provided to a process chamber. In-situ plasma surface treatments are applied to further clean the surface of the substrate. A dielectric interface layer is deposited in-situ to passivate the surface. Metal layers having a low work function are deposited above the dielectric interface layer. The stack is annealed at about 500C in forming gas to form low resistivity ohmic contacts to the SiC substrate. SiC substrates are cleaned and provided to a process chamber. In-situ plasma surface treatments are applied to further clean the surface of the substrate. A silicon oxide dielectric interface layer is deposited in-situ to passivate the surface. Optional plasma surface treatments are applied to further improve the performance of the silicon oxide dielectric interface layer. An aluminum oxide gate dielectric layer is deposited above the silicon oxide dielectric interface layer.

Abstract: Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method includes exposing a first layer of a substrate to a plasma formed from a process gas comprising predominantly a mixture of ammonia (NH3) and a noble gas, wherein ammonia is about 0.5 to about 15 percent of the process gas; and maintaining the process chamber at a pressure of about 10 mTorr to about 80 mTorr while exposing the first layer to the plasma to transform at least an upper portion of the first layer into a nitrogen-containing layer.

Abstract: A thin film transistor in which deterioration at initial operation is not likely to be caused and a manufacturing method thereof. A transistor which includes a gate insulating layer at least whose uppermost surface is a silicon nitride layer, a semiconductor layer over the gate insulating layer, and a buffer layer over the semiconductor layer and in which the concentration of nitrogen in the vicinity of an interface between the semiconductor layer and the gate insulating layer, which is in the semiconductor layer is lower than that of the buffer layer and other parts of the semiconductor layer. Such a thin film transistor can be manufactured by exposing the gate insulating layer to an air atmosphere and performing plasma treatment on the gate insulating layer before the semiconductor layer is formed.

Abstract: A gate dielectric can be formed by depositing a first silicon oxide material by a first atomic layer deposition process. The thickness of the first silicon oxide material is selected to correspond to at least 10 deposition cycles of the first atomic layer deposition process. The first silicon oxide material is converted into a first silicon oxynitride material by a first plasma nitridation process. A second silicon oxide material is subsequently deposited by a second atomic layer deposition process. The second silicon oxide material is converted into a second silicon oxynitride material by a second plasma nitridation process. Multiple repetitions of the atomic layer deposition process and the plasma nitridation process provides a silicon oxynitride material having a ratio of nitrogen atoms to oxygen atoms greater than 1/3, which can be advantageously employed to reduce the leakage current through a gate dielectric.

Abstract: A method of forming a dielectric layer, the method including sequentially forming a first oxide layer, a nitride layer, and a second oxide layer on a substrate by performing a plasma-enhanced atomic layer deposition process, wherein a first nitrogen plasma treatment is performed after forming the first oxide layer.

Abstract: When forming a TiN film to be formed as a metallic hard mask for etching a film formed on a substrate to be processed, a first step and a second step are repeated a plurality of times to form a TiN film having reduced film stress. In the first step (step 1), the substrate to be processed is conveyed into a processing chamber, TiCl4 gas and a nitriding gas are fed into the processing chamber, the interior of which being kept in a depressurized state during this time, and a plasma from the gases is generated to form a TiN unit film. In the second step (step 2), a nitriding gas is fed into the processing container, a plasma of the gas is generated, and the TiN unit film is subjected to plasma nitriding.

Abstract: Methods of fabricating semiconductor structures include the formation of molybdenum nitride at one or more surfaces of a substrate comprising molybdenum, and providing a layer of III-V semiconductor material, such as GaN, over the substrate. Semiconductor structures formed by methods described herein may include a substrate comprising molybdenum, molybdenum nitride at one or more surfaces of the substrate, and a layer of GaN bonded to the molybdenum nitride.

Abstract: Embodiments described herein generally relate to methods for manufacturing flash memory devices. In one embodiment, the method includes generating a plasma comprising nitrogen-containing radicals in a remote plasma applicator, flowing the plasma comprising nitrogen-containing radicals into a processing region of the processing chamber where a semiconductor device is disposed, wherein the semiconductor device has a substrate comprising an oxide layer formed thereon, exposing an exposed surface of the oxide layer to the nitrogen-containing radicals, and incorporating nitrogen in the exposed surface of the oxide layer of the substrate.

Abstract: In some embodiments of the present invention, methods of using one or more small spot showerhead apparatus to deposit materials using CVD, PECVD, ALD, or PEALD on small spots in a site isolated, combinatorial manner are described. The small spot showerheads may be configured within a larger combinatorial showerhead to allow multi-layer film stacks to be deposited in a combinatorial manner.

Abstract: A method of operating vertical heat treatment apparatus includes: cleaning interior of vertical reaction chamber by supplying cleaning gas; pre-coating the interior of the reaction chamber by performing, a plurality of times, a cycle including alternately supplying the first gas and supplying the second gas while generating plasma from the second gas; eliminating charges by loading substrate holding unit holding a dummy semiconductor substrate or a conductive substrate into the reaction chamber and supplying the second gas while generating plasma from the second gas without supplying the first gas; loading the substrate holding unit holding a plurality of product semiconductor substrates into the reaction chamber; and forming thin film in the reaction chamber by performing, a plurality of times, a cycle including alternately supplying the first gas and supplying the second gas while generating plasma from the second gas.

Abstract: Methods of forming a layer on a substrate may include providing a substrate to a process chamber, the process chamber having a gas port, an exhaust, and a plasma port disposed between the gas port and the exhaust; providing a process gas from the gas port in a first direction such that the process gas flows across the substrate; providing a plasma such that a flow of the plasma interacts with a flow of the process gas at an angle that is non-perpendicular; and rotating the substrate while providing the process gas and the plasma, wherein a thickness profile of the layer is controlled by adjusting at least one of a flow velocity of the process gas, a flow velocity of the plasma, the angle the flow of the plasma interacts with the flow of the process gas, or a direction of rotation of the substrate.

Abstract: Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method includes placing a substrate having a first layer disposed thereon on a substrate support of a process chamber; heating the substrate to a first temperature; and exposing the first layer to an RF plasma formed from a process gas comprising ammonia (NH3) to transform the first layer into a nitrogen-containing layer, wherein the plasma has an ion energy of less than about 8 eV.

Abstract: A method for forming titanium nitride by PVD is disclosed, comprising: generating ions of a noble gas by glow discharge under a vacuum condition that a nitrogen gas and the noble gas are supplied; nitriding a surface of a wafer and a surface of a titanium target with the nitrogen gas; bombarding the surface of the titanium target with the ions of the noble gas after they are accelerated in an electric field so that titanium ions and titanium nitride are sputtered; and forming a titanium nitride layer by depositing titanium nitride on the surface of the wafer in a magnetic field, while titanium ions are injected into the surface of the wafer so that stress is introduced into the titanium nitride layer, wherein non-crystallization fraction of the titanium nitride layer and stress in the titanium nitride layer are increased by increasing kinetic energy of titanium ions which are injected into the surface of the wafer.

Abstract: Methods and apparatus for selective one-step nitridation of semiconductor substrates is provided. Nitrogen is selectively incorporated in silicon regions of a semiconductor substrate having silicon regions and silicon oxide regions by use of a selective nitridation process. Nitrogen containing radicals may be directed toward the substrate by forming a nitrogen containing plasma and filtering or removing ions from the plasma, or a thermal nitridation process using selective precursors may be performed. A remote plasma generator may be coupled to a processing chamber, optionally including one or more ion filters, showerheads, and radical distributors, or an in situ plasma may be generated and one or more ion filters or shields disposed in the chamber between the plasma generation zone and the substrate support.

Abstract: Methods for preventing line collapse during the fabrication of NAND flash memory and other microelectronic devices that utilize closely spaced device structures with high aspect ratios are described. In some embodiments, one or more mechanical support structures may be provided to prevent the collapse of closely spaced device structures during fabrication. In one example, during fabrication of a NAND flash memory, one or more mechanical support structures may be set in place prior to performing a high aspect ratio word line etch for forming the NAND strings. The one or more mechanical support structures may comprise one or more fin supports that are arranged in a bit line direction. In another example, the one or more mechanical support structures may be developed during the word line etch for forming the NAND strings.

Abstract: Embodiments described herein generally relate to methods for manufacturing flash memory devices. In one embodiment, the method includes generating a plasma comprising nitrogen-containing radicals in a remote plasma applicator, flowing the plasma comprising nitrogen-containing radicals into a processing region of the processing chamber where a semiconductor device is disposed, wherein the semiconductor device has a substrate comprising an oxide layer formed thereon, exposing an exposed surface of the oxide layer to the nitrogen-containing radicals, and incorporating nitrogen in the exposed surface of the oxide layer of the substrate.

Abstract: A process for fabricating a semiconductor device is described. A silicon oxide layer is formed. A nitridation process including at least two steps is performed to nitridate the silicon oxide layer into a silicon oxynitride (SiON) layer. The nitridation process comprises a first nitridation step and a second nitridation step in sequence, wherein the first nitridation step and the second nitridation step are different in the setting of at least one parameter.

Abstract: One illustrative method disclosed herein includes forming a mandrel structure above a semiconductor substrate, performing an oxidation process to oxidize at least a portion of the mandrel structure so as to thereby define oxidized regions on the mandrel structure, removing the oxidized regions to thereby defined a reduced thickness mandrel structure, forming a plurality of fins on the reduced thickness mandrel structure and performing an etching process to selectively remove at least a portion of the reduced thickness mandrel structure so as to thereby expose at least a portion of each of the fins.

Abstract: A method for fabricating a magnetic tunnel junction element includes forming a magneto resistance layer including a first magnetic layer, an insulation layer and a second magnetic layer on a substrate, forming a magnetic loss area by doping a magnetic loss impurity into a region of the magneto resistance layer to cause a magnetic loss, and etching the magnetic loss area to form a magnetic tunnel junction element.

Abstract: Described are methods of making silicon nitride (SiN) materials and other silicon-containing films, including carbon-containing and/or oxygen-containing films such as SiCN (also referred to as SiNC), SiON and SiONC films, on substrates. According to various embodiments, the methods involve electromagnetic radiation-assisted activation of one or more reactants. In certain embodiments, for example, the methods involve ultraviolet (UV) activation of vapor phase amine coreactants. The methods can be used to deposit silicon-containing films, including SiN and SiCN films, at temperatures below about 400° C.

Abstract: Described are methods of making silicon nitride (SiN) materials and other silicon-containing films, including carbon-containing and/or oxygen-containing films such as SiCN (also referred to as SiNC), SiON and SiONC films, on substrates. According to various embodiments, the methods involve electromagnetic radiation-assisted activation of one or more reactants. In certain embodiments, for example, the methods involve ultraviolet (UV) activation of vapor phase amine coreactants. The methods can be used to deposit silicon-containing films, including SiN and SiCN films, at temperatures below about 400° C.

Abstract: In some embodiments of the present invention, methods of using one or more small spot showerhead apparatus to deposit materials using CVD, PECVD, ALD, or PEALD on small spots in a site isolated, combinatorial manner are described. The small spot showerheads may be configured within a larger combinatorial showerhead to allow multi-layer film stacks to be deposited in a combinatorial manner.

Abstract: A substrate processing method uses a substrate processing apparatus including a chamber for accommodating a substrate, a lower electrode to mount the substrate, a first RF power applying unit for applying an RF power for plasma generation into the chamber, and a second RF power applying unit for applying an RF power for bias to the lower electrode. The RF power for plasma generation is controlled to be intermittently changed by changing an output of the first RF power applying unit at a predetermined timing. If no plasma state or an afterglow state exists in the chamber by a control of the first RF power applying unit, an output of the second RF power applying unit is controlled to be in an OFF state or decreased below an output of the second RF power applying unit when the output of the first RF power applying unit is a set output.

Abstract: Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method of forming a nitrogen-containing layer may include placing a substrate having a first layer disposed thereon on a substrate support of a process chamber; heating the substrate to a temperature of at least about 250 degrees Celsius; and exposing the first layer to a radio frequency (RF) plasma formed from a process gas consisting essentially of ammonia (NH3) and an inert gas while maintaining the process chamber at a pressure of about 10 mTorr to about 40 mTorr to transform at least an upper portion of the first layer into a nitrogen-containing layer.

Abstract: An arrangement for measuring process parameters within a processing chamber is provided. The arrangement includes a probe arrangement disposed in an opening of an upper electrode. Probe arrangement includes a probe head, which includes a head portion and a flange portion. The arrangement also includes an o-ring disposed between the upper electrode and the flange portion. The arrangement further includes a spacer made of an electrically insulative material positioned between the head portion and the opening of the upper electrode to prevent the probe arrangement from touching the upper electrode. The spacer includes a disk portion configured for supporting an underside of the flange portion. The spacer also includes a hollow cylindrical portion configured to encircle the head portion. The spacer forms a right-angled path between the o-ring and an opening to the processing chamber to prevent direct line-of-sight path between the o-ring and the opening to the processing chamber.

Abstract: The present invention provides an apparatus and method for a non-volatile memory comprising at least one array of memory cells with shallow trench isolation (STI) regions between bit lines for increased process margins. Specifically, in one embodiment, each of the memory cells in the array of memory cells includes a source, a control gate, and a drain, and is capable of storing at least one bit. The array of memory cells further includes word lines that are coupled to control gates of memory cells. The word lines are arranged in rows in the array. In addition, the array comprises bit lines coupled to source and drains of memory cells. The bit lines are arranged in columns in the array. Also, the array comprises at least one row of bit line contacts for providing electrical conductivity to the bit lines. Further, the array comprises shallow trench isolation (STI) regions separating each of the bit lines along the row of bit line contacts.

Abstract: A semiconductor device includes a MOSFET, and a plurality of stress layers disposed on the MOSFET, wherein the stress layers include a first stress layer disposed on the MOSFET and a second stress layer disposed on the first stress layer, the first stress layer has a first stress and the second stress layer has a second stress, and the first stress is different from the second stress.

Abstract: Described are methods of making silicon nitride (SiN) materials and other silicon-containing films, including carbon-containing and/or oxygen-containing films such as SiCN (also referred to as SiNC), SiON and SiONC films, on substrates. According to various embodiments, the methods involve electromagnetic radiation-assisted activation of one or more reactants. In certain embodiments, for example, the methods involve ultraviolet (UV) activation of vapor phase amine coreactants. The methods can be used to deposit silicon-containing films, including SiN and SiCN films, at temperatures below about 400° C.

Abstract: The present invention provides a method for manufacturing a gate dielectric (710) that includes providing a nitrided dielectric layer (220) over a substrate (120). The nitrided dielectric layer (220) has a nonuniform concentration of nitrogen in a bulk thereof. The nitrided dielectric layer (220) is exposed to oxygen radicals (410), resulting in a reduction of the non-uniformity.

Abstract: Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method includes placing a substrate having a first layer disposed thereon on a substrate support of a process chamber; heating the substrate to a temperature of at least about 250 degrees Celsius; and exposing the first layer to a radio frequency (RF) plasma formed from a process gas comprising nitrogen while maintaining the process chamber at a pressure of about 10 mTorr to about 40 mTorr to transform at least an upper portion of the first layer into a nitrogen-containing layer. In some embodiments, the process gas includes ammonia (NH3).

Abstract: A semiconductor process includes the following steps. A substrate having a recess is provided. A decoupled plasma nitridation process is performed to nitride the surface of the recess for forming a nitrogen containing liner on the surface of the recess. A nitrogen containing annealing process is then performed on the nitrogen containing liner.

Abstract: An object is to improve field effect mobility of a thin film transistor using an oxide semiconductor. Another object is to suppress increase in off current even in a thin film transistor with improved field effect mobility. In a thin film transistor using an oxide semiconductor layer, by forming a semiconductor layer having higher electrical conductivity and a smaller thickness than the oxide semiconductor layer between the oxide semiconductor layer and a gate insulating layer, field effect mobility of the thin film transistor can be improved, and increase in off current can be suppressed.

Abstract: A process for fabricating a semiconductor device is described. A silicon oxide layer is formed. A nitridation process including at least two steps is performed to nitridate the silicon oxide layer into a silicon oxynitride (SiON) layer. The nitridation process comprises a first nitridation step and a second nitridation step in sequence, wherein the first nitridation step and the second nitridation step are different in the setting of at least one parameter.

Abstract: Two plates, each comprising a thin layer of silicon or silicon oxide at a surface thereof, are bonded by subjecting the thin layer of at least one of the plates to a surface treatment step forming a silicon oxynitride superficial thin film with a thickness of less than 5nm. The thin film is performed with a nitrogen-based plasma generated by an inductively coupled plasma source. Furthermore, a potential difference applied between the plasma and a substrate holder supporting said plate during the surface treatment step is less than 50 V, advantageously less than 15 V and preferably zero. This enables a defect-free bonding interface to be obtained irrespective of a temperature of any heat treatment carried out after a contacting step between the respective thin layers of the two plates.

Abstract: A plasma processing method for use in device isolation by shallow trench isolation in which an insulating film is embedded in a trench formed in silicon and the insulating film is planarized to form a device isolation film, the method includes a plasma nitriding the silicon of an inner wall surface of the trench by using a plasma before embedding the insulating film in the trench. The plasma nitriding is performed by using a plasma of a processing gas containing a nitrogen-containing gas under conditions in which a processing pressure ranges from 1.3 Pa to 187 Pa and a ratio of a volumetric flow rate of the nitrogen-containing gas to a volumetric flow rate of the entire processing gas ranges from 1% to 80% such that a silicon nitride film is formed on the inner wall surface of the trench to have a thickness of 1 to 10 nm.

Abstract: A selective plasma nitriding method includes mounting an object to be processed on a mounting table in a processing chamber of a plasma processing apparatus, the object having a silicon surface and a silicon compound layer exposed; setting a pressure in the processing chamber within the range of about 66.7 Pa to 667 Pa; and generating a nitrogen-containing plasma while applying a bias voltage to the object by supplying to the mounting table a high frequency power with an output of about 0.1 W/cm2 to 1.2 W/cm2 per unit area of the object. The plasma nitriding method further includes selectively nitriding the silicon surface by the nitrogen-containing plasma to form a silicon nitride film.

Abstract: A thin film transistor includes a multi-coaxial silicon nanowire unit including a plurality of coaxial silicon nanowires on a substrate, the multi-coaxial silicon nanowire unit including a central portion and end portions of the central portion; a gate electrode on the central portion; and a source electrode and a drain electrode on the respective end portions, respectively, so as to electrically connect to the multi-coaxial silicon nanowire unit.

Abstract: According to the present invention,when a nitridation process by plasma generated by a microwave is applied to a substrate with an oxide film having been formed thereon to from an oxynitride film, the microwave is intermittently supplied. By the intermittent supply of the microwave, ion bombardment is reduced in accordance with a decrease in electron temperature, and a diffusion velocity of nitride species in the oxide film lowers, which as a result makes it possible to prevent nitrogen from concentrating in a substrate-side interface of an oxynitride film to increase the nitrogen concentration therein. Consequently,it is possible to improve quality of the oxynitride film, resulting in a reduced leadage current, an improved operating speed, and improved NBTI resistance.

Abstract: A method of forming threshold voltage controlled semiconductor structures is provided in which a conformal nitride-containing liner is formed on at least exposed sidewalls of a patterned gate dielectric material having a dielectric constant of greater than silicon oxide. The conformal nitride-containing liner is a thin layer that is formed using a low temperature (less than 500° C.) nitridation process.

Abstract: Disclosed is a substrate processing apparatus that includes: a substrate supporting member that supports a substrate; a processing chamber capable of housing the substrate supporting member; a rotating mechanism that rotates the substrate supporting member; a carrying mechanism that carries out the substrate supporting member from the processing chamber; a material gas supply system that supplies material gas into the processing chamber; a nitrogen-containing-gas supply system that supplies nitrogen containing gas into the processing chamber; and a controller that controls the material gas supply system, the nitrogen-containing-gas supply system, the carrying mechanism, and the rotating mechanism, after forming a nitride film on the substrate by using the material gas and the nitrogen containing gas, to carry out the substrate supporting member that supports the substrate while being rotated from the processing chamber.