Abstract: The present invention relates to a pinned photodiode for an image sensor and a method for manufacturing the same; and, more particularly, to a pinned photodiode of an image sensor fabricated by CMOS processes and a manufacturing method thereof The pinned photodiode, according to an embodiment of the present invention, includes a semiconductor layer of a first conductivity type; and at least two first doping regions of a second conductivity type alternately formed in the semiconductor layer and connected to each other at edges thereof so that the first doping regions have the same potential, wherein a plurality of PN junctions is formed in the semiconductor layer and the PN junctions improves a capturing capacity of photoelectric charges generated in the photodiode.

Abstract: An integrated circuit is provided that includes a substrate incorporating a semiconductor photodiode device having a p-n junction. The photodiode device includes at least one capacitive trench buried in the substrate and connected in parallel with the junction. In a preferred embodiment, the substrate is formed from silicon, and the capacitive trench includes an internal doped silicon region partially enveloped by an insulating wall that laterally separates the internal region from the substrate. Also provided is a method for fabricating an integrated circuit including a substrate that incorporates a semiconductor photodiode device having a p-n junction.

Abstract: The invention relates to a solar cell arrangement consisting of series-connected solar subcells. Said solar subcells consist of a semiconductor wafer which forms a common base material for all of the solar subcells and wherein a number of recesses are provided for delimiting the individual, series-connected solar subcells. The invention is characterised in that at least some of the recesses extend from the top surface of the semiconductor wafer, through the wafer itself to the bottom surface and in that at most some bridge segments are left in continuation of the recesses as far as the wafer edge, to mechanically interconnect the solar subcells.

Abstract: A gate oxide film 18 and a gate electrode 20 are formed on a surface of a P-type substrate 14. A concave portion 42 is provided in a region of the P-type substrate 14, the region being contiguous to the gate electrode 20. On the P-type substrate 14, an N-type drain region 30 is disposed on the opposite side of the gate electrode 20 from the concave portion 42. N-type impurities are implanted into the P-type substrate 14 at a predetermined angle relative to the latter, thereby forming an N-type region 44 which includes a region underneath the concave portion 42 and which is partially submerged beneath the gate oxide film 18. P-type impurities are then implanted into the P-type substrate 14 at right angles to the latter, thus forming a P-type region 46 which includes a region underneath the concave portion 42 while covering the N-type region 44 and which forms a PN junction diode in combination with the N-type region 44.

Abstract: If a semiconductor device employing semiconductor light-receiving elements is disposed on a single optical axis, laser light which is incident on these light-receiving elements is interrupted by the semiconductor device, and it will be impossible to confirm as a whole that the alignment of a multiplicity of components disposed over a distance has been correctly adjusted. This problem is overcome by using a semiconductor light-receiving element with a structure which absorbs only some of a received laser light beam and which allows the greater part of the beam to be transmitted to its rear face.

Abstract: The solar cell in the semiconductor substrate includes at least a radiation receiving front surface and a second surface. The substrate includes a first region of one type of conductivity and a second region of the opposite conductivity type with at least a first part located adjacent to the front surface and a second part located adjacent to the second surface. The front surface includes conductive contacts to the second region and the second surface has separated contacts to the first region and to the second region. The contacts to the second region at the second surface are connected to the contacts at the front surface through a limited number of vias.

Abstract: The present invention discloses a small spherical solar cell SS (spherical semiconductor) and the manufacturing method for the same, comprising: a spherical core 1; a reflective film 2 formed on the surface of core 1; a semiconductor thin film layer (p type polycrystalline silicon thin film 4a, n+ diffusion layer 7) which is approximately spherical and is formed on the surface of reflective film 2; a n+p junction 8 which is formed on semiconductor thin film layer; passivation film 9; and a surface protective film 10 of titanium dioxide; a pair of electrodes 11a, 11b connected to both sides of n+p junction 8. Other than spherical solar cell SS, the following are also disclosed: a spherical crystal manufacturing device; 2 types of spherical solar cells; 2 types of spherical photocatalytic elements; a spherical light emitting element which emits visible blue light; 2 types of spherical semiconductor device materials.

Abstract: The present invention relates to electro optical devices with a reduced filter thinning on the edge pixels and a method for reducing the thinning of filter layers on the pixels closest to the edge of an electro optical device such as a photosensitive chip, as would be used, for example, in a full-color digital copier or scanner. A semiconductor wafer includes a main surface defining a plurality of chip areas and tab regions separated by grooves, wherein the chip areas include inner photosites, outer photosites and bonding pads. A plurality of dams are deposited over the main surface in the tab regions, and a clear layer is deposited over the main surface exclusive of the bonding pads. Alternatively, a clear layer is deposited over the main surface exclusive of the bonding pads, and a plurality of tabs is then deposited in the tab regions on the main surface.

Abstract: A monolithically interconnected photovoltaic module having cells which are electrically connected which comprises a substrate, a plurality of cells formed over the substrate, each cell including a primary absorber layer having a light receiving surface and a p-region, formed with a p-type dopant, and an n-region formed with an n-type dopant adjacent the p-region to form a single pn-junction, and a cell isolation diode layer having a p-region, formed with a p-type dopant, and an n-region formed with an n-type dopant adjacent the p-region to form a single pn-junction, the diode layer intervening the substrate and the absorber layer wherein the absorber and diode interfacial regions of a same conductivity type orientation, the diode layer having a reverse-breakdown voltage sufficient to prevent inter-cell shunting, and each cell electrically isolated from adjacent cells with a vertical trench trough the pn-junction of the diode layer, interconnects disposed in the trenches contacting the absorber regions of adja

Abstract: A sapphire substrate, a buffer layer of undoped GaN and a compound semiconductor crystal layer successively formed on the sapphire substrate together form a substrate of a light emitting diode. A first cladding layer of n-type GaN, an active layer of undoped In.sub.0.2 Ga.sub.0.8 N and a second cladding layer successively formed on the compound semiconductor crystal layer together form a device structure of the light emitting diode. On the second cladding layer, a p-type electrode is formed, and on the first cladding layer, an n-type electrode is formed. In a part of the sapphire substrate opposing the p-type electrode, a recess having a trapezoidal section is formed, so that the thickness of an upper portion of the sapphire substrate above the recess can be substantially equal to or smaller than the thickness of the compound semiconductor crystal layer.

Abstract: A method for manufacturing a magnetoresistance head of the present invention comprises the steps of forming an organic film on a multilayered film constituting a magnetoresistance device, forming an upper film formed of resist or inorganic film on the organic film, patterning the organic film and the upper film, cutting into edges of the organic film patterns from edges of the upper film patterns inwardly to such an extent that particles of the thin film being formed on the upper film and the multilayered film do not contact to side portions of the organic film patterns.

Abstract: The lateral overflow drain for charge coupled devices includes: a semiconductor region 70 of a first conductivity type having a trench 92; a drain region 24 of a second conductivity type below the trench 92; a gate 20 in the trench 92 overlying and separated from a portion of the semiconductor region 70; and a virtual gate 30 of the first conductivity type in the semiconductor region 70 adjacent the trench 92.