Direct Application Of Electric Current Patents (Class 438/88)
  • Patent number: 10950391
    Abstract: A method for manufacturing a photoelectric conversion device, that includes: forming a laminate structure of a substrate, a transparent electrode, an active layer produced by wet-coating, and a counter electrode, stacked in this order; and thereafter forming a cavity by: (a) pressing an adhesive material just against a defect formed on the surface of said counter electrode, and then peeling off said adhesive material together with said defect and the peripheral part thereof; or (b) sucking a defect formed on the surface of said counter electrode, so as to remove said defect and the peripheral part thereof, where said cavity penetrates through the counter electrode and unreached to the transparent electrode.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: March 16, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigehiko Mori, Hideyuki Nakao, Takeshi Gotanda, Haruhi Oooka, Kenji Todori, Kenji Fujinaga
  • Patent number: 9150420
    Abstract: A carbon electrode has a conical or pyramidal tip, wherein the tip is surrounded on its side by a raised edge.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: October 6, 2015
    Assignee: Wacker Chemie AG
    Inventor: Heinz Kraus
  • Patent number: 8987037
    Abstract: A method of manufacturing a solar cell includes forming a buffer layer between an optical absorption layer and a window electrode layer. Forming the buffer layer includes depositing a metal material on the optical absorption layer, supplying a non-metal material on the optical absorption layer, supplying a gas material including oxygen atoms on the optical absorption layer, and reacting the metal material with the non-metal material. The gas material reacts with the metal material and the non-metal material to form a metal sulfur oxide on the optical absorption layer.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 24, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong-Duck Chung, Dae-Hyung Cho, Won Seok Han
  • Patent number: 8980672
    Abstract: According to one embodiment, there is provided a method for manufacturing a photovoltaic cell. The method includes forming a structure including a pair of electrodes which are arranged apart from each other, and a hetero-junction type photoelectric conversion layer interposed between the electrodes and containing a p-type semiconductor and a n-type semiconductor, and annealing the photoelectric conversion layer thermally while applying an AC voltage having a frequency of 0.01 kHz or more and less than 1 kHz to control a mixed state of the p-type semiconductor and n-type semiconductor in the photoelectric conversion layer.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsunaga Saito, Masahiro Hosoya
  • Patent number: 8940556
    Abstract: A apparatus and method for manufacturing a photovoltaic module includes components for heating the module and applying an electrical bias to the module to improve photovoltaic module performance and manufacture multiple photovoltaic modules with similar performance.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: January 27, 2015
    Assignee: First Solar, Inc
    Inventors: Imran Khan, Markus Gloeckler, Jigish Trivedi, Thomas Truman
  • Patent number: 8871558
    Abstract: In a method of manufacturing an organic electroluminescent display, when a substrate including first and second pixel areas is prepared, a first mask including openings is disposed on the substrate to respectively correspond to the first and second pixel areas, and a second mask including an opening corresponding to the first pixel area is disposed on the first mask to expose the first pixel area and cover the second pixel area. Then, a first organic light emitting material is provided to the substrate to form the first organic light emitting material in the first pixel area and the second mask is removed from the substrate to expose the first and second pixel areas. Thereafter, a second organic light emitting material is provided to the substrate to form the second light emitting material in the first and second pixel areas and the first mask is removed from the substrate.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: October 28, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Gun Mo Kim
  • Patent number: 8871618
    Abstract: An in-situ fabrication method for a silicon solar cell includes the following steps: pretreating a silicon chip; placing the pretreated silicon chip in an implantation chamber of a plasma immersion ion implantation machine; completing the preparation of black silicon via a plasma immersion ion implantation process; making a PN junction and forming a passivation layer on the black silicon; after making the PN junction and forming the passivation layer, removing the black silicon from the plasma immersion ion implantation machine; preparing a metal back electrode on the back of the black silicon; preparing a metal grid on the passivation layer; obtaining a solar cell after encapsulation. Said method enables black silicon preparation, PN junction preparation, and passivation layer formation in-situ, greatly reducing the amount of equipment needed for the preparation of solar cells and the preparation cost. In addition, the method is simple and easy to control.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: October 28, 2014
    Assignee: The Institute of Microelectronics of Chinese Academy of Sciences
    Inventors: Yang Xia, Bangwu Liu, Chaobo Li, Jie Liu, Minggang Wang, Yongtao Li
  • Patent number: 8861909
    Abstract: A silicon photonic photodetector structure, a method for fabricating the silicon photonic photodetector structure and a method for operating a silicon photonic photodetector device that results from the photonic photodetector structure each use a strip waveguide optically coupled with a polysilicon material photodetector layer that may be contiguous with a semiconductor material slab to which is located and formed a pair of electrical contacts separated by the polysilicon material photodetector layer. Within the foregoing silicon photonic photodetector structure and related methods the polysilicon material photodetector layer includes defect states suitable for absorbing an optical signal from the strip waveguide and generating an electrical output signal using at least one of the electrical contacts when the optical signal includes a photon energy less than a band gap energy of a polysilicon material from which is comprised the polysilicon material photodetector layer.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: October 14, 2014
    Assignee: Cornell University
    Inventors: Michal Lipson, Kyle Preston
  • Patent number: 8748216
    Abstract: The present invention provides a non-vacuum method of depositing a photovoltaic absorber layer based on electrophoretic deposition of a mixture of nanoparticles with a controlled atomic ratio between the elements. The nanoparticles are first dispersed in a liquid medium to form a colloidal suspension and then electrophoretically deposited onto a substrate to form a thin film photovoltaic absorber layer. The absorber layer may be subjected to optional post-deposition treatments for photovoltaic absorption.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: June 10, 2014
    Assignee: IMRA America, Inc.
    Inventors: Wei Guo, Yu Jin, Bing Liu, Yong Che, Kevin V. Hagedorn
  • Patent number: 8703525
    Abstract: A solar cell includes; a substrate; a first electrode disposed on the substrate, and including a first groove formed therein, a semiconductor layer disposed on the first electrode, and including a second groove formed therein, and a second electrode disposed on the semiconductor layer and connected to the first electrode via the second groove, wherein a third groove passing through the first electrode, the semiconductor layer, and the second electrode is formed in a first region, a fourth groove passing through only the semiconductor layer and the second electrode is formed in a second region, and the first region and the second region are alternately disposed along a direction of extension of the third groove.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: April 22, 2014
    Assignees: Samsung SDI Co., Ltd., Samsung Display Co., Ltd.
    Inventor: Joong-Hyun Park
  • Patent number: 8697479
    Abstract: Some embodiments disclosed herein are related to methods of preparing a nanoparticle composition comprising: providing an aerosol comprising a plurality of droplets of a precursor solution comprising at least one nanoparticle precursor and an expansive component; passing the aerosol through a plasma; and collecting a nanoparticle composition product from the carrier gas which has exited the plasma. Some embodiments relate to nanoparticle compositions provided by this process. Some embodiments relate to light-emitting diodes or light emitting devices comprising these compositions.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: April 15, 2014
    Assignee: Nitto Denko Corporation
    Inventors: Rajesh Mukherjee, Hironaka Fujii, Toshitaka Nakamura, Amane Mochizuki
  • Patent number: 8679862
    Abstract: A method for manufacturing a thin film photoelectric conversion module includes the steps of forming a plurality of photoelectric conversion elements connected in series on a substrate, and carrying out reverse bias processing simultaneously on a group of photoelectric conversion elements including a plurality of the photoelectric conversion elements positioned with one or a plurality of the photoelectric conversion elements interposed between each of them, by applying a plurality of voltages electrically isolated from one another to the group of photoelectric conversion elements.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: March 25, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Shinsuke Tachibana
  • Publication number: 20140057386
    Abstract: Systems and methods of the present invention may be used to charge a layer (such as a passivation layer and/or antireflective layer) of a solar cell (e.g., wafer) with a positive or negative charge. The layer may retain the charge to improve operation of the solar cell. The charged layer may include any suitable dielectric material capable of retaining either a negative or a positive charge. Systems and methods of the present invention permit in-situ charging of a layer. Charging of a layer may be accomplished during or after deposition of the layer including after completing the whole solar cell process, in other words, on a finished cell.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 27, 2014
    Applicant: Amtech Systems, Inc.
    Inventor: Jeong-Mo Hwang
  • Publication number: 20140057387
    Abstract: Systems and methods of the present invention may be used to charge a layer (such as a passivation layer and/or antireflective layer) of a solar cell (e.g., wafer) with a positive or negative charge. The layer may retain the charge to improve operation of the solar cell. The charged layer may include any suitable dielectric material capable of retaining either a negative or a positive charge. Systems and methods of the present invention permit in-situ charging of a layer. Charging of a layer may be accomplished during or after deposition of the layer including after completing the whole solar cell process, in other words, on a finished cell.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 27, 2014
    Applicant: Amtech Systems, Inc.
    Inventor: Jeong-Mo Hwang
  • Publication number: 20140057388
    Abstract: Systems and methods of the present invention may be used to charge a layer (such as a passivation layer and/or antireflective layer) of a solar cell (e.g., wafer) with a positive or negative charge. The layer may retain the charge to improve operation of the solar cell. The charged layer may include any suitable dielectric material capable of retaining either a negative or a positive charge. Systems and methods of the present invention permit in-situ charging of a layer. Charging of a layer may be accomplished during or after deposition of the layer including after completing the whole solar cell process, in other words, on a finished cell.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 27, 2014
    Applicant: Amtech Systems, Inc.
    Inventor: Jeong-Mo Hwang
  • Patent number: 8658460
    Abstract: A method of manufacturing an organic light-emitting display device includes forming a gate electrode including a lower gate electrode on a gate insulating layer and an upper gate electrode on the lower gate electrode; forming a source region and a drain region at a semiconductor active layer using the gate electrode as a mask; forming an interlayer insulating layer on a substrate and etching the interlayer insulating layer, resulting in contact holes that expose portions of the source region and the drain region; forming a source/drain electrode raw material on the substrate and etching the source/drain electrode raw material to form a source electrode and a drain electrode; forming a gold overlapped lightly doped drain (GOLDD) structure having a LDD region at the semiconductor active layer by injecting impurity ions; depositing a protective layer on the substrate; and forming a display device on the substrate.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: February 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tak-Young Lee, Jin-Wook Seo, Ki-Yong Lee, Heung-Yeol Na
  • Publication number: 20140024168
    Abstract: This method for producing a photoelectric conversion device has: a step for forming each of an IN layer and an IP layer on one surface of an n-type monocrystalline silicon substrate; and a step of forming an n-side electrode and a p-side electrode, each including a plurality of conductor layers. Also, the step for forming the electrodes includes: a first step for forming a first conductive layer on the IN layer and the IP layer; a second step for forming a second conductive layer on the portion of the first conductive layer that covers the IN layer, and a second conductive layer on the portion of the first conductive layer that covers the IP layer; and a third step for forming a first conductive layer and a first conductive layer by partially etching the first conductive layer after completing the second step.
    Type: Application
    Filed: September 25, 2013
    Publication date: January 23, 2014
    Applicant: SANYO Electric Co., Ltd.
    Inventors: Ryo GOTO, Satoru SHIMADA, Masato SHIGEMATSU, Hitoshi SAKATA, Daisuke IDE
  • Patent number: 8628994
    Abstract: A method of making a semiconductor light-emitting device including (A) a light-emitting portion by laminating in sequence a first compound semiconductor layer, an active layer, and a second compound semiconductor layer; (B) a first electrode electrically connected to the first compound semiconductor layer; (C) a transparent conductive material layer on the second compound semiconductor layer; (D) an insulating layer on a transparent conductive material layer; and (E) a second reflective electrode that on the transparent conductive material layer and on the insulating layer in a continuous manner, wherein, that the areas of the active layer, the transparent conductive material layer, the insulating layer, and the second electrode S1, S2, S3, and S4, respectively are related as S1?S2<S3 and S2<S4.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: January 14, 2014
    Assignee: Sony Corporation
    Inventor: Katsuhiro Tomoda
  • Patent number: 8624294
    Abstract: An apparatus, system, and method are disclosed for providing optical power to a semiconductor chip. An active semiconductor layer of the semiconductor chip is disposed toward a front side of the semiconductor chip. The active semiconductor layer comprises one or more integrated circuit devices. A photovoltaic semiconductor layer of the semiconductor chip is disposed between the active semiconductor layer and a back side of the semiconductor chip. The back side of the semiconductor chip is opposite the front side of the semiconductor chip. The photovoltaic semiconductor layer converts electromagnetic radiation to electric power. One or more conductive pathways between the photovoltaic semiconductor layer and the active semiconductor layer provide the electric power from the photovoltaic semiconductor layer to the one or more integrated circuit devices of the active semiconductor layer.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: January 7, 2014
    Assignee: International Business Machines Corporation
    Inventor: Eric V. Kline
  • Publication number: 20130333747
    Abstract: A method of high reverse current burn-in of solar cells and a solar cell with a burned-in bypass diode are described herein. In one embodiment, high reverse current burn-in of a solar cell with a tunnel oxide layer induces low breakdown voltage in the solar cell. Soaking a solar cell at high current can also reduce the difference in voltage of defective and non-defective areas of the cell.
    Type: Application
    Filed: September 26, 2012
    Publication date: December 19, 2013
    Inventors: Michael J. Defensor, Xiuwen Tu, Junbo Wu, David Smith
  • Publication number: 20130213461
    Abstract: According to one embodiment, there is provided a method for manufacturing a photovoltaic cell. The method includes forming a structure including a pair of electrodes which are arranged apart from each other, and a hetero-junction type photoelectric conversion layer interposed between the electrodes and containing a p-type semiconductor and a n-type semiconductor, and annealing the photoelectric conversion layer thermally while applying an AC voltage having a frequency of 0.01 kHz or more and less than 1 kHz to control a mixed state of the p-type semiconductor and n-type semiconductor in the photoelectric conversion layer.
    Type: Application
    Filed: August 21, 2012
    Publication date: August 22, 2013
    Inventors: Mitsunaga SAITO, Masahiro HOSOYA
  • Patent number: 8440500
    Abstract: A light emitting device comprises a plurality of LED chips (“lateral” or “vertical” conducting) operable to generate light of a first wavelength range and a package for housing the chips. The package comprises: a thermally conducting substrate (copper) on which the LED chips are mounted and a cover having a plurality of through-holes in which each hole corresponds to a respective one of the LED chips. The holes are configured such that when the cover is mounted to the substrate each hole in conjunction with the substrate defines a recess in which a respective chip is housed. Each recess is at least partially filled with a mixture of at least one phosphor material and a transparent material. In a device with “lateral” conducting LED chips a PCB is mounted on the substrate and includes a plurality of through-holes which are configured such that each chip is directly mounted to the substrate. For a device with “vertical” conducting LED chips the LED chips are mounted on a diamond like carbon film.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: May 14, 2013
    Assignee: InterLight Optotech Corporation
    Inventors: Hwa Su, Hsi-Yan Chou, Chih Wei Huang
  • Patent number: 8431427
    Abstract: A method for manufacturing a photovoltaic module including a laminating step.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: April 30, 2013
    Assignee: First Solar, Inc.
    Inventors: Markus Gloeckler, Imran Khan
  • Publication number: 20130071965
    Abstract: An in-situ fabrication method for a silicon solar cell includes the following steps: pretreating a silicon chip; placing the pretreated silicon chip in an implantation chamber of a plasma immersion ion implantation machine; completing the preparation of black silicon via a plasma immersion ion implantation process; making a PN junction and forming a passivation layer on the black silicon; after making the PN junction and forming the passivation layer, removing the black silicon from the plasma immersion ion implantation machine; preparing a metal back electrode on the back of the black silicon; preparing a metal grid on the passivation layer; obtaining a solar cell after encapsulation. Said method enables black silicon preparation, PN junction preparation, and passivation layer formation in-situ, greatly reducing the amount of equipment needed for the preparation of solar cells and the preparation cost. In addition, the method is simple and easy to control.
    Type: Application
    Filed: September 8, 2010
    Publication date: March 21, 2013
    Applicant: The Institute of Microelectronics of Chinese Academy of Sciences
    Inventors: Yang Xia, Bangwu Liu, Chaobo Li, Jie Liu, Minggang Wang, Yongtao Li
  • Publication number: 20120313073
    Abstract: A photoelectrode, methods of making and using, including systems for water-splitting are provided. The photoelectrode can be a semiconductive material having a photocatalyst such as nickel or nickel-molybdenum coated on the material.
    Type: Application
    Filed: June 7, 2012
    Publication date: December 13, 2012
    Applicant: CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventors: James R. McKone, Harry B. Gray, Nathan S. Lewis, Bruce Brunschwig, Emily L. Warren, Shannon W. Boettcher, Matthew J. Bierman
  • Patent number: 8329500
    Abstract: Provided is a method of manufacturing a photovoltaic device using a Joule heating-induced crystallization method. The method includes: forming a first conductive pattern on a substrate; forming a photoelectric conversion layer on the substrate having the first conductive pattern; and crystallizing at least part of the photoelectric conversion layer by applying an electric field to the photoelectric conversion layer, wherein the photoelectric conversion layer includes a first amorphous semiconductor layer containing first impurities, a second intrinsic, amorphous semiconductor layer, and a third amorphous semiconductor layer containing second impurities.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: December 11, 2012
    Assignees: Samsung Display Co., Ltd., Samsung SDI Co., Ltd.
    Inventors: Byoung-Kyu Lee, Se-Jin Chung, Byoung-June Kim, Czang-Ho Lee, Myung-Hun Shin, Min-Seok Oh, Ku-Hyun Kang, Yuk-Hyun Nam, Seung-Jae Jung, Min Park, Mi-Hwa Lim, Joon-Young Seo
  • Patent number: 8309391
    Abstract: A method for manufacturing an array-type nanotube layer for a thin-film solar cell comprises the steps of: preparing an isotropic Si-substrate; sputtering a metal Ti layer onto the isotropic Si-substrate; heat-treating the Ti-coated Si-substrate in a vacuum heat-treatment environment; annealing the Ti-coated Si-substrate in an annealing heat-treatment environment to produce an intermediate-phase metal Ti layer; anodizing the intermediate-phase metal Ti layer so as to transform the intermediate-phase metal Ti layer into an array-type nanotube layer for the solar cell; and finally applying a reverse voltage to separate the array-type nanotube layer from the isotropic Si-substrate.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: November 13, 2012
    Inventor: Nan-Hui Yeh
  • Publication number: 20120268722
    Abstract: In one an embodiment, there is provided an assembly comprising at least one detector. Each of the at least one detector includes a substrate having a doped region of a first conduction type, a layer of dopant material of a second conduction type located on the substrate, a diffusion layer formed within the substrate and in contact with the layer of dopant material and the doped region of the substrate, wherein a doping profile, which is representative of a doping material concentration of the diffusion layer, increases from the doped region of the substrate to the layer of dopant material, a first electrode connected to the layer of dopant material, and a second electrode connected to the substrate. The diffusion layer is arranged to form a radiation sensitive surface.
    Type: Application
    Filed: February 17, 2012
    Publication date: October 25, 2012
    Applicant: ASML Netherlands B.V.
    Inventors: Stoyan NIHTIANOV, Arie Johan Van Der Sijs, Bearrach Moest, Petrus Wilhelmus Josephus Maria Kemper, Marc Antonius Maria Haast, Gerardus Wilhelmus Petrus Baas, Lis Karen Nanver, Francesco Sarubbi, Antonius Andreas Johannes Schuwer, Gregory Micha Gommeren, Martijn Pot, Thomas Ludovicus Maria Sholtes
  • Patent number: 8178384
    Abstract: An optoelectronic apparatus, a method for making the apparatus, and the use of the apparatus in an optoelectronic device are disclosed. The apparatus may include an active layer having a nanostructured network layer with a network of regularly spaced structures with spaces between neighboring structures. One or more network-filling materials are disposed in the spaces. At least one of the network-filling materials has complementary charge transfer properties with respect to the nanostructured network layer. An interfacial layer, configured to enhance an efficiency of the active layer, is disposed between the nanostructured network layer and the network-filling materials. The interfacial layer may be configured to provide (a) charge transfer between the two materials that exhibits different rates for forward versus backward transport; (b) differential light absorption to extend a range of wavelengths that the active layer can absorb; or (c) enhanced light absorption, which may be coupled with charge injection.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: May 15, 2012
    Assignee: Nanosolar, Inc.
    Inventors: Martin R. Roscheisen, Brian M. Sager, Klaus Petritsch, Jacqueline Fidanza
  • Publication number: 20120098032
    Abstract: The present invention provides a non-vacuum method of depositing a photovoltaic absorber layer based on electrophoretic deposition of a mixture of nanoparticles with a controlled atomic ratio between the elements. The nanoparticles are first dispersed in a liquid medium to form a colloidal suspension and then electrophoretically deposited onto a substrate to form a thin film photovoltaic absorber layer. The absorber layer may be subjected to optional post-deposition treatments for photovoltaic absorption.
    Type: Application
    Filed: August 5, 2011
    Publication date: April 26, 2012
    Inventors: Wei GUO, Yu Jin, Bing Liu, Yong Che, Kevin V. Hagedorn
  • Patent number: 8158454
    Abstract: A method for manufacturing a solar cell module 10 comprises the steps of exposing a part of the metal electrode layer 4 in a pinhole PHii? which is formed in the resin layer 5 by applying a reverse voltage across the transparent electrode layer 2 and the metal electrode layer 4 in the reverse voltage repair process and removing the part of the metal electrode layer 4 by etching the part of the metal electrode layer 4 using the resin layer 5 as a mask.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: April 17, 2012
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Toshio Yagiura
  • Publication number: 20120080607
    Abstract: The disclosure is directed at a radiation detector comprising a substrate layer of detector material; a set of readout electronics deposited and integrated on one side of the substrate layer; and a contact layer deposited on a side of the substrate layer opposite the set of readout electronics.
    Type: Application
    Filed: December 9, 2011
    Publication date: April 5, 2012
    Inventor: Karim Sallaudin Karim
  • Publication number: 20120058594
    Abstract: A method for manufacturing an array-type nanotube layer for a thin-film solar cell comprises the steps of: preparing an isotropic Si-substrate; sputtering a metal Ti layer onto the isotropic Si-substrate; heat-treating the Ti-coated Si-substrate in a vacuum heat-treatment environment; annealing the Ti-coated Si-substrate in an annealing heat-treatment environment to produce an intermediate-phase metal Ti layer ; anodizing the intermediate-phase metal Ti layer so as to transform the intermediate-phase metal Ti layer into an array-type nanotube layer for the solar cell; and finally applying a reverse voltage to separate the array-type nanotube layer from the isotropic Si-substrate.
    Type: Application
    Filed: February 23, 2011
    Publication date: March 8, 2012
    Inventor: NAN-HUI YEH
  • Publication number: 20120032694
    Abstract: Characteristics of partially assembled photovoltaic modules can be determined using electrical connection apparatuses and methods.
    Type: Application
    Filed: August 4, 2011
    Publication date: February 9, 2012
    Inventors: James Hinkle, Imran Khan, Modesto Sanchez, Thomas Truman
  • Patent number: 8101455
    Abstract: A method of fabricating a solar cell is disclosed. The solar cell fabricating method includes forming a first transparent conductive layer on a transparent substrate, texturing an upper surface of the first transparent conductive layer using an etchant solution configured to contain an acid with a molecular weight of about 58˜300, forming a photoelectric conversion layer on the first transparent conductive layer, forming a second transparent conductive layer on the photoelectric conversion layer, and forming a rear electrode on the second transparent conductive layer.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: January 24, 2012
    Assignee: LG Display Co., Ltd.
    Inventors: Tae Youn Kim, Weon Seo Park, Jeong Woo Lee, Seong Kee Park, Kyung Jin Shim
  • Publication number: 20110287577
    Abstract: The present invention generally provides a method of forming a high efficiency solar cell device by preparing a surface and/or forming at least a part of a high quality passivation layer on a silicon containing substrate. Embodiments of the present invention may be especially useful for preparing a surface of a p-type doped region formed on a silicon substrate so that a high quality passivation layer can be formed thereon. In one embodiment, the methods include exposing a surface of the solar cell substrate to a plasma to clean and modify the physical, chemical and/or electrical characteristics of the surface.
    Type: Application
    Filed: August 2, 2011
    Publication date: November 24, 2011
    Applicant: Applied Materials, Inc.
    Inventors: Michael P. STEWART, Lisong Zhou, Jen Shu, Li (Sherry) Xu
  • Publication number: 20110277823
    Abstract: A system for reducing damage to solar cells during a process for depositing a conductive material on a solar cell is disclosed where an electrical bias or floating potential is applied to the solar cell; and/or an electrical bias is applied to an external electrode(s) so that charged particles of a certain type are redirected away from the solar cells, avoiding the creation of a sufficiently high reverse bias on the solar cell to breakdown the cell.
    Type: Application
    Filed: May 19, 2009
    Publication date: November 17, 2011
    Applicants: MWOE SOLAR, INC., UNIVERSITY OF TOLEDO
    Inventors: Qi Hua Fan, Michael Deng, Xianbo Liao, Xunming Deng
  • Publication number: 20110253205
    Abstract: The present disclosure is directed to an optimized structure for an exciton-based photovoltaic cell, in which the bulk heterojunction between the electron donor (typically an organic polymeric semiconductor) and an electron acceptor (e.g., silicon or titanium or titania) minimizes the necessary exciton travel distance to the heterojunction in three dimensions. The configuration is arrayed in three dimensions, such that one member of the heterojunction pair, such as the electron acceptor is in the form of a number of nanoscale channels, extending to an electrode. The channels extend through a photovoltaic matrix material in a predetermined three-dimensional configuration.
    Type: Application
    Filed: September 25, 2009
    Publication date: October 20, 2011
    Inventors: Jeffrey C. Grossman, Alexander K. Zettl
  • Publication number: 20110237021
    Abstract: A method for manufacturing a photovoltaic module including a laminating step.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 29, 2011
    Applicant: First Solar, Inc.
    Inventors: Markus Gloeckler, Imran Khan
  • Publication number: 20110226317
    Abstract: Disclosed is an active layer electrically contacted to a first electrode, the first electrode being configured for SPR when interacting with light, said configuration being an array of nanostructures with a space varying periodicity and orientation so that SPR thereon is less affected by the spectral wavelength, angle, and/or polarization of the incident light. Related methods are further disclosed.
    Type: Application
    Filed: March 22, 2010
    Publication date: September 22, 2011
    Inventors: Fang Xu, Lin Pang
  • Patent number: 7915144
    Abstract: The present disclosure relates to methods of forming solid state thermal engines that provides a closely-spaced thermal tunneling gap between a hot and cold electrode. The effective gap may be on the order of one nanometer. In one embodiment, a via is etched through a first side of first and second substrates, and metal electrodes are attached to a second side of the first and second substrates. The second sides are opposite the first sides. The metal electrodes are mated by bonding the second side of the first substrate to the second side second substrate. The gap may be formed by applying a voltage greater than a threshold voltage across the mated electrodes.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: March 29, 2011
    Assignee: The Boeing Company
    Inventor: Minas H. Tanielian
  • Publication number: 20110067759
    Abstract: A solar cell includes; a substrate; a first electrode disposed on the substrate, and including a first groove formed therein, a semiconductor layer disposed on the first electrode, and including a second groove formed therein, and a second electrode disposed on the semiconductor layer and connected to the first electrode via the second groove, wherein a third groove passing through the first electrode, the semiconductor layer, and the second electrode is formed in a first region, a fourth groove passing through only the semiconductor layer and the second electrode is formed in a second region, and the first region and the second region are alternately disposed along a direction of extension of the third groove.
    Type: Application
    Filed: June 3, 2010
    Publication date: March 24, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Joong-Hyun Park
  • Patent number: 7910395
    Abstract: An LED structure includes a first substrate; an adhering layer formed on the first substrate; first ohmic contact layers formed on the adhering layer; epi-layers formed on the first ohmic contact layers; a first isolation layer covering the first ohmic contact layers and the epi-layers at exposed surfaces thereof; and first electrically conducting plates and second electrically conducting plates, both formed in the first isolation layer and electrically connected to the first ohmic contact layers and the epi-layers, respectively. The trenches allow the LED structure to facilitate complex serial/parallel connection so as to achieve easy and various applications of the LED structure in the form of single structures under a high-voltage environment.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: March 22, 2011
    Assignee: Helio Optoelectronics Corporation
    Inventors: Shih-Chang Shei, Ming-Hung Chen, Shih-Yi Wen, Chun-Che Lee
  • Patent number: 7871850
    Abstract: Disclosed are a light emitting device and a method for manufacturing the same. The light emitting device includes a substrate having a lead frame, a light emitting diode mounted on the substrate, a mold member formed on the substrate and the light emitting diode, and a reflecting member having an opening portion at one side thereof and being inclined at an outer portion of the mold member.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: January 18, 2011
    Assignee: LG Innotek Co., Ltd
    Inventor: Bo Geun Park
  • Publication number: 20100330732
    Abstract: A method for manufacturing a thin film photoelectric conversion module includes the steps of forming a plurality of photoelectric conversion elements connected in series on a substrate, and carrying out reverse bias processing simultaneously on a group of photoelectric conversion elements including a plurality of the photoelectric conversion elements positioned with one or a plurality of the photoelectric conversion elements interposed between each of them, by applying a plurality of voltages electrically isolated from one another to the group of photoelectric conversion elements.
    Type: Application
    Filed: January 28, 2009
    Publication date: December 30, 2010
    Inventor: Shinsuke Tachibana
  • Patent number: 7851238
    Abstract: Electrodes are constructed with pressure-bonding techniques that simplify alignment of various electrode components during lamination. In an exemplary embodiment, a current collector is made from aluminum foil that has been roughed or pitted on both surfaces. The surfaces of the current collector can be further treated to enhance adhesion properties of these surfaces. Layers of film that include active electrode material, such as activated carbon particles, are fabricated using non-lubricated techniques. Each film is coated on one side with an adhesive binder solution, such as a thermoplastic solution. The adhesive binder is dried, and the films are laminated to the current collector using a calender with heated rollers. The resulting electrode product is processed to shape electrodes, which can then be used in electrical energy storage devices, including double layer capacitors.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: December 14, 2010
    Assignee: Maxwell Technologies, Inc.
    Inventors: Porter Mitchell, Xiaomei Xi, Linda Zhong, Bin Zou
  • Patent number: 7851839
    Abstract: A method of fabricating a high-sensitivity image sensor and the same are disclosed. The disclosed method comprises: etching predetermined regions of active silicon and a buried oxide layer of a SOI substrate by using a mask to expose an N-type silicon substrate; implanting P-type ions into the exposed N-type silicon substrate to form P-type regions; forming a gate oxide layer and a gate electrode on the middle part of the active silicon not etched while the active silicon is etched to expose the N-type silicon substrate; forming a P-type gate electrode, and P-type source and drain regions by implanting P-type ions into the active silicon and the gate electrode above the buried oxide layer; and constructing a connection part to connect the P-type regions to the gate electrode.
    Type: Grant
    Filed: December 7, 2007
    Date of Patent: December 14, 2010
    Assignee: Korea Electronics Technology Institute
    Inventor: Hoon Kim
  • Publication number: 20100255631
    Abstract: A method for manufacturing a solar cell module 10 comprises the steps of exposing a part of the metal electrode layer 4 in a pinhole PHii? which is formed in the resin layer 5 by applying a reverse voltage across the transparent electrode layer 2 and the metal electrode layer 4 in the reverse voltage repair process and removing the part of the metal electrode layer 4 by etching the part of the metal electrode layer 4 using the resin layer 5 as a mask.
    Type: Application
    Filed: September 9, 2009
    Publication date: October 7, 2010
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Toshio Yagiura
  • Publication number: 20100224877
    Abstract: Disclosed is an electrophotographic photoreceptor which comprises a base material and a photoconductive layer. The photoconductive layer is formed on the base material, and comprises a non-single-crystal material mainly composed of silicon. In the photoconductive layer, with regard to a characteristic energy E (eV) which has the relationship with a light absorption coefficient ? (cm?1) represented by the following formula (1), the characteristic energy E1 (eV) for an exposure wavelength in larger than the characteristic energy E2 (eV) for a neutralization wavelength.
    Type: Application
    Filed: July 31, 2008
    Publication date: September 9, 2010
    Applicant: KYOCERA CORPORATION
    Inventor: Yoshinobu Ishii
  • Publication number: 20100200042
    Abstract: A method for manufacturing a photovoltaic device including one or a plurality of photovoltaic cells is provided. Each of the photovoltaic cells includes a transparent conductive film, a photovoltaic layer, and a metal electrode which are formed on a substrate. A voltage is applied between a first portion of the metal electrode and a second portion of the metal electrode that is distant from the first portion, so as to remove at least apart of the metal electrode.
    Type: Application
    Filed: September 2, 2009
    Publication date: August 12, 2010
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Toshio Yagiura