Chalcogen (i.e., Oxygen (o), Sulfur (s), Selenium (se), Tellurium (te)) Containing Patents (Class 438/95)
  • Patent number: 9142770
    Abstract: The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: September 22, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Joseph N. Greeley, John A. Smythe, III
  • Patent number: 9136467
    Abstract: A phase change memory cell has first and second electrodes having phase change material there-between. The phase change memory cell is devoid of heater material as part of either of the first and second electrodes and being devoid of heater material between either of the first and second electrodes and the phase change material. A method of forming a memory cell having first and second electrodes having phase change material there-between includes lining elevationally inner sidewalls of an opening with conductive material to comprise the first electrode of the memory cell. Elevationally outer sidewalls of the opening are lined with dielectric material. Phase change material is formed in the opening laterally inward of and electrically coupled to the conductive material in the opening. Conductive second electrode material is formed that is electrically coupled to the phase change material. Other implementations are disclosed.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: September 15, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Damon E. Van Gerpen, Roberto Bez
  • Patent number: 9130162
    Abstract: A semiconductor structure includes a resistance variable memory structure. The semiconductor structure also includes a dielectric layer. The resistance variable memory structure is over the dielectric layer. The resistance variable memory structure includes a first electrode disposed over the dielectric layer. The first electrode has a sidewall surface. A resistance variable layer has a first portion which is disposed over the sidewall surface of the first electrode and a second portion which extends from the first portion away from the first electrode. A second electrode is over the resistance variable layer.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: September 8, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Yu-Wen Liao, Chin-Chieh Yang, Wen-Ting Chu
  • Patent number: 9117515
    Abstract: A programmable metallization device comprises a first electrode and a second electrode, and a first dielectric layer, a second dielectric layer, and an ion-supplying layer in series between the first and second electrodes. In operation, a conductive bridge is formed or destructed in the first dielectric layer to represent a data value. During read, a read bias is applied that is sufficient to cause formation of a transient bridge in the second dielectric layer, and make a conductive path through the cell if the bridge is present in the first dielectric layer. If the bridge is not present in the first dielectric layer during the read, then the conductive path is not formed. Upon removal of the read bias voltage any the conductive bridge formed in the second dielectric layer is destructed while the conductive bridge in the corresponding other first dielectric layer, if any, remains.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: August 25, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Feng-Ming Lee, Yu-Yu Lin
  • Patent number: 9093600
    Abstract: A method of p-type doping cadmium telluride (CdTe) is disclosed. The method comprising the steps of, (a) providing a first component comprising cadmium telluride (CdTe) comprising an interfacial region, and (b) subjecting the CdTe to a functionalizing treatment to obtain p-type doped CdTe, said functionalizing treatment comprising a thermal treatment of at least a portion of the interfacial region in the presence of a first material comprising a p-type dopant, and of a second material comprising a halogen. A method of making a photovoltaic cell is also disclosed.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: July 28, 2015
    Assignee: First Solar, Inc.
    Inventors: John Anthony DeLuca, Scott Feldman-Peabody
  • Patent number: 9087943
    Abstract: A method for forming a thin film photovoltaic device includes providing a transparent substrate comprising a surface region and forming a first electrode layer overlying the surface region. Additionally, the method includes forming a copper indium material comprising an atomic ratio of Cu:In ranging from about 1.35:1 to about 1.60:1 by at least sputtering a target comprising an indium copper material. The method further includes subjecting the copper indium material to thermal treatment process in an environment containing a sulfur bearing species. Furthermore, the method includes forming a copper indium disulfide material from at least the thermal treatment process of the copper indium material and maintaining an interface region between the copper indium disulfide material and electrode substantially free from a metal disulfide layer, which has different semiconductor characteristics from the copper indium disulfide material.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: July 21, 2015
    Assignee: Stion Corporation
    Inventor: Howard W. H. Lee
  • Patent number: 9082967
    Abstract: A non-volatile memory device of the present invention comprises a first electrode; a variable resistance layer formed on and above the first electrode; a second electrode formed on and above the variable resistance layer; a side wall protective layer having an insulativity and covering a side wall of the first electrode, a side wall of the variable resistance layer and a side wall of the second electrode; and an electrically-conductive layer which is in contact with the second electrode; wherein the electrically-conductive layer covers an entire of the second electrode and at least a portion of the side wall protective layer located outward relative to the second electrode, when viewed from a thickness direction; and the side wall protective layer extends across the second electrode to a position above an upper end of the second electrode such that an upper end of the side wall protective layer is located above the upper end of the second electrode, when viewed from a side.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: July 14, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hideaki Murase, Yoshio Kawashima, Atsushi Himeno
  • Patent number: 9059073
    Abstract: A method of removing a semiconductor device layer from a base substrate is provided that includes providing a crack propagation layer on an upper surface of a base substrate. A semiconductor device layer including at least one semiconductor device is formed on the crack propagation layer. Next, end portions of the crack propagation layer are etched to initiate a crack in the crack propagation layer. The etched crack propagation layer is then cleaved to provide a cleaved crack propagation layer portion to a surface of the semiconductor device layer and another cleaved crack propagation layer portion to the upper surface of the base substrate. The cleaved crack propagation layer portion is removed from the surface of the semiconductor device layer and the another cleaved crack propagation layer portion is removed from the upper surface of the base substrate.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: June 16, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Cheng-Wei Cheng, Devendra K. Sadana, Kuen-Ting Shiu, Norma E. Sosa Cortes
  • Patent number: 9054264
    Abstract: Systems and methods for solar cells with CIS and CIGS films made by reacting evaporated copper chlorides with selenium are provided. In one embodiment, a method for fabricating a thin film device comprises: providing a semiconductor film comprising indium (In) and selenium (Se) upon a substrate; heating the substrate and the semiconductor film to a desired temperature; and performing a mass transport through vapor transport of a copper chloride vapor and se vapor to the semiconductor film within a reaction chamber.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: June 9, 2015
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: David S. Albin, Rommel Noufi
  • Publication number: 20150144186
    Abstract: Embodiments disclosed herein include photovoltaic absorber materials (302) and photovoltaic devices (300) having absorber materials (302) with intentionally increased permittivity. Alternative embodiments include methods (200) of producing thin film photovoltaic absorbers (302) from materials having increased permittivity or methods of producing devices having absorbers (302) with increased permittivity. In selected embodiments, the permittivity of an absorber material (302) is increased by incorporating a permittivity increasing material therein.
    Type: Application
    Filed: May 16, 2013
    Publication date: May 28, 2015
    Inventor: Timothy A. Gessert
  • Publication number: 20150140724
    Abstract: In particular embodiments, a method is described for depositing thin films, such as those used in forming a photovoltaic cell or device. In a particular embodiment, the method includes providing a substrate suitable for use in a photovoltaic device and plasma spraying one or more layers over the substrate, the grain size of the grains in each of the one or more layers being at least approximately two times greater than the thickness of the respective layer.
    Type: Application
    Filed: December 15, 2014
    Publication date: May 21, 2015
    Inventors: Brian Josef BARTHOLOMEUSZ, Michael BARTHOLOMEUSZ
  • Publication number: 20150136231
    Abstract: A method for fabricating a thin film photovoltaic device is provided. The method includes providing a substrate comprising a surface region made of a thin-film photovoltaic absorber including copper, indium, gallium, selenium, and sulfur species. Additionally, the method includes applying a dip-in chemical bath deposition process for forming a buffer layer containing at least zinc-oxygen-sulfide material but substantially free of cadmium species. Furthermore, the method includes producing a chemical bath including steps of heating a bath of water to about 75° C., adding aqueous ammonia to mix with the bath of water, adding a solution of sodium hydroxide , adding zinc salt solution, and adding a solution of thiourea. The dip-in chemical bath deposition process includes immersing a plurality of substrates formed with the thin-film photovoltaic absorber substantially vertically in the chemical bath for 30 minutes to form the zinc-oxygen-sulfide buffer layer followed by a cleaning and drying process.
    Type: Application
    Filed: December 9, 2014
    Publication date: May 21, 2015
    Inventors: Robert D. Wieting, Jason Todd Jackson
  • Patent number: 9034686
    Abstract: Embodiments of the present invention include a method. The method includes heating a layer stack. The layer stack includes a first layer comprising cadmium and tin, a metal layer disposed over the first layer, and a window layer disposed over the metal layer. Heating the stack includes transforming at least a portion of the first layer from an amorphous phase to a crystalline phase. Heating may be performed using any of various configurations, such as, for example, heating an individual stack, or using a face-to-face configuration of multiple stacks. The stack may be used for fabricating a photovoltaic device.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: May 19, 2015
    Assignee: First Solar, Inc.
    Inventors: Hongying Peng, Bastiaan Arie Korevaar, Jinbo Cao, Stephen Lorenco Araujo, Scott Daniel Feldman-Peabody, Robert Dwayne Gossman
  • Publication number: 20150132885
    Abstract: The present invention relates to a method for preparing a CIS- or CIGS-based light-absorbing layer which is included in a thin film solar cell. More particularly, the present invention relates to a method for preparing a CIS- or CIGS-based light-absorbing layer which ultimately improves the efficiency of a solar cell since the remaining carbon impurities in the formed light-absorbing layer are minimized and additional sulfurization treatment or selenium treatment is made optional, not requisite.
    Type: Application
    Filed: October 8, 2014
    Publication date: May 14, 2015
    Inventors: Yeokwon YOON, Tae-Seok LEE, Kyoung-Jun LEE, Jae-Hong KIM
  • Patent number: 9029187
    Abstract: Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a low band gap dielectric layer disposed between two higher band gap dielectric layers. The high band gap dielectric layers can be doped with doping materials to form traps at energy levels higher than the operating voltage of the memory device.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: May 12, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Venkat Ananthan, Prashant B Phatak
  • Publication number: 20150125989
    Abstract: The present invention relates to a method for preparing a CIS- or CIGS-based light-absorbing layer which is to be included in thin-film solar cells. More particularly, the present invention relates to a method for preparing a CIS- or CIGS-based light-absorbing layer, which can ultimately improve the efficiency of solar cells, characterized by comprising the steps of: preparing a light-absorbing ink including a precursor of copper, indium, or gallium as an organic metal precursor, and a solvent, wherein a ligand in the organic metal precursor has a keto-enol tautomeric property; and coating a substrate with the light-absorbing ink and performing a heat treatment, thereby minimizing the remaining carbon impurities of the light-absorbing layer.
    Type: Application
    Filed: October 8, 2014
    Publication date: May 7, 2015
    Inventor: Yeokwon YOON
  • Publication number: 20150114463
    Abstract: Disclosed is a thin film solar cell including a substrate, a first electrode, a light absorbing layer, a buffer layer, a window layer, and a second electrode, wherein a compound layer of MxSy or MxSey (here, M is metal, and x and y each are a natural number) is present in an interface between the first electrode and the light absorbing layer, the thickness of the compound layer of MxSy or MxSey being 150 nm or less.
    Type: Application
    Filed: August 22, 2014
    Publication date: April 30, 2015
    Inventors: Kee Jeong Yang, Bo Ram Jeon, Jun Hyoung Sim, Dae Ho Son, Jin Kyu Kang
  • Publication number: 20150118789
    Abstract: A method for manufacturing a photoelectric converter (11), comprising: a first step of forming a first buffer layer (4) comprising a metal sulfide on a light-absorbing layer (3) comprising a Group I-III-VI compound or a Group I-II-IV-VI compound; and a second step of contacting a surface of the first buffer layer (4) with a first solution comprising an alkali metal compound.
    Type: Application
    Filed: March 11, 2013
    Publication date: April 30, 2015
    Inventors: Takeshi Suzuki, Riichi Sasamori, Junji Aranami, Hirofumi Senta
  • Patent number: 9018083
    Abstract: In an example of a method for controlling the formation of dopants in an electrically actuated device, a predetermined concentration of a dopant initiator is selected. The predetermined amount of the dopant is localized, via diffusion, at an interface between an electrode and an active region adjacent to the electrode. The dopant initiator reacts with a portion of the active region to form the dopants.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: April 28, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jianhua Yang, Duncan Stewart, Philip J. Kuekes, William Tong
  • Patent number: 9018032
    Abstract: A method for manufacturing a CIGS thin film photovoltaic device includes forming a back contact layer on a substrate, forming an Se-rich layer on the back contact layer, forming a precursor layer on the Se-rich layer by depositing copper, gallium and indium resulting in a first interim structure, annealing or selenizing the first interim structure, thereby forming Cu/Se, Ga/Se or CIGS compounds along the interface between the back contact layer and the precursor layer and resulting in a second interim structure, and selenizing the second interim structure, thereby converting the precursor layer into a CIGS absorber layer on the back contact layer.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: April 28, 2015
    Assignee: TSMC Solar Ltd.
    Inventors: Hsuan-Sheng Yang, Wen-Chin Lee, Li-Huan Chu
  • Patent number: 9012881
    Abstract: Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode comprising hafnium oxide and having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a material including metal titanium and having a second thickness that is less than 25 percent of the first thickness.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: April 21, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Ronald J. Kuse, Tony P. Chiang, Imran Hashim
  • Patent number: 9011763
    Abstract: The present invention is generally directed to nanocomposite thermoelectric materials that exhibit enhanced thermoelectric properties. The nanocomposite materials include two or more components, with at least one of the components forming nano-sized structures within the composite material. The components are chosen such that thermal conductivity of the composite is decreased without substantially diminishing the composite's electrical conductivity. Suitable component materials exhibit similar electronic band structures. For example, a band-edge gap between at least one of a conduction band or a valence band of one component material and a corresponding band of the other component material at interfaces between the components can be less than about 5kBT, wherein kB is the Boltzman constant and T is an average temperature of said nanocomposite composition.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: April 21, 2015
    Assignees: Massachusetts Institute of Technology, Trustees of Boston College
    Inventors: Gang Chen, Mildred Dresselhaus, Zhifeng Ren
  • Patent number: 9006020
    Abstract: A method and system for controlling the amount of a second material incorporated into a first material by controlling the amount of a third material which can interact with the second material.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: April 14, 2015
    Assignee: First Solar, Inc.
    Inventors: Gang Xiong, Rick C. Powell, Xilin Peng, John Barden, Arnold Allenic, Feng Liao, Kenneth M. Ring
  • Publication number: 20150099325
    Abstract: The present invention relates to a method for enhancing the conductivity of an undoped transparent metal oxide to obtain a transparent conductive oxide (TCO) electrode. More in particular it relates to such a method comprising the steps of providing a transparent metal oxide, applying a UV transparent barrier layer on the transparent metal oxide, and irradiating the transparent metal oxide with UV radiation after applying the barrier layer.
    Type: Application
    Filed: May 8, 2013
    Publication date: April 9, 2015
    Applicant: Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO
    Inventors: Andrea Illiberi, Frank Grob, Paulus Willibrordus George Poodt, Gerardus Johan Jozef Winands, Pieter Jan Bolt
  • Patent number: 8999746
    Abstract: A method of producing a metal chalcogenide dispersion usable in forming a light absorbing layer of a solar cell, the method including: a metal chalcogenide nano particle formation step in which at least one metal or metal compound selected from the group consisting of a group 11, 12, 13, 14 or 15 metal or metal compound, a water-containing solvent and a group 16 element-containing compound are mixed together to obtain metal chalcogenide nano particles; and an addition step in which a compound (1) represented by general formula (1) is added to the metal chalcogenide nano particles, thereby obtaining a metal chalcogenide dispersion (wherein R1 to R4 each independently represents an alkyl group, an aryl group or a hydrogen atom; provided that at least one of R1 to R4 represents a hydrocarbon group).
    Type: Grant
    Filed: August 8, 2013
    Date of Patent: April 7, 2015
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Atsushi Yamanouchi, Koichi Misumi, Akimasa Nakamura
  • Patent number: 8999745
    Abstract: A phase-change memory device and a method of fabricating the same are provided. The phase-change memory device includes a semiconductor substrate in which a word line is arranged, a diode line disposed over the word line and extending parallel to the word line, a phase-change line pattern disposed over the diode line, and a projection disposed between the diode line and the phase-change line pattern and protruding from the diode line. The diode line and the projection are formed of a single layer to be in continuity with each other.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: April 7, 2015
    Assignee: SK Hynix Inc.
    Inventor: Il Yong Lee
  • Patent number: 8993370
    Abstract: In one embodiment, a method includes depositing a photoactive layer onto a first substrate, depositing a contact layer onto the photoactive layer, attaching a second substrate onto the contact layer, and removing the first substrate from the photoactive layer, contact layer, and second substrate.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: March 31, 2015
    Assignee: Zetta Research and Development LLC—AQT Series
    Inventors: Mariana Rodica Munteanu, Amith Kumar Murali, Kirk Hayes, Brian Josef Bartholomeusz
  • Patent number: 8993371
    Abstract: The method of manufacturing a light absorbing layer for a solar cell by performing thermal treatment on a specimen configured to include thin films of one or more of copper, indium, and gallium on a substrate and element selenium, includes steps of: (a) heating a wall of a chamber up to a predefined thin film formation temperature in order to maintain a selenium vapor pressure; (b) mounting the specimen and the element selenium on the susceptor at the room temperature and loading the susceptor in the chamber; and (c) heating the specimen in the lower portion of the susceptor and, at the same time, heating the element selenium in the upper portion of the susceptor, wherein, in the step (c), in order for liquefied selenium not to be condensed on the specimen which is loaded at the room temperature and is not yet heated, the temperature of the element selenium and the specimen loaded in the chamber are individually controlled, so that the selenium vapor pressure of an inner space of the chamber does not exceed a
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: March 31, 2015
    Assignee: Semics Inc.
    Inventor: Seong Hoon Song
  • Publication number: 20150087107
    Abstract: A method for manufacturing a photoelectric conversion device of an embodiment includes forming, on a first electrode, a photoelectric conversion layer comprising at least one of a chalcopyrite compound, a stannite compound, and a kesterite compound. The forming of the photoelectric conversion layer includes forming a photoelectric conversion layer precursor comprising at least one compound semiconductor of a chalcopyrite compound, a stannite compound, and a kesterite compound on the first electrode. The forming of the photoelectric conversion layer includes immersing the precursor in a liquid including at least one of Group IIa and Group IIb elements at 0° C. to 60° C., after forming of the photoelectric conversion layer precursor. The compound semiconductor on a side of the first electrode is at least either amorphous or larger in average crystal grain size than the compound semiconductor on an opposite side of the first electrode.
    Type: Application
    Filed: September 5, 2014
    Publication date: March 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroki HIRAGA, Naoyuki NAKAGAWA, Soichiro SHIBASAKI, Mutsuki YAMAZAKI, Kazushige YAMAMOTO, Shinya SAKURADA, Michihiko INABA
  • Publication number: 20150087106
    Abstract: In various embodiments, photovoltaic devices incorporate discontinuous passivation layers (i) disposed between a thin-film absorber layer and a partner layer, (ii) disposed between the partner layer and a front contact layer, and/or (iii) disposed between a back contact layer and the thin-film absorber layer.
    Type: Application
    Filed: September 22, 2014
    Publication date: March 26, 2015
    Inventors: Markus Eberhard Beck, Timothy J. Nagle, Sourav Roger Basu
  • Publication number: 20150079724
    Abstract: Systems and methods for forming solar cells with CuInSe2 and Cu(In,Ga)Se2 films are provided. In one embodiment, a method comprises: during a first stage (220), performing a mass transport through vapor transport of an indium chloride (InClx) vapor (143, 223) and Se vapor (121, 225) to deposit a semiconductor film (212, 232, 252) upon a substrate (114, 210, 230, 250); heating the substrate (114, 210, 230, 250) and the semiconductor film to a desired temperature (112); during a second stage (240) following the first stage (220), performing a mass transport through vapor transport of a copper chloride (CuClx) vapor (143, 243) and Se vapor (121, 245) to the semiconductor film (212, 232, 252); and during a third stage (260) following the second stage (240), performing a mass transport through vapor transport of an indium chloride (InClx) vapor (143, 263) and Se vapor (121, 265) to the semiconductor film (212, 232, 252).
    Type: Application
    Filed: February 27, 2013
    Publication date: March 19, 2015
    Inventors: David S. Albin, Nirav Vora, Sebastian Caparros Jimenez, Joaquin Murillo Gutierrez, Emilio Sanchez Cortezon
  • Publication number: 20150075620
    Abstract: A method and apparatus for forming a thin film of a copper indium gallium selenide (CIGS)-type material are disclosed. The method includes providing first and second targets in a common sputtering chamber. The first target includes a source of CIGS material, such as an approximately stoichiometric polycrystalline CIGS material, and the second target includes a chalcogen, such as selenium, sulfur, tellurium, or a combination of these elements. The second target provides an excess of chalcogen in the chamber. This can compensate, at least in part, for the loss of chalcogen from the CIGS-source in the first target, resulting in a thin film with a controlled stoichiometry which provides effective light absorption when used in a solar cell.
    Type: Application
    Filed: November 21, 2014
    Publication date: March 19, 2015
    Inventors: Jesse A. Frantz, Jasbinder S. Sanghera, Robel Y. Bekele, Vinh Q. Nguyen, Ishwar D. Aggarwal, Allan J. Bruce, Michael Cyrus, Sergey V. Frolov
  • Publication number: 20150079723
    Abstract: In one aspect, a method for fabricating a thin film solar cell includes the following steps. A first absorber material is deposited as a layer A on a substrate while applying pressure to the substrate/layer A. A second absorber material is deposited as a layer B on layer A while applying pressure to the substrate/layer B. A third absorber material is deposited as a layer C on layer B while applying pressure to the substrate/layer C. A fourth absorber material is deposited as a layer D on layer C while applying pressure to the substrate/layer D. The first absorber material comprises copper, the second absorber material comprises indium, the third absorber material comprises gallium, and the fourth absorber material comprises one or more of sulfur and selenium, and wherein by way of performing the steps of claim 1 a chalcogenide absorber layer is formed on the substrate.
    Type: Application
    Filed: September 18, 2013
    Publication date: March 19, 2015
    Applicant: International Business Machines Corporation
    Inventors: Shafaat Ahmed, Hariklia Deligianni, Qiang Huang, Lubomyr T. Romankiw, Raman Vaidyanathan
  • Publication number: 20150079725
    Abstract: A multi-stage method and apparatus for vaporizing and depositing a tellurium containing semiconductor material on a substrate.
    Type: Application
    Filed: November 24, 2014
    Publication date: March 19, 2015
    Inventors: Arnold Allenic, Zhigang Ban, John Barden, Benjamin Milliron, Rick C. Powell
  • Patent number: 8981328
    Abstract: A resistive random access memory cell formed in an integrated circuit includes first and second resistive random access memory devices, each including an anode and a cathode. The anode of the second resistive random access memory device is connected to the anode of the first resistive random access memory device. A programming transistor has a first source/drain terminal connected to a programming potential node, a second source/drain terminal connected to the anodes of the first and second resistive random access memory devices, and a gate connected to a program-enable node.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: March 17, 2015
    Assignee: Microsemi SoC Corporation
    Inventors: Jonathan Greene, Frank Hawley, John McCollum
  • Patent number: 8980679
    Abstract: Provided are apparatus and methods for forming phase change layers, and methods of manufacturing a phase change memory device. A source material is supplied to a reaction chamber, and purges from the chamber. A pressure of the chamber is varied according to the supply of the source material and the purge of the source material.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: March 17, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Hyun Im, Byoungjae Bae, Dohyung Kim, Sunglae Cho, Jinil Lee, Juhyung Seo, Hyeyoung Park, Takehiko Fujita
  • Patent number: 8980681
    Abstract: The disclosure provides a method for fabricating a solar cell, including: providing a first substrate; forming a light absorption precursor layer on the first substrate; conducting a thermal process to the light absorption precursor layer to form a light absorption layer, wherein the light absorption layer includes a first light absorption layer and a second light absorption layer, and the first absorption layer is formed on the first substrate; forming a second substrate on the second light absorption layer; removing the first substrate to expose a surface of the first light absorption layer; forming a zinc sulfide (ZnS) layer on the surface of the first light absorption layer; and forming a transparent conducting oxide (TCO) layer on the zinc sulfide (ZnS) layer.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: March 17, 2015
    Assignee: Industrial Technology Research Institute
    Inventor: Wei-Tse Hsu
  • Patent number: 8980709
    Abstract: A resistive-switching memory element is described. The memory element includes a first electrode, a porous layer over the first electrode including a point defect embedded in a plurality of pores of the porous layer, and a second electrode over the porous layer, wherein the nonvolatile memory element is configured to switch between a high resistive state and a low resistive state.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: March 17, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Tony P. Chiang, Chi-I Lang, Prashant B. Phatak
  • Patent number: 8980682
    Abstract: Methods of forming absorber layers in a TFPV device are provided. Methods are described to provide the formation of metal oxide films and heating the metal oxide films in the presence of a chalcogen to form a metal-oxygen-chalcogen alloy. Methods are described to provide the formation of metal oxide films, forming a layer of elemental chalcogen on the metal oxide film, and heating the stack to form a metal-oxygen-chalcogen alloy. In some embodiments, the metal oxide film includes zinc oxide and the chalcogen includes selenium.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: March 17, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Haifan Liang, Jeroen Van Duren
  • Publication number: 20150068580
    Abstract: A photovoltaic thin-film solar module includes in the following sequence: a substrate layer; a back electrode layer directly adjoining the substrate layer; a conductive barrier layer directly adjoining at least one of the back electrode layer and the substrate layer; an ohmic contact layer directly adjoining the barrier layer; one of a chalcopyrite or kesterite semiconductor absorber layer directly adjoining the contact layer; a first buffer layer directly adjoining the semiconductor absorber layer and containing one of Zn(S,OH) or In2S3; a second buffer layer directly adjoining one of the semiconductor absorber layer or the first buffer layer; and a transparent front electrode layer directly adjoining at least one of the semiconductor absorber layer, the first buffer layer, and the second buffer layer, the transparent front electrode layer containing n-doped zinc oxide.
    Type: Application
    Filed: March 28, 2013
    Publication date: March 12, 2015
    Applicant: Robert Bosch GmbH
    Inventor: Volker Probst
  • Patent number: 8975513
    Abstract: A quantum dot (QD) sensitized wide bandgap (WBG) semiconductor heterojunction photovoltaic (PV) device comprises an electron conductive layer; an active photovoltaic (PV) layer adjacent the electron conductive layer; a hole conductive layer adjacent the active PV layer; and an electrode layer adjacent the hole conductive layer. The active PV layer comprises a wide bandgap (WBG) semiconductor material with Eg?2.0 eV, in the form of a 2-dimensional matrix defining at least two open spaces, and a narrower bandgap semiconductor material with Eg<2.0 eV, in the form of quantum dots (QD's) filling each open space defined by the matrix of WBG semiconductor material and establishing a heterojunction therewith. The active PV layer is preferably fabricated by a co-sputter deposition process, and the QD's constitute from about 40 to about 90 vol. % of the active PV layer.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: March 10, 2015
    Assignee: Seagate Technology LLC
    Inventors: Samuel D. Harkness, IV, Hans J. Richter
  • Publication number: 20150059845
    Abstract: A CZTS-based thin film solar cell which has a high photovoltaic conversion efficiency which is provided with a substrate, a metal back electrode layer which is formed on the substrate, a p-type CZTS-based light absorption layer which is formed on the metal back electrode layer, and an n-type transparent conductive film which is formed on the p-type CZTS-based light absorption layer and which has a dispersed layer of ZnS-based fine particles at the interface between the p-type CZTS-based light absorption layer and the metal back electrode layer.
    Type: Application
    Filed: November 22, 2012
    Publication date: March 5, 2015
    Applicant: SHOWA SHELL SEKIYU K. K.
    Inventors: Hiroki Sugimoto, Takuya Katou, Satoshi Muraoka
  • Publication number: 20150063543
    Abstract: A radiation detector may include: a first photoconductor layer including a plurality of photosensitive particles; and/or a second photoconductor layer on the first photoconductor layer, and including a plurality of crystals obtained by crystal-growing photosensitive material. At least some of the plurality of photosensitive particles of the first photoconductor layer may fill gaps between the plurality of crystals of the second photoconductor layer. A method of manufacturing a radiation detector may include: forming a first photoconductor layer by applying paste, including solvent mixed with a plurality of photosensitive particles, to a first substrate; forming a second photoconductor layer by crystal-growing photosensitive material on a second substrate; pressing the crystal-grown second photoconductor layer on the first photoconductor layer that is applied to the first substrate; and/or removing the solvent in the first photoconductor layer via a drying process.
    Type: Application
    Filed: September 1, 2014
    Publication date: March 5, 2015
    Inventors: Seung-hyup LEE, Sun-il KIM, Young KIM, Chang-jung KIM
  • Patent number: 8969124
    Abstract: A method for fabricating a Cu—In—Ga—Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu—In—Ga—Se absorbing layer on the molybdenum back electrode; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu—In—Ga—Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer.
    Type: Grant
    Filed: January 11, 2014
    Date of Patent: March 3, 2015
    Inventors: Liuyu Lin, Zhun Zhang
  • Patent number: 8969720
    Abstract: The present invention provides improved chalcogen-containing, photovoltaic structures as well as related compositions, photovoltaic devices incorporating these structures, methods of making these structures and devices, and methods of using these structures and devices. According to principles of the present invention, the adhesion of PACB compositions is improved through the use of chalcogen-containing tie layers.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: March 3, 2015
    Assignee: Dow Global Technologies LLC
    Inventor: Jennifer E. Gerbi
  • Patent number: 8962378
    Abstract: A method for manufacturing a photodiode including the steps of providing a substrate, solution depositing a quantum nanomaterial layer onto the substrate, the quantum nanomaterial layer including a number of quantum nanomaterials having a ligand coating, and applying a thin-film oxide layer over the quantum nanomaterial layer.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: February 24, 2015
    Assignee: The Boeing Company
    Inventors: Larken E. Euliss, G. Michael Granger, Keith J. Davis, Nicole L. Abueg, Peter D. Brewer, Brett Nosho
  • Patent number: 8962379
    Abstract: A CIGS film production method is provided which ensures that a CIGS film having a higher conversion efficiency can be produced at lower costs at higher reproducibility even for production of a large-area device. A CIGS solar cell production method is also provided for producing a CIGS solar cell including the CIGS film. The CIGS film production method includes: a stacking step of stacking a layer (A) containing indium, gallium and selenium and a layer (B) containing copper and selenium in a solid phase in this order over a substrate; and a heating step of heating a stacked structure including the layer (A) and the layer (B) to melt a compound of copper and selenium of the layer (B) into a liquid phase to thereby diffuse copper from the layer (B) into the layer (A) to permit crystal growth to provide a CIGS film.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: February 24, 2015
    Assignee: Nitto Denko Corporation
    Inventors: Hiroto Nishii, Shigenori Morita, Seiki Teraji, Kazuhito Hosokawa, Takashi Minemoto
  • Publication number: 20150050772
    Abstract: In a method of forming a CIGS film absorption layer, a first precursor is provided including a first substrate having a major process precursor film formed thereon, the major process precursor film containing two or more of Cu, In, Ga, and Se. A second precursor is provided including a second substrate having an element supplying precursor film formed thereon, the element supply precursor film containing two or more of Cu, In, Ga and Se. The precursors are oriented with the major process precursor film and element supplying precursor film facing one another so as to allow diffusion of elements between the films during annealing. The oriented films are annealed and then the precursors are separated, wherein the CIGS film is formed over the first substrate and either a CIGS film or a precursor film containing two or more of Cu, In, Ga, and Se remains over the second substrate.
    Type: Application
    Filed: August 15, 2013
    Publication date: February 19, 2015
    Applicant: TSMC Solar Ltd.
    Inventors: Chung-Hsien WU, Wen-Chin LEE
  • Patent number: 8956698
    Abstract: Systems and methods for depositing complex thin-film alloys on substrates are provided. In particular, systems and methods for the deposition of thin-film Cd1-xMxTe ternary alloys on substrates using a stacked-source sublimation system are provided, where M is a metal such as Mg, Zn, Mn, and Cu.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: February 17, 2015
    Assignee: Colorado State University Research Foundation
    Inventors: Walajabad S. Sampath, Pavel S. Kobyakov, Kevin E. Walters, Davis R. Hemenway
  • Publication number: 20150044813
    Abstract: A method of producing a metal chalcogenide dispersion usable in forming a light absorbing layer of a solar cell, the method including: a metal chalcogenide nano particle formation step in which at least one metal or metal compound selected from the group consisting of a group 11, 12, 13, 14 or 15 metal or metal compound, a water-containing solvent and a group 16 element-containing compound are mixed together to obtain metal chalcogenide nano particles; and an addition step in which a compound (1) represented by general formula (1) is added to the metal chalcogenide nano particles, thereby obtaining a metal chalcogenide dispersion (wherein R1 to R4 each independently represents an alkyl group, an aryl group or a hydrogen atom; provided that at least one of R1 to R4 represents a hydrocarbon group).
    Type: Application
    Filed: August 8, 2013
    Publication date: February 12, 2015
    Applicant: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Atsushi Yamanouchi, Koichi Misumi, Akimasa Nakamura