Chalcogen (i.e., Oxygen (o), Sulfur (s), Selenium (se), Tellurium (te)) Containing Patents (Class 438/95)
  • Publication number: 20150044814
    Abstract: A method and system for forming chalcogenide semiconductor absorber materials with sodium impurities is provided. The system includes a sodium vaporizer in which a solid sodium source material is vaporized. The sodium vapor is added to reactant gases and/or annealing gases and directed to a furnace that includes a substrate with a metal precursor material. The precursor material reacts with reactant gases such as S-containing gases and Se-containing gases according to various process sequences. In one embodiment, a selenization operation is followed by an annealing operation and a sulfurization operation and the sodium vapor is caused to react with the metal precursor during at least one of the annealing and the sulfurization steps to produce a chalcogenide semiconductor absorber material that includes sodium dopant impurities.
    Type: Application
    Filed: August 9, 2013
    Publication date: February 12, 2015
    Applicant: TSMC Solar Ltd.
    Inventors: Chung-Hsien WU, Wen-Tsai YEN, Jyh-Lih WU
  • Patent number: 8952349
    Abstract: A switching device includes a substrate; a first electrode formed over the substrate; a second electrode formed over the first electrode; a switching medium disposed between the first and second electrode; and a nonlinear element disposed between the first and second electrodes and electrically coupled in series to the first electrode and the switching medium. The nonlinear element is configured to change from a first resistance state to a second resistance state on application of a voltage greater than a threshold.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: February 10, 2015
    Assignee: Crossbar, Inc.
    Inventors: Wei Lu, Sung Hyun Jo
  • Publication number: 20150037927
    Abstract: A method for producing a layered stack for manufacturing a thin film solar cell having a compound semiconductor of the type Cu2ZnSn(S,Se)4 is described.
    Type: Application
    Filed: April 25, 2013
    Publication date: February 5, 2015
    Inventors: Robert Lechner, Gowtham Manoharan, Stefan Jost
  • Patent number: 8946838
    Abstract: A radiation converter includes a directly converting semiconductor layer having grains whose interfaces predominantly run parallel to a drift direction—constrained by an electric field—of electrons liberated in the semiconductor layer. Charge carriers liberated by incident radiation quanta are accelerated in the electric field in the direction of the radiation incidence direction and on account of the columnar or pillar-like texture of the semiconductor layer, in comparison with the known radiation detectors, cross significantly fewer interfaces of the grains that are occupied by defect sites. This increases the charge carrier lifetime/mobility product in the direction of charge carrier transport. Consequently, it is possible to realize significantly thicker semiconductor layers for the counting and/or energy-selective detection of radiation quanta. This increases the absorptivity of the radiation converter which in turn makes it possible to reduce a radiation dose applied to the patient.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: February 3, 2015
    Assignee: Siemens Aktiengesellschaft
    Inventor: Christian Schröter
  • Patent number: 8946073
    Abstract: A phase change memory cell and a method for fabricating the phase change memory cell. The phase change memory cell includes a bottom electrode and a first non-conductive layer. The first non-conductive layer defines a first well, a first electrically conductive liner lines the first well, and the first well is filled with a phase change material in the phase change memory cell.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: February 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. BrightSky, Chung H. Lam, Jing Li, Alejandro G. Schrott, Norma E. Sosa Cortes
  • Patent number: 8946669
    Abstract: A method for forming a resistive memory device includes providing a substrate comprising a first metal material, forming a conductive silicon-bearing layer on top of the first metal material, wherein the conductive silicon-bearing layer comprises an upper region and a lower region, and wherein the lower region is adjacent to the first metal material, forming an amorphous layer from the upper region of the conductive silicon-bearing layer, and disposing an active metal material above the amorphous layer.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: February 3, 2015
    Assignee: Crossbar, Inc.
    Inventors: Sung Hyun Jo, Kuk-Hwan Kim, Tanmay Kumar
  • Patent number: 8945980
    Abstract: A method is provided for forming an alkali metal-doped solution-processed metal chalcogenide. A first solution is formed that includes a first material group of metal salts, metal complexes, or combinations thereof, dissolved in a solvent. The first material group may include one or more of the following elements: copper (Cu), indium (In), and gallium (Ga). An alkali metal-containing material is added to the first solution, and the first solution is deposited on a conductive substrate. The alkali metal-containing material may be sodium (Na). An alkali metal-doped first intermediate film results, comprising metal precursors from corresponding members of the first material group. Then, thermally annealing is performed in an environment of selenium (Se), Se and hydrogen (H2), hydrogen selenide (H2Se), sulfur (S), S and H2, hydrogen sulfide (H2S), or combinations thereof. The metal precursors in the alkali metal-doped first intermediate film are transformed, and an alkali metal-doped chalcogenide layer is formed.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: February 3, 2015
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Sean Vail, Gary Foley, Alexey Koposov
  • Publication number: 20150027538
    Abstract: A solar battery capable of increasing conversion efficiency compared with a conventional solar battery using a chalcopyrite p-type light absorption layer. A light absorption layer of the solar battery is a p-type semiconductor layer including Cu, Ga, and an element selected from group VIb elements. A photoluminescence spectrum or a cathode luminescence spectrum obtained from the light absorption layer includes an emission peak with the half-value width of not less than 1 meV and not more than 15 meV. The ratio of the particles with the grain size of not less than 2 ?m and not more than 8 ?m in a surface of the light absorption layer to the surface area of the entire film is not less than 90%.
    Type: Application
    Filed: February 28, 2013
    Publication date: January 29, 2015
    Inventors: Yasuhiro Aida, Daisuke Tanaka, Masato Kurihara
  • Publication number: 20150031164
    Abstract: Vapor deposition apparatus for forming stacked thin films on discrete photovoltaic module substrates conveyed in a continuous non-stop manner through the apparatus are provided. The apparatus includes a first sublimation compartment positioned over a first deposition area of said apparatus, a second sublimation compartment positioned over a second deposition area of said apparatus, and an internal divider positioned therebetween and defining a middle seal member. An actuator is attached to the internal divider and is configured to move the internal divider to control intermixing of first source material vapors and second source material vapors within the first deposition area and the second deposition area. Methods are also generally provided for depositing stacked thin films on a substrate.
    Type: Application
    Filed: July 26, 2013
    Publication date: January 29, 2015
    Applicant: First Solar, Inc.
    Inventor: Mark Jeffrey Pavol
  • Publication number: 20150031166
    Abstract: A method of manufacturing a light absorbing layer for a solar cell by performing thermal treatment on a specimen configured to include thin films of one or more of copper, indium, and gallium on a substrate and element selenium, includes steps of: heating a wall of a chamber up to a predefined thin film formation temperature in order to maintain a selenium vapor pressure; mounting the specimen and the element selenium on the susceptor at the room temperature and loading the susceptor in the chamber; and heating the specimen in the lower portion of the susceptor and, at the same time, heating the element selenium in the upper portion of the susceptor.
    Type: Application
    Filed: October 15, 2014
    Publication date: January 29, 2015
    Inventor: Seong Hoon SONG
  • Publication number: 20150031165
    Abstract: Scribing and deposition processes can be used to interconnect cells within photovoltaic modules.
    Type: Application
    Filed: September 11, 2014
    Publication date: January 29, 2015
    Inventors: Oleh P. Karpenko, Jianjun Wang
  • Publication number: 20150031163
    Abstract: Methods for forming a back contact on a thin film photovoltaic device are provided that include applying a conductive paste onto a surface defined by a p-type absorber layer (e.g., comprising cadmium telluride) of a p-n junction and curing the conductive paste to form a conductive coating on the surface defined by a p-type absorber layer of the p-n junction. The conductive paste can include a conductive material, a solvent system, and a binder such that during curing an acid from the conductive paste reacts to enrich the surface with tellurium while copper is deposited onto the Te enriched surface. The acid is then substantially consumed during curing.
    Type: Application
    Filed: July 25, 2013
    Publication date: January 29, 2015
    Inventors: Tammy Jane Lucas, Scott Daniel Feldman-Peabody, Laura Anne Clark, Michael Christoper Cole, Caroline Rae Corwine
  • Publication number: 20150024543
    Abstract: A process for producing copper selenide nanoparticles by effecting conversion of a nanoparticle precursor composition comprising copper and selenide ions to the material of the copper selenide nanoparticles in the presence of a selenol compound. Copper selenide-containing films and CIGS semiconductor films produced using copper selenide as a fluxing agent are also disclosed.
    Type: Application
    Filed: July 16, 2014
    Publication date: January 22, 2015
    Inventors: James Harris, Nathalie Gresty, Ombretta Masala, Nigel Pickett
  • Publication number: 20150017756
    Abstract: A method of forming an absorber layer of a solar cell includes forming a plurality of precursor layers over a surface of a bottom electrode of a solar cell substrate. The step of forming includes depositing a first layer comprising selenium and copper and at least one of gallium or indium over at least a portion of the surface using a sputtering source or an evaporation source, the first layer having a first concentration of copper, depositing a second layer comprising selenium and at least one of the group consisting of copper, gallium or indium over at least the portion of the surface, the second layer having a second concentration of copper less than the first concentration of copper, and annealing the precursor layers to form an absorber layer.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 15, 2015
    Inventors: Shih-Wei CHEN, Li XU
  • Publication number: 20150017757
    Abstract: A method for forming thin film solar cell materials introducing a first inert gas mixture that includes hydrogen selenide into a chamber at a first pressure value until the chamber reaches a second pressure value and at a first temperature value, wherein the second pressure value is a predefined percentage of the first pressure value. The temperature in the chamber is increased to a second temperature value for a selenization process so that the pressure in the chamber increases to a third pressure value. Residual gas that is generated during the selenization process can be removed from the chamber. A second inert gas mixture that includes hydrogen sulfide is added into the chamber until the chamber reaches a fourth pressure value. The temperature in the chamber is increased to a third temperature value for a sulfurization process. The chamber is cooled after the sulfurization process.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 15, 2015
    Inventors: Kwang-Ming LIN, Chi-Wei LIU, Wen-Cheng KUO
  • Patent number: 8933430
    Abstract: A variable resistance memory device and a method of manufacturing the same are provided. The variable resistance memory device includes a multi-layered insulating layer including a plurality of holes formed on a semiconductor substrate, a lower electrode formed in a bottom of each of the holes, a first spacer formed on the lower electrode and a sidewall of each of the holes, a second spacer formed on an upper sidewall of the first spacer, a third spacer formed on a lower sidewall of the first spacer below the second spacer, a variable resistance part that is formed on the lower electrode has a height lower than a height of a top of each hole, and an upper electrode formed on the variable resistance part to be buried in each hole.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: January 13, 2015
    Assignee: SK Hynix Inc.
    Inventors: Ha Chang Jung, Gi A Lee
  • Patent number: 8932897
    Abstract: A phase change memory cell includes a first contact, a phase change region above and in contact with the first contact, an electrode region, and a second contact above and in contact with the electrode region. The phase change region surrounds the electrode region. The electrode region has a first surface in contact with the phase change region and a second surface in contact with the second contact, and the second surface is wider than the first surface.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: January 13, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Huei Shen, Tsun Kai Tsao, Shih-Chang Liu, Chia-Shiung Tsai
  • Publication number: 20150000742
    Abstract: A charcopyrite-based thin film solar cell device and a method of fabricating the same is described. The solar cell includes a stacked absorber film over a substrate. The stacked absorber film includes at least two sets of absorber materials and each set includes at least three layers. At least one of the three layers includes elemental selenium and at least one of the layers includes a metal selected from the group consisting of copper, indium or gallium. The at least one selenium layer is in contact with the at least one metal layer. The at least two sets form an absorber film including multi-layer embedded selenium.
    Type: Application
    Filed: July 1, 2013
    Publication date: January 1, 2015
    Applicant: TSMC Solar Ltd.
    Inventors: Chun-An Lu, Li Xu, Jyh-Lih Wu
  • Publication number: 20150000741
    Abstract: A photovoltaic device includes a first contact and a hybrid absorber layer. The hybrid absorber layer includes a chalcogenide layer and a semiconductor layer in contact with the chalcogenide layer. A buffer layer is formed on the absorber layer, and a transparent conductive contact layer is formed on the buffer layer.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 1, 2015
    Inventors: Tayfun Gokmen, Oki Gunawan, Richard A. Haight, Jeehwan Kim, David B. Mitzi, Mark T. Winkler
  • Patent number: 8921691
    Abstract: There is provided a solar cell in which a lower electrode layer, a photoelectric conversion layer having a chalcopyrite structure that includes a Group Ib element, a Group IIIb element, and a Group VIb element, and an upper electrode layer are sequentially formed on top of a substrate, wherein the solar cell is provided with a silicate layer between the substrate and the lower electrode layer.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: December 30, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Shogo Ishizuka, Shigeru Niki, Nobuaki Kido, Hiroyuki Honmoto
  • Patent number: 8921821
    Abstract: Some embodiments include a method of forming a memory cell. A first portion of a switching region is formed over a first electrode. A second portion of the switching region is formed over the first portion using atomic layer deposition. The second portion is a different composition than the first portion. An ion source region is formed over the switching region. A second electrode is formed over the ion source region. Some embodiments include a memory cell having a switching region between a pair of electrodes. The switching region is configured to be reversibly transitioned between a low resistive state and a high resistive state. The switching region includes two or more discrete portions, with one of the portions not having a non-oxygen component in common with any composition directly against it in the high resistive state.
    Type: Grant
    Filed: January 10, 2013
    Date of Patent: December 30, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Shuichiro Yasuda, Noel Rocklein, Scott E. Sills, D. V. Nirmal Ramaswamy, Qian Tao
  • Patent number: 8921147
    Abstract: A multi-stage method and apparatus for vaporizing and depositing a tellurium containing semiconductor material on a substrate.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: December 30, 2014
    Assignee: First Solar, Inc.
    Inventors: Arnold Allenic, Zhigang Ban, John Barden, Benjamin Milliron, Rick C. Powell
  • Patent number: 8921817
    Abstract: A phase-change random access memory (PCRAM) device and a method of manufacturing the same. The PCRAM includes a heating electrode having an upper surface protruding in a stepped shape and a phase-change material layer formed in a phase-change space on the heating electrode, the phase-change material layer having a plurality of portions having thicknesses corresponding to the stepped shape of the heating electrode.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: December 30, 2014
    Assignee: SK Hynix Inc.
    Inventor: Min Seok Son
  • Patent number: 8921822
    Abstract: A phase-change random access memory (PRAM) device and a method of manufacturing the same are provided. The PRAM device includes a semiconductor substrate in which a switching device is formed, a lower electrode configured to be formed on the switching device and having a void formed in a portion of an upper surface thereof, and a phase-change layer configured to be formed on the lower electrode having the void.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: December 30, 2014
    Assignee: SK hynix Inc.
    Inventor: Doo Kang Kim
  • Publication number: 20140374609
    Abstract: Provided is a radiation detecting element, including: a semiconductor layer including a tin oxide crystal; and a detecting unit configured to detect, as an electrical signal, charges generated in the semiconductor layer when the semiconductor layer is irradiated with radiation, in which a resistivity of the semiconductor layer is 107 ?·cm or more.
    Type: Application
    Filed: June 11, 2014
    Publication date: December 25, 2014
    Inventors: Tatsuya Iwasaki, Tatsuya Saito, Toru Den, Yoshinobu Nakamura, Hidenori Takagi
  • Patent number: 8916414
    Abstract: To form a memory cell with a phase change element, a hole is formed through an insulator to a bottom electrode, and a phase change material is deposited on the insulator surface covering the hole. A confining structure is formed over the phase change material so the phase change material expands into the hole when heated to melting to become electrically connected to the bottom electrode. A top electrode is formed over and electrically connects to the phase change material. The bottom electrode can include a main portion and an extension having a reduced lateral dimension. The confining structure can include capping material having a higher melting temperature than the phase change material, and sufficient tensile strength to ensure the phase change material moves into the hole when the phase change material melts and expands. The hole can be a J shaped hole.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: December 23, 2014
    Assignee: Macronix International Co., Ltd.
    Inventors: Huai-Yu Cheng, Hsiang-Lan Lung
  • Patent number: 8916413
    Abstract: The present invention discloses a phase change memory and a manufacturing method thereof. The phase change memory according to the present invention uses top electrodes provided on the top of storage nodes to heat the storage nodes such that a phase change layer in the storage nodes undergoes a phase change. In the phase change memory of embodiments of the present invention, the contact area between the top electrode and the storage node is relatively small, which is good for phase change. Moreover, each column of storage nodes is connected by the same linear top electrode, which can improve photo alignment shift margin.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: December 23, 2014
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Minda Hu, James Hong
  • Patent number: 8916412
    Abstract: A method of forming an ohmic contact and electron reflector on a surface of a CdTe containing compound film as may be found, for example in a photovoltaic cell. The method comprises forming a Cd-deficient, Te-rich surface region at a surface of the CdTe containing compound film; exposing the Cd-deficient surface region to an electron reflector forming material; forming the electron reflector; and laying down a contact layer over the electron reflector layer. The solar cell so produced has a Cd-deficient region which is converted to an electron reflector layer on the surface of a CdTe absorber layer, and an ohmic contact. A Cd/Te molar ratio within the Cd-deficient region decreases from 1 at an interface with the CdTe absorber layer to a value less than 1 towards the ohmic contact.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: December 23, 2014
    Assignee: Encoresolar, Inc.
    Inventor: Bulent M. Basol
  • Publication number: 20140370649
    Abstract: A method and apparatus for an amount of Cu or Sb dopant incorporated into a zinc-based layer as the layer is being formed. The layer is formed over a coated substrate using an electrochemical deposition (ECD) process. In the ECD process, the bias voltage and plating solution composition may be systematically changed during the electrochemical deposition process to change the amount of Cu or Sb dopant incorporated into the plated layer.
    Type: Application
    Filed: December 20, 2013
    Publication date: December 18, 2014
    Applicant: First Solar, Inc.
    Inventors: Pawel Mrozek, Long Cheng
  • Patent number: 8912037
    Abstract: A method for making a photovoltaic device is presented. The method includes steps of disposing a window layer on a substrate and disposing an absorber layer on the window layer. Disposing the window layer, the absorber layer, or both layers includes introducing a source material into a deposition zone, wherein the source material comprises oxygen and a constituent of the window layer, of the absorber layer or of both layers. The method further includes step of depositing a film that comprises the constituent and oxygen.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: December 16, 2014
    Assignees: First Solar, Inc., Alliance for Sustainable Energy, LLC
    Inventors: James Neil Johnson, David Scott Albin, Scott Feldman-Peabody, Mark Jeffrey Pavol, Robert Dwayne Gossman
  • Patent number: 8912515
    Abstract: A method for manufacturing a memory cell device includes forming a bottom electrode comprising a pipe-shaped member, a top, a bottom and sidewalls having thickness in a dimension orthogonal to the axis of the pipe-shaped member, and having a ring-shaped top surface. A disc shaped member is formed on the bottom of the pipe-shaped member having a thickness in a dimension coaxial with the pipe-shaped member that is not dependent on the thickness of the sidewalls of the pipe-shaped member. A layer of phase change material is deposited in contact with the top surface of the pipe-shaped member. A top electrode in contact with the layer of programmable resistive material. An integrated circuit including an array of such memory cells is described.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: December 16, 2014
    Assignee: Macronix International Co., Ltd.
    Inventor: Hsiang-Lan Lung
  • Publication number: 20140361393
    Abstract: A semiconductor element is disclosed including a construction with electrode-dividing grooves, in which a dark current is smaller than in existing examples. A method of forming such grooves is also disclosed. In an embodiment, grooves, which electrically divide an electrode layer formed on the surface of a substrate, are formed with a V-shaped cross-sectional shape, groove side walls in the electrode layer, constituting the grooves, being sloping surfaces. An embodiment of the method of forming the grooves includes using a dicing blade having a blade distal end portion which is sharpened into a V-shape to cut a semiconductor wafer in which multiple patterns of semiconductor elements including an electrode layer on the surface of a substrate are formed, forming the grooves having a V-shaped cross-sectional shape which divide the electrode layer in each semiconductor element.
    Type: Application
    Filed: June 6, 2014
    Publication date: December 11, 2014
    Inventors: Sakari KANEKU, Yasuhiro SHUTO, Akira TACHIBANA
  • Publication number: 20140363918
    Abstract: An light apparatus used in forming a solar cell includes a housing separate from other processing in a deposition processing system, a transport mechanism for carrying a solar cell into the housing after deposition of a front contact layer in the deposition processing system, and one or more light source elements arranged to apply light on the solar cell after deposition of the front contact layer. A method of making a solar cell includes forming a back contact layer on a glass substrate, forming an absorber layer on the back contact layer, forming a buffer layer on the absorber layer, and forming a front contact layer above the buffer layer, the glass substrate, back contact layer, absorber layer, buffer layer, and front contact layer forming a first module. The method includes applying a light source to the first module after forming the front contact layer separate from other processing.
    Type: Application
    Filed: June 10, 2013
    Publication date: December 11, 2014
    Inventors: Hao-Yu CHENG, Yung-Sheng CHIU, Yi-Feng HUANG, Chen-Yun WANG, Chi-Yu CHIANG, Hsuan-Sheng YANG, Kuan-Min LIN
  • Patent number: 8907205
    Abstract: A solar cell comprising a semiconductor solar cell of a first band gap; a buffer layer formed on a surface of the semiconductor solar cell; and at least one layer of a multiferroic or a ferroelectric material formed on the buffer layer; wherein the at least one layer of a multiferroic or a ferroelectric material has a second bang gap, the first band gap being smaller than the second band gap.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: December 9, 2014
    Assignee: Institut National de la Recherche Scientifique (INRS)
    Inventors: Riad Nechache, Andreas Ruediger, Federico Rosei
  • Patent number: 8906732
    Abstract: A method for fabricating a thin film photovoltaic device is provided. The method includes providing a substrate comprising a surface region made of a thin-film photovoltaic absorber including copper, indium, gallium, selenium, and sulfur species. Additionally, the method includes applying a dip-in chemical bath deposition process for forming a buffer layer containing at least zinc-ogygen-sulfide material but substantially free of cadmium species. Furthermore, the method includes producing a chemical bath including steps of heating a bath of water to about 75° C., adding aqueous ammonia to mix with the bath of water, adding a solution of sodium hydroxide, adding zinc salt solution, and adding a solution of thiourea. The dip-in chemical bath deposition process includes immersing a plurality of substrates formed with the thin-film photovoltaic absorber substantially vertically in the chemical bath for 30 minutes to form the zinc-oxygen-sulfide buffer layer followed by a cleaning and drying process.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: December 9, 2014
    Assignee: Stion Corporation
    Inventors: Robert D. Wieting, Jason Todd Jackson
  • Patent number: 8900664
    Abstract: A method is disclosed for fabricating high efficiency CIGS solar cells including the deposition of a multi-component metal precursor film on a substrate. The substrate is then inserted into a system suitable for exposing the precursor to a chalcogen to form a chalcogenide TFPV absorber. One or more Na precursors are used to deposit a Na-containing layer on the precursor film in the system. This method eliminates the use of dedicated equipment and processes for introducing Na to the TFPV absorber.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: December 2, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Haifan Liang, Jessica Eid, Jeroen Van Duren
  • Publication number: 20140345693
    Abstract: A photoelectric conversion device and a method for producing a photoelectric conversion device are disclosed. The photoelectric conversion device includes a light-absorbing layer. The light-absorbing layer contains a chalcopyrite-based compound, and has a peak intensity ratio IB/IA in a range of 3 to 9, where IA represents a peak intensity of the peak formed by combining a peak of a (220) plane and a peak of a (204) plane in X-ray diffraction, and IB represents a peak intensity of a (112) plane.
    Type: Application
    Filed: August 17, 2012
    Publication date: November 27, 2014
    Applicant: KYOCERA CORPORATION
    Inventors: Hideaki Asao, Shintaro Kubo, Shuji Nakazawa, Yusuke Miyamichi, Tatsuya Domoto, Keizo Takeda, Kazuki Yamada, Kotaro Tanigawa, Hiromitsu Ogawa
  • Publication number: 20140345673
    Abstract: Photovoltaic sub-cell interconnect systems and methods are provided. In one embodiment, a photovoltaic device comprises a thin film stack of layers deposited upon a substrate, wherein the thin film stack layers are subdivided into a plurality of sub-cells interconnected in series by a plurality of electrical interconnection structures; and wherein the plurality of electrical interconnection structures each comprise no more than two scribes that penetrate into the thin film stack layers.
    Type: Application
    Filed: May 21, 2014
    Publication date: November 27, 2014
    Applicant: Alliance for Sustainable Energy, LLC
    Inventors: Marinus Franciscus Antonius Maria van Hest, Heather Anne Swinger Platt
  • Patent number: 8894826
    Abstract: A method and apparatus for forming a thin film of a copper indium gallium selenide (CIGS)-type material are disclosed. The method includes providing first and second targets in a common sputtering chamber. The first target includes a source of CIGS material, such as an approximately stoichiometric polycrystalline CIGS material, and the second target includes a chalcogen, such as selenium, sulfur, tellurium, or a combination of these elements. The second target provides an excess of chalcogen in the chamber. This can compensate, at least in part, for the loss of chalcogen from the CIGS-source in the first target, resulting in a thin film with a controlled stoichiometry which provides effective light absorption when used in a solar cell.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: November 25, 2014
    Inventors: Jesse A. Frantz, Jasbinder S. Sanghera, Robel Y. Bekele, Vinh Q Nguyen, Ishwar D. Aggarwal, Allan J. Bruce, Michael Cyrus, Sergey V. Frolov
  • Patent number: 8895401
    Abstract: A method of forming a memory device, such as a PCRAM, including selecting a chalcogenide glass backbone material for a resistance variable memory function and devices formed using such a method.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: November 25, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Kristy A. Campbell
  • Publication number: 20140338751
    Abstract: A device of manufacturing a cascade thin film solar cell with improved productivity, and a thin film solar cell manufactured using the device have been disclosed. The thin film solar cell having a buffer layer formed by a method using the device has improved electrical characteristics.
    Type: Application
    Filed: October 14, 2013
    Publication date: November 20, 2014
    Applicant: SAMSUNG SDI CO., LTD.
    Inventor: Hyun-Chul Kim
  • Publication number: 20140342497
    Abstract: A method for producing a metal article may include: Producing a supply of a composite metal powder by: providing a supply of molybdenum metal powder; providing a supply of a sodium compound; combining the molybdenum metal powder and the sodium compound with a liquid to form a slurry; feeding the slurry into a stream of hot gas; and recovering the composite metal powder; and consolidating the composite metal powder to form the metal article, the metal article comprising a sodium/molybdenum metal matrix. Also disclosed is a metal article produced accordance with this method.
    Type: Application
    Filed: August 1, 2014
    Publication date: November 20, 2014
    Inventors: Naresh Goel, Carl Cox, David Honecker, Eric Smith, Christopher Michaluk, Adam DeBoskey, Sunil Chandra Jha
  • Publication number: 20140342496
    Abstract: We disclose a method of preparing CIGS absorber layers using coated semiconductor nanoparticle and nanowire networks. The nanoparticles and nanowires containing one or more elements from group IB and/or IIIA and/or VIA are prepared from metal salts such as metal chloride and acetate at room temperature without inert gas protection. A uniform and non-aggregation CIGS precursor layer is fabricated with the formation of nanoparticle and nanowire networks utilizing ultrasonic spraying technique. High quality CIGS film is obtained by cleaning the residue salts and carbon agents at an increased temperature and selenizing the pretreated precursor layer.
    Type: Application
    Filed: December 16, 2013
    Publication date: November 20, 2014
    Applicant: Sun Harmonics Ltd
    Inventors: Yuhang Ren, Paifeng Luo, Bo Gao
  • Publication number: 20140338741
    Abstract: A subject-matter of the invention is a conducting substrate (1) for a photovoltaic cell, comprising a carrier substrate (2) and an electrode coating (6) formed on the carrier substrate (2). The electrode coating (6) comprises a main molybdenum-based layer (8) formed on the carrier substrate (2), a barrier layer to selenization (10) formed on the main molybdenum-based layer (8) and, on the barrier layer to selenization (10), an upper layer (12) based on a metal M capable of forming, after sulfurization and/or selenization, an ohmic contact layer with a photoactive semiconducting material. The barrier layer to selenization (10) has a thickness of less than or equal to 50 nm, preferably of less than or equal to 30 nm, more preferably of less than or equal to 20 nm.
    Type: Application
    Filed: November 9, 2012
    Publication date: November 20, 2014
    Applicant: SAINT-GOBAIN GLASS FRANCE
    Inventors: Joerg Palm, Mathieu Urien, Gerard Ruitenberg, Charles Leyder, Andreas Heiss, Erwan Mahe, Delphine Dupuy
  • Publication number: 20140342495
    Abstract: We disclose a method of preparing CIGS absorber layers using coated semiconductor nanoparticle and nanowire networks. The nanoparticles and nanowires containing one or more elements from group IB and/or IIIA and/or VIA are prepared from metal salts such as metal chloride and acetate at room temperature without inert gas protection. A uniform and non-aggregation CIGS precursor layer is fabricated with the formation of nanoparticle and nanowire networks utilizing ultrasonic spaying technique. High quality CIGS film is obtained by cleaning the residue salts and carbon agents at an increased temperature and selenizing the pretreated precursor layer.
    Type: Application
    Filed: May 14, 2013
    Publication date: November 20, 2014
    Inventors: Yuhang Ren, Paifeng Luo, Bo Gao
  • Patent number: 8890107
    Abstract: Manufacturing processes for phase change memory have suffered from the problem of chalcogenide material being susceptible to delamination, since this material exhibits low adhesion to high melting point metals and silicon oxide films. Furthermore, chalcogenide material has low thermal stability and hence tends to sublime during the manufacturing process of phase change memory. According to the present invention, conductive or insulative adhesive layers are formed over and under the chalcogenide material layer to enhance its delamination strength. Further, a protective film made up of a nitride film is formed on the sidewalls of the chalcogenide material layer to prevent sublimation of the chalcogenide material layer.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: November 18, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Yuichi Matsui, Nozomu Matsuzaki, Norikatsu Takaura, Naoki Yamamoto, Hideyuki Matsuoka, Tomio Iwasaki
  • Patent number: 8889466
    Abstract: A method for forming a photovoltaic device includes forming an absorber layer with a granular structure on a conductive layer; conformally depositing an insulating protection layer over the absorber layer to fill in between grains of the absorber layer; and planarizing the protection layer and the absorber layer. A buffer layer is formed on the absorber layer, and a top transparent conductor layer is deposited over the buffer layer.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Talia S. Gershon, Supratik Guha, Jeehwan Kim, Mahadevaiyer Krishnan, Byungha Shin
  • Patent number: 8889468
    Abstract: A tandem photovoltaic cell. The tandem photovoltaic cell includes a bifacial top cell and a bottom cell. The top bifacial cell includes a top first transparent conductive oxide material. A top window material underlies the top first transparent conductive oxide material. A first interface region is disposed between the top window material and the top first transparent conductive oxide material. The first interface region is substantially free from one or more entities from the top first transparent conductive oxide material diffused into the top window material. A top absorber material comprising a copper species, an indium species, and a sulfur species underlies the top window material. A top second transparent conductive oxide material underlies the top absorber material. A second interface region is disposed between the top second transparent conductive oxide material and the top absorber material. The bottom cell includes a bottom first transparent conductive oxide material.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: November 18, 2014
    Assignee: Stion Corporation
    Inventor: Howard W. H. Lee
  • Patent number: 8889469
    Abstract: Methods and devices are provided for forming multi-nary semiconductor. In one embodiment, a method is provided comprising of depositing a precursor material onto a substrate, wherein the precursor material may include or may be used with an additive to minimize concentration of group IIIA material such as Ga in the back portion of the final semiconductor layer. The additive may be a non-copper Group IB additive in elemental or alloy form. Some embodiments may use both selenium and sulfur, forming a senary or higher semiconductor alloy. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: November 18, 2014
    Assignee: aeris CAPITAL Sustainable IP Ltd.
    Inventors: David B. Jackrel, Katherine Dickey, Kristin Pollock, Jacob Woodruff, Peter Stone, Gregory Brown
  • Publication number: 20140332080
    Abstract: A main object of the present invention is to provide a CZTS-based compound semiconductor whose band gap is different from that of a conventional CZTS-based compound semiconductor and a photoelectric conversion device prepared with the CZTS-based compound semiconductor. The present invention is a CZTS-based compound semiconductor in which a ratio of the number of moles of Cu to the total number of moles of Cu, Zn and Sn is larger than a ratio of the number of moles of Cu to the total number of moles of Cu, Zn and Sn configuring Cu2ZnSnS4, and a photoelectric conversion device prepared with the CZTS-based compound semiconductor.
    Type: Application
    Filed: November 30, 2012
    Publication date: November 13, 2014
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, JAPAN FINE CERAMICS CENTER
    Inventors: Takenobu Sakai, Hiroki Awano, Ryosuke Maekawa, Taro Ueda, Seiji Takahashi