Abstract: A fully distributed, disposable, self-organizing, independently powered communications system is described capable of providing a radio-communications channel in environments that may prove dangerous or inacessible to humans and may be hostile to communications systems by exposing them to electromagnetic interference, obstacles to line-of-sight operation and threats to survival.

Abstract: A one-way addressable system includes a broadcasting center from which pay television signals and time codes representing time are produced, and subscriber's television receivers. The receiver includes a detector which produces a failure signal upon detection of a failure of a power supply along a primary power line, and produces an establish signal upon detection of an establish of the power supply along the primary power line. A secondary power source is provided for supplying power to the receiver when the failure signal is produced. A buffer is provided for storing newly received time code while the establish signal is present and for holding the same time code, which is received immediately before the generation of the failure signal, while the failure signal is present. A memory is provided for storing the time code shifted from the buffer in response to the receipt of a new time code to the buffer.

Abstract: Receiver (1-9) provided with a frequency control loop (2-6) for automatic fine tuning, consecutively incorporating a controllable oscillator (6) which is tunable in frequency by means of a variable capacitance diode (D), a mixer stage (2) to which the signal from the controllable oscillator (6) is applied for converting an RF receiver signal into an intermediate frequency signal, a frequency voltage converter (4) tuned to a fixed intermediate frequency for converting frequency deviations of the intermediate frequency signal relative to the fixed intermediate frequency into amplitude variations of the frequency voltage converter (4) output signal relative to a refrence value, a control signal generating circuit (5) for deriving a control signal for the variable capacitance diode (D) of the controllable oscillator (6) from the output signal of the frequency voltage converter (4), which at least partly compensates the asymmetrical diode capacitance-voltage characteristic.

Abstract: A satellite television reception only receiver includes a programmable microprocessor which has a communications link for communicating between a plurality of receivers connected in a multiple receiver installation. An antenna is connected to only one receiver in the network, and it controls operation of the antenna, and the information relating to the antenna is transmitted to the other receivers to update them. The microprocessor further provides a means to programmably restrict access to particular satellites or transponders on satellites at each individual receiver, and vary the particular transponders or satellites restricted from receiver to receiver.

Abstract: A controller in a CATV converter provides three operating modes comprising: (1) a family viewing mode in which conversion of selected channels is blocked; (2) an enter access code mode for selecting the channels to be blocked from family viewing; and (3) a parental control mode in which all channels may be viewed. The family viewing mode is enabled by turn-on of the converter or by commands by the user or the CATV system operator. The enter access code mode is initiated by a user command. The parental control mode is enabled by user entry of a valid access code or when a new access code is created while in the enter access code mode.

Abstract: The circuit arrangement in a communication system which is protected by subscriber-specific passwords having a memory which contains all the possible passwords and a comparator which compares each received password with the memory content. A monostable delay circuit with a subsequent logic combining gate, are connected to the output of the comparator (2) via an input gate (5). The monostable delay circuit and the logic combining gate are such that in the presence of an energizing signal applied to a special input (C), when there is non-agreement between the received and the stored passwords the monostable delay circuit starts and during operation inhibits the logic combining gate, while when there is agreement the logic output gate (6) is enabled. Such a circuit arrangement can be provided before each selector stage of a switching system of before each accessible channel of a mobile radio system.

Abstract: The tuning system for a high frequency receiver, particularly an AM receiver for vehicles, comprises a tunable input resonance circuit having a variable inductance formed by the signal winding of a controllable inductor. The control winding of the inductor is supplied with a control current. The control winding is simultaneously used as the frequency determinative element of an auxiliary oscillator. A frequency control loop is used to adjust the oscillating frequency of the auxiliary oscillator by adjustment of the control current. The tuning system allows a selective coupling between the tuned antenna input circuit and the rf front end of the receiver.

Abstract: An automatic fine tuning (AFT) circuit is provided which generates an AFT control signal in response to a video intermedate frequency (I.F.) signal. The I.F. signal is supplied to the input of a current source amplifier, which provides current signals of like phase relationship to a discriminator network. The discriminator network is comprised of two tuned circuits, one of which is resonant at a frequency below the desired frequency of the I.F. picture carrier, and the other resonant at a frequency above the desired frequency. The tuned circuits develop voltage variations which vary differentially in magnitude in response to the frequency deviation of the I.F. picture carrier from its desired frequency. The differentially related voltages are detected by two peak detector networks for use as AFT control signals. The current source amplifier and peak detector networks may be conveniently fabricated on a single I.C. chip.

Abstract: An interface circuit that couples the output of a differential AFC detector to a tuner and in so doing provides a single-ended control signal and a substantially constant reference signal. A bridging circuit combines the differential outputs to effect a substantially constant signal which is appropriately scaled by a referencing circuit so as to develop the reference voltage required. A dividing circuit coupled to one of the differential outputs develops an AFC control voltage having the range required to accommodate the tuner's AFC-responsive circuitry.

Abstract: This disclosure describes a continuous tuning arrangement for a variable frequency response circuit of the type covering a relatively wide frequency range. Many techniques for accommodating a wide frequency range are known and include synthesizers, waveform generators and so on which employ various coarse tuning controls or devices for band selection. A synthesizer is described which employs a continuous tuning means enabling one to continuously tune the circuit from a first frequency to a second frequency or from said second frequency to said first in a rapid manner, whereby continuous tuning is afforded without the necessity of returning the tuning control to a start position each time a new frequency is selected by the coarse tuning control.

Abstract: A preset tuning apparatus adapted for selecting a preset channel among a plurality of channels, comprising a tuner including a tuning circuit including a voltage controlled variable capacitance diode, a manually adjustable tuning voltage generator for providing a tuning voltage to the voltage controlled variable capacitance diode, a non-volatile analog storage including a plurality of floating gate type field effect memory devices, a band selection switch, a preset selection switch, a preset memory switch, addressing circuits coupled to the band selection and preset selection switches for addressing a corresponding one of the plurality of memory devices, an erase/write/read voltage generator, and a mode control coupled to the erase/write/read voltage generator and responsive to the band selection, preset selection and preset memory switches for alternately and repetitively writing and reading the analog value in the addressed memory device until the data corresponding to the tuning voltage of the tuning volta