With Frequency Stabilization For At Least One Local Oscillator Patents (Class 455/316)
  • Patent number: 4575761
    Abstract: A double conversion tuner stabilized against drift includes a first local oscillator included in a phase locked loop (PLL) and a second local oscillator included in an automatic fine tuning (AFT) loop. A switching arrangement selectively allows the AFT signal to control the second local oscillator only when the operation of the PLL has been completed and if the picture carrier of the IF signal produced at the output of the tuner is within the AFT control range to prevent the second local oscillator from being tuned incorrectly.
    Type: Grant
    Filed: April 28, 1983
    Date of Patent: March 11, 1986
    Assignee: RCA Corporation
    Inventors: David J. Carlson, Juri Tults
  • Patent number: 4521916
    Abstract: The tuning control system of a double-conversion tuner includes a phase locked loop type of frequency synthesizer for controlling the frequency of a controllable oscillator comprising the first local oscillator of the double-conversion tuner according to the frequency deviation of the difference between the frequencies of the first and second local oscillators from a reference frequency in order to compensate for the drift of either one of the local oscillators. An up/down counter which counts in one sense in response to the first local oscillator signal and in the other sense in response to the other local oscillator signal is used to generate the frequency difference signal. Because the frequency of the first local oscillator is always greater from the frequency of the second local oscillator the up/down counter can be implemented in the form of a simple pulse swallower.
    Type: Grant
    Filed: November 29, 1983
    Date of Patent: June 4, 1985
    Assignee: RCA Corporation
    Inventor: Charles M. Wine
  • Patent number: 4512035
    Abstract: A method of programming a ROM for a multiple conversion frequency synthesizer provides a mechanism for avoiding receiver self-quieting. The method includes the steps of searching for frequencies which cause potential receiver self-quieting responses and selecting a second local oscillator frequency suitable for avoiding receiver self-quieting. A single bit of a ROM is used to represent possible second local oscillator frequencies synthesized by the frequency synthesizer which provide either high-side or low-side injection to the second mixer. Finally, the method includes the step of encoding the single second local oscillator frequency determining bit of the ROM appropriately for selecting the local oscillator frequency which avoids receiver self-quieting.
    Type: Grant
    Filed: May 16, 1983
    Date of Patent: April 16, 1985
    Assignee: Motorola, Inc.
    Inventors: Alan M. Victor, Darrell E. Davis
  • Patent number: 4491976
    Abstract: A double-superheterodyne tuner for a television receiver comprises a tunable oscillator, a fixed oscillator, two mixer stages and a band-pass filter between the mixer stages, and operates at a GHz intermediate frequency between the mixer stages. The two oscillators and the bandpass filter each includes a microstrip line resonator formed in a dielectric body having substantially the same dielectric constant and dielectric constant temperature coefficient to each other, thereby compensating the variation of the resonant frequency in the resonator due to an ambient temperature variation.
    Type: Grant
    Filed: October 25, 1982
    Date of Patent: January 1, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Saitoh, Shigeo Matsuura, Minoru Moteki, Hiroshi Hatashita
  • Patent number: 4479257
    Abstract: The invention relates to a superheterodyne circuit characterized by comprising a first mixer converting a received signal into the first intermediate frequency, a second mixer converting the first intermediate frequency into a second intermediate frequency, and a product detection stage demodulating the second intermediate frequency to an audio frequency, by having a constitution wherein the local oscillation of the first mixer is input from a VCO for which a PLL circuit is used, wherein the local oscillation of the second mixer is an output obtained by mixing the frequency of a second oscillator with that of a third oscillator in a fourth mixer, wherein the second oscillator combined with the frequency of the VFO in the sixth mixer, alone or in further combination with the frequency of the output of a BFO input via to the product detection stage is the frequency of the third oscillator or an output obtained by mixing the frequency of the third oscillator with a frequency obtained through the frequency divisi
    Type: Grant
    Filed: December 30, 1982
    Date of Patent: October 23, 1984
    Assignee: Yaesu Musen Co., Ltd.
    Inventor: Koji Akiyama
  • Patent number: 4476585
    Abstract: A demodulator of the type employed in a "zero-IF" system uses a local oscillator for providing guadrature output signals at the center frequency of an FM signal to be demodulated. The demodulator has first and second mixers for separately mixing the FM signal with the quadrature signals to provide a first and second output signal each in quadrature at the outputs of said mixers. These signals are low pass filtered. The demodulator includes third and fourth mixers with each mixer receiving at an input one of the low pass signals. At another input the mixers receive third and fourth signals. The third and fourth signals are derived from mixing a variable controlled oscillator (VCO) signal with the local oscillator guadrature signals. The outputs of the third and fourth mixers are applied to the inputs of a difference amplifiers, the output of which controls the frequency of the VCO in an automatic frequency control mode (AFC) to cause the output of the difference amplifier to provide demodulated signal.
    Type: Grant
    Filed: January 25, 1982
    Date of Patent: October 9, 1984
    Assignee: International Telephone and Telegraph Corporation
    Inventor: Joseph Reed
  • Patent number: 4457006
    Abstract: In a Global Positioning System type of navigation system, a biphase modulated radio frequency input signal is applied to the "front end" of a double heterodyne receiver having a second intermediate frequency stage which operates in the audio frequency range. The audio output signal is phase locked to a 1 KHz reference signal and is applied to a microprocessor for processing via an interface circuit which includes a relatively simple amplitude detector and a novel biphase detector. The microprocessor also controls the phase shifting of a pseudorandom noise code generator whose output is modulated with the output of the first intermediate frequency stage of the receiver.
    Type: Grant
    Filed: November 16, 1981
    Date of Patent: June 26, 1984
    Assignee: Sperry Corporation
    Inventor: Reuben E. Maine
  • Patent number: 4395777
    Abstract: A double superheterodyne receiver has a frontend stage for receiving an RF signal, a first phase-locked loop (PLL) local oscillator circuit for generating a first local oscillator signal, a first mixer for mixing the RF signal with the first local oscillator signal to produce a first IF signal, a second PLL local oscillator circuit for generating a second local oscillator signal, a second mixer for mixing the first IF signal with the second local oscillator signal to produce a second IF signal, a detector for detecting information carried on the second IF signal and control circuitry for controlling the dividing ratios of programmable frequency dividers respectively included in the first and second PLL local oscillator circuits. To tune the receiver to a desired RF frequency, the control circuitry, which can include a micro-computer, selects the dividing ratio N.sub.1 of the first PLL local oscillator circuit and the dividing ratio N.sub.
    Type: Grant
    Filed: January 8, 1981
    Date of Patent: July 26, 1983
    Assignee: Sony Corporation
    Inventors: Ryuji Oki, Takashi Ebisawa
  • Patent number: 4368542
    Abstract: A phase canceller for a carrier recovery network (CRN) to cancel phase shifts associated with the band pass filter in the network. The canceller is a semiconductor device receiving an input signal at one junction to cause emitted carriers to migrate to a collector at a controlled rate determined by an applied electric field between a pair of ohmic contacts located between emitter and collector junctions with the field control by a signal from a phase detector in the AFC loop of the CRN.
    Type: Grant
    Filed: March 27, 1980
    Date of Patent: January 11, 1983
    Assignee: Communications Satellite Corporation
    Inventor: Vasil Uzunoglu
  • Patent number: 4355404
    Abstract: A carrier recovery network for QPSK modems employs a synchronous oscillator which may be used as a frequency multiplier, divider and tracking bandpass filter. A preferred embodiment of the carrier recovery network includes a multiply-by-four circuit to remove QPSK data modulation, and a synchronous oscillator tuned to one-fourth the input frequency to thereby act as a frequency divider and tracking bandpass filter to provide a recovered carrier signal.
    Type: Grant
    Filed: May 27, 1980
    Date of Patent: October 19, 1982
    Assignee: Communications Satellite Corporation
    Inventor: Vasil Uzunoglu
  • Patent number: 4340974
    Abstract: The invention provides a double superheterodyne receiver having the usual first and second frequency changers associated with first and second local oscillators. The second local oscillator is provided as a voltage controlled oscillator and means are provided for determining the difference frequency between the two local oscillators to produce a control signal which is applied to the second local oscillator to tend to maintain the difference frequency constant.
    Type: Grant
    Filed: February 23, 1981
    Date of Patent: July 20, 1982
    Assignee: Eddystone Radio Limited
    Inventors: Billy O. Cooke, Philip N. Nield
  • Patent number: 4317228
    Abstract: A television receiver includes a frequency synthesizer phase lock loop operated in a time multiplexed manner to provide two tuning signals for tuning a received television signal. The two tuning signals are developed at the outputs of first and second voltage controlled local oscillators alternately operated in response to a phase detector which is reset at the beginning of each alternate operation.
    Type: Grant
    Filed: October 15, 1979
    Date of Patent: February 23, 1982
    Assignee: Zenith Radio Corporation
    Inventor: Melvin C. Hendrickson
  • Patent number: 4298988
    Abstract: A tuning system for use in a radio frequency multi-signal receiving system, e.g., for CATV converters, utilizes a closed feedback loop digital arrangement for channel selection (local oscillator frequency control) and channel fine tuning. The system may be implemented either via discrete hardware or through the use of microprocessor controlled apparatus.In accordance with one aspect of the present invention, double heterodyne tuning apparatus automatically compensates for frequency drift in the second local oscillator.
    Type: Grant
    Filed: August 10, 1979
    Date of Patent: November 3, 1981
    Assignee: Jerrold Electronics Corp.
    Inventor: Charles L. Dages
  • Patent number: 4293825
    Abstract: A system of frequency-shifting of frequency modulated signals, continuously above or below a pre-established frequency, the shift being possibly also null. The system includes a source of frequency modulated signals, the frequency of which is to be shifted; a reference oscillator; a first phase locked loop to which is applied the signals from the signal source and the output of the reference oscillator, the arrangement being such that the first phase locked loop will be locked to a conversion frequency above or below the frequency of the signal source.
    Type: Grant
    Filed: April 13, 1979
    Date of Patent: October 6, 1981
    Assignee: Selenia Industrie Elettroniche Associate S.p.A.
    Inventor: Raffaele Cerra
  • Patent number: 4232191
    Abstract: A double super heterodyne FM receiver having a first local oscillator for deriving a first intermediate frequency signal from an FM input signal, tuning means for varying the frequency of the first local oscillator to tune the FM receiver to a predetermined frequency, a second local oscillator for deriving a second intermediate frequency signal from the first intermediate frequency signal, an FM detector for demodulating the second intermediate frequency and means for processing the demodulated signal, means for deriving the direct current component of an output signal occurring at a point after the FM detector, first control means for controlling the frequency of the second oscillator in response to the direct current component so that the direct current component is reduced to substantially zero to thereby lessen shock noise during the tuning of the receiver, second control means responsive to the tuning means being operated to tune the FM receiver so that the control means controls the means for deriving t
    Type: Grant
    Filed: February 17, 1978
    Date of Patent: November 4, 1980
    Assignee: Trio Kabushiki Kaisha
    Inventor: Takeshi Matsuzuka
  • Patent number: 4211975
    Abstract: The local signal generation arrangement employed in a radio communication system for transmitting and/or receiving an upper sideband (USB) and a lower sideband (LSB) signal, but not simultaneously, employs a method in which the generation and/or detection of both USB and LSB signals is accomplished by utilizing only one bandpass filter, a so-called single sideband (SSB) filter, together with a balanced modulator arranged to receive a carrier signal produced from an oscillator whose frequency is accordance with the characteristic frequency of either of a pair of crystal resonators, which correspond to the upper cut-off and the lower cut-off frequencies of the SSB bandpass filter, respectively. The output signal from the said SSB filter is referred to herein as the intermediate frequency (IF) signal.The local signal generation arrangement includes a phase-locked loop (PLL) including at least a phase comparator, a low pass filter, and a voltage-controlled oscillator (VCO).
    Type: Grant
    Filed: April 4, 1978
    Date of Patent: July 8, 1980
    Assignee: Anritsu Electric Company, Limited
    Inventor: Masahiro Kuroda
  • Patent number: 4198604
    Abstract: A heterodyne phase lock system is disclosed having a plurality of oscillator circuits, a similar plurality of heterodyne (mixer-filter) circuits representing an input circuit, and a similar plurality of heterodyne circuits representing a control circuit, at least one of the oscillator circuits being a voltage controlled oscillator (VCO) circuit. The heterodyne circuits of the input circuit are cascaded, i.e., linked each to the other, successively, and the heterodyne circuits of the control circuit are likewise cascaded. Each oscillator is linked to a pair of heterodyne circuits, i.e., to one heterodyne circuit in the input circuit and to one heterodyne circuit in the control circuit, and applies a common output signal to said pair of heterodyne circuits.
    Type: Grant
    Filed: June 8, 1977
    Date of Patent: April 15, 1980
    Assignee: Hewlett-Packard Company
    Inventor: Steven N. Holdaway