Abstract: Determining a pattern of arrival time cycle skip in an acoustic flow meter. At least some of the illustrative embodiments are methods comprising transceiving acoustic signals through a fluid flowing in a meter (the transceiving between respective pairs of a plurality of transducer pairs), measuring transit time of acoustic signals between the respective pairs of the plurality of transducers pairs, calculating a plurality of error values (each error value indicative of a cycle skip mode in measuring of the transit time of the acoustic signals), and determining the cycle skip mode using, at least in part, the plurality of error values.

Abstract: An apparatus and method for compensating clock period elongation during scan testing in an integrated circuit (IC) includes operating a clock associated with the IC at a frequency (fTARGET) at which IC operation is sought to be determined, measuring the actual clock period (TCLOCK—OUT) at a clock output, scan testing the IC, measuring the actual clock period (TSCAN—CLOCK—OUT) at the clock output, determining a delay by calculating the difference between TSCAN—CLOCK—OUT and TCLOCK—OUT, and compensating for the delay by increasing the clock frequency during scan test.

Abstract: A self correcting device includes a first flip-flop to receive data and coupled to a clock input; one or more delayed flip-flops used to detect delay variations; a multiplexer coupled to the output of the first flip-flop and the delayed flip-flops, a metastability detector and error check controller to control the multiplexer to select one flip-flop output; and an adaptive voltage swing link coupled to the multiplexer output to generate a voltage swing on the link based on a selected clock skew.

Abstract: A system and method is described herein for managing power consumption by a plurality of sensors in a proximity-based ad hoc network. The system and method receives sensor data that is provided from a plurality of sensors and constructs a proximity-based ad hoc network among the plurality of sensors based on the sensor data. The system and method also receives and analyzes power status information from each sensor in a group of spatially and temporally proximate sensors in the proximity-based ad hoc network. Based on the analysis, the system and method then modifies a manner in which at least one sensor in the group provides sensor data.

Abstract: A semiconductor test apparatus to test a semiconductor circuit includes a pattern generator which generates a test pattern for testing the semiconductor circuit, a waveform shaper which shapes a test signal to be supplied to the semiconductor circuit based on the test pattern, a pulse width adjusting circuit which generates a timing signal for determining a phase of the test signal by adjusting a pulse width of an input pulse signal and outputs the timing signal to the waveform shaper, and a judging section which judges whether the semiconductor circuit is good or bad based on an output signal output from the semiconductor circuit.

Abstract: The invention provides a technique of correcting time data based on a clock signal affected by jitter. The error due to jitter in a time measurement of an event in the clock signal (17) is determined at the time of the event or as an average over a number of events. A measurement is made of a time dependent reference variable associated with a long-time constant device (19), such as a capacitor, which is relatively immune to localised jitter. The measurement may be a reading of the voltage across a charging capacitor. The measured value is compared to an expected value and the time error is based on the result. The expected value may be known from look-up tables (18) in the memory (6) of the device (1) comprising the capacitor (19) or calculated from known charging rates of the capacitor. The error due to jitter of a time measurement is approximately linearly proportional to the difference in voltage between the measured and the expected values of the capacitor.

Abstract: A method for inspecting a defect of a surface of a sample includes irradiating a laser beam on the sample surface a plurality of times so that at least part of an illumination field of the laser beam on the sample surface illuminates a first area of the sample surface each of the plurality of times, detecting a plurality of scattered light rays from the first area caused by the plurality of times of irradiations, correcting errors of detection timings for the plurality of detected scattered light rays, correcting at least one of adding and averaging the plurality of scattered light rays, determining a defect on the sample surface based on a calculation result in accordance with the at least one of the adding and averaging.

Abstract: In a method for monitoring a measurement system having a transmitter which determines the position of a moveable element and has a transmitter clock, and an electrical energy store which, in the event of a failure of an external electrical supply voltage (for the transmitter, continues to supply electrical power to at least a part of the transmitter, including the transmitter clock. After the external electrical supply voltage has been restored, the clock time of the transmitter clock is compared with a clock time of an external clock, and an incorrectly determined position is identified on the basis of the comparison of the clock times.

Abstract: A control device for work lamp includes a microprocessor, which is able to receive signals sent from a power supply unit and a switch. The microprocessor is able to determine the number of times that the switch is pressed and then send out a command to the activation unit, which will in turn activate the light unit. All or a part (a quarter, half or three quarters) of the lights of the light unit may be turned on in their full brightness, half of their full brightness or a portion of the full brightness or in flashing light. Hence, the control device of the present invention allows a user to select from several brightness levels according to the actual needs so as to save electricity.

Abstract: A Coriolis mass flow meter and method for compensation of transmission errors of its input circuit, wherein a high accuracy of measurement is achievable by determining the transmission error of the input circuit of at least two input branches on the basis of at least one reference signal, which travels simultaneously through all input branches.

Abstract: A method and system for calibration of multi-metric sensitive delay measurement circuits provides for reduction of process-dependent variation in delays and their sensitivities to circuit metrics. A process corner for the delay circuit(s) is determined from at least one delay measurement for which the variation of delay due to process variation is previously characterized. The delay measurement(s) is made at a known temperature(s), power supply voltage(s) and known values of any other environmental metric which the delay circuit is designed to measure. Coefficients for delay versus circuit metrics are then determined from the established process corner, so that computation of circuit metric values from the delay measurements have improved accuracy and reduced variation due to the circuit-to-circuit and/or die-to-die process variation of the delay circuits.

Abstract: Various techniques are described for high resolution time measurement using a programmable device, such as an FPGA. The timing may be triggered by any event, depending on the applications of use. Once triggering has occurred, a START pulse begins propagating through the FPGA. The pulse is able to propagate through the FPGA in a staggered manner traversing multiple FPGA columns to maximize the amount of time delay that may be achieved while minimizing the overall array size, and thus minimizing the resource utilization, of the FPGA. The FPGA timing delay is calibrated by measuring for the linear and non-linear differences in delay time of each unit circuit forming the staggered delay line path for the timing circuit. The FPGA is able to achieve nanosecond and sub-nanosecond time resolutions and thus may be used in applications such as various time of flight systems.

Abstract: In a method of delay calculation of relative timing paths of an integrated circuit, each of the paths contains at least one stage. The method is achieved by calculating an on-chip variation depending on a systematic component and an on-chip variation depending on a random component; and by carrying out delay calculation of relative timing paths by using the on-chip variation depending on the systematic component and the on-chip variation depending on the random component.

Abstract: A calibration device is provided for use with automatic test equipment (ATE). The calibration device includes circuitry having a fanout circuit. The compare-side fanout circuit has an input connected to a first channel of the ATE and outputs connected to N (N>1) channels of the ATE, where the N channels do not include the first channel. The ATE propagates an edge on the first channel, and the fanout circuit transmits the edge to the N channels. Optionally, a calibration device for use with automatic test equipment includes a drive-side circuit. The drive-side circuit includes circuitry having multiple inputs connected to N (N>1) channels of the ATE and an output connected to a second channel of the ATE that is not one of the N channels. The ATE propagates an edge on each of the N-channels and the circuitry propagates each edge to the second channel of the ATE.

Abstract: A calibration method for an oversampling acquisition system uses a digital calibration signal that has a period between edges that is unrelated to the period of a sample clock. The calibration signal in input in parallel to a plurality of samplers, each of which is clocked at a different time by a delayed version of the sample clock, to produce a plurality of sequential samples per sample clock period. Edge transitions of the calibration signal are counted that occur between adjacent ones of the samplers, and are accrued over an acquisition period to produce a plurality of edge counts. The edge counts are then processed to produce control signals to adjust the sample clock delay for each sampler so that the time intervals between the sequential samples are essentially uniform.

Abstract: A ranging system determines ranging information of a spacecraft carrying a component of a communication channel. In order to provide a ranging system for determining ranging information of a satellite carrying a transponder as well as to provide a method thereof which yield a sufficient accuracy without causing further costs when narrow spot beams by the transponder are used, a ranging system includes a plurality of receiving stations at different locations on earth, wherein each receiving station is arranged for receiving a reference signal from the component; a synchronization unit for providing a synchronized time base between the plurality of receiving stations; a calculation unit for calculating the ranging information in accordance with the propagation time of each received reference signal and with the synchronized time base; wherein at least one receiving station includes a correlation receiver for receiving the reference signal.

Abstract: Circuits, methods and apparatus are provided to reduce skew among signals being received by a data interface. Signal path delays are varied such that data and strobe signals received at a memory interface are calibrated or aligned with each other along a rising and/or falling edge. For example, self-calibration circuitry provides skew adjustment of each data signal path by determining one or more delays in each data signal path and strobe signal path based on relative timings of test signals. The rising or falling edges may be used for this alignment.

Abstract: A system for phase tracking and equalization across a byte group for asymmetric control of high-speed bidirectional signaling includes a slave device and a master device that is coupled to the slave device via a plurality of bidirectional data paths. The master device may adaptively modify transmit characteristics based upon data eye information sent via one or more unidirectional data paths by the slave device. The data eye information may correspond to an edge position of data signal transitions received by the slave device on each data path of the plurality of bidirectional data paths. In addition, the master device may modify data path equalization coefficients within the master device for a grouping of the bidirectional data paths such as a byte group, for example, dependent upon the data eye information.

Abstract: In a position-measuring device and a method for transmitting movement information from a position-measuring device to sequential electronics, the position-measuring device includes a position-measuring unit, a movement-measuring unit, an arithmetic logic unit and an interface unit. Position values of two objects in a measuring direction are measurable by the position-measuring unit. The movement-measuring unit is used to ascertain a movement value of the two objects. The position values and the movement value are supplied to the arithmetic logic unit which ascertains movement information in the form of a correction value that is suitable for calculating the movement value in sequential electronics from an instantaneous position value, at least one previous position value, a controller cycle time that indicates the time interval between the measurements of position values, and the correction value.

Abstract: A method and a device for estimating the jitter of a first periodic signal with respect to a second periodic signal, comprising steps of: sampling the first signal by means of the second one; providing the result of the sampling to the input of a shift register triggered by the second signal; comparing at least the first two states and the last state of a current word formed from parallel outputs of the shift register with respect to a reference word; and counting the number of occurrences of the reference word within a given measurement period.

Abstract: The present invention provides a novel symbol timing recovery method for VSB receivers. Systems are described that comprise a timing error detector (TED) that produces an exact symbol timing error even in the presence residual carrier phase offset, loop filter that controls the characteristics of acquisition and tracking of digital PLL loop, Voltage/Numerically Controlled Oscillator (VCO/NCO) that adjusts the sampling instant and phase, A/D converter that samples a continuous VSB input signal, and a interpolating squared root raised cosine filter that performs both matched filtering and a compensation of constant timing offset of quarter symbol caused by the invented TED. The timing error detector in this invention comprises an envelope detector, band pass filter, squaring block, high pass filter, and decimator.

Abstract: A system and method are disclosed for determining the minimum required processing speed for a quadrature decoder using measurements of encoder performance, and to assess the safety factor of a particular decoder processing speed. The system and method may also be used to indicate proper adjustment direction by displaying real-time error measurements during encoder alignment. The system measures a logic state width error and calculates alignment parameters, processing speed and a safety factor. The method allows a measured logic state width error to be used to calculate a minimum required processing speed and safety factor.

Abstract: There is provided a pulse width adjusting circuit for generating an output signal by adjusting a pulse width of an input pulse signal and outputting the output signal. The pulse width adjusting circuit includes a first delay circuit to output a first delay signal generated by delaying the pulse signal by a certain delay time, a second delay circuit to output a second delay signal generated by delaying the pulse signal by a different delay time from the first delay circuit, and an output section to generate and output the output signal in accordance with the first and second delay signals. Here, the output signal has a pulse width corresponding to a difference between the delay times respectively achieved by the first and second delay circuits.

Abstract: Correction of delay-based metric measurements using delay circuits having differing metric sensitivities provides improved accuracy for environmental and other circuit metric measurements that used delay lines. A delay line measurement, which may be a one-shot measurement or a ring oscillator frequency measurement is performed either simultaneously or sequentially using at least two delay lines that have differing sensitivities to a particular metric under measurement. A correction circuit or algorithm uses the measured delays or ring oscillator frequencies and corrects at least one of the metric measurements determined from one of the delays or ring oscillator frequencies in conformity with the other delay or ring oscillator frequency. The delays may be inverter chains, with one chain having a higher sensitivity to supply voltage than the other delay chain, with the other delay chain having a higher sensitivity to temperature.

Abstract: The present invention is directed to a method for compensating for process, voltage, and temperature variation without complex online/offline swapping of data paths requiring a dedicated FIFO(First-in First-out) buffer design. Delay cells are trained for each clock path (namely a Functional delay) and a spare delay cell is trained. A ratio is calculated for each Functional delay cell by dividing the Functional delay cells' setting into the spare delay cells' one-fourth cycle setting. These ratios reflect any process variation. Functional mode is then entered and a Master-Slave approach switched to, during which the spare delay cell repeats the training sequence continuously while the Functional delay cells delay the clocks from the RAM(Random Access Memory). Each Functional delay cell is updated at the end of each training sequence of the spare delay cell, compensating for voltage and temperature change, by dividing the ratio into the new spare delay cell one-fourth cycle setting.

Abstract: In one embodiment, a system comprises a delay determining unit that may be operable to determine a relative delay between the first signal provided by the first source and the second signal provided by the second source, based upon a travel path of the first signal and a travel path of the second signal. In addition, a delay circuit, comprised within the waveform generator, may be configured to be programmed to delay output of the first signal to output the first signal at a predetermined position with respect to output of the second signal, based on the determined relative delay. More specifically, in one embodiment, the delay circuit may be configured to be automatically programmed to add the relative delay to the output of the first signal to automatically align the output of the first signal with respect to the output of the second signal.

Abstract: A test system including a device under test (DUT) and a tester, where the DUT includes I/O interface logic and a clock circuit. The clock circuit includes a core clock circuit, a pad clock circuit, a test clock circuit, and a select circuit. The core clock circuit generates a core clock signal enabling full speed operation of core circuitry of the IC during test mode. The pad clock circuit generates a preliminary clock signal suitable for normal operation, and the test clock circuit generates a test clock signal suitable for operating the I/O interface logic during the test mode. The select circuit selects, based on the test signal, between the test clock signal and the preliminary clock signal as the pad clock signal. The tester provides the bus clock signal and indicates the test mode to the DUT via the I/O interface logic.

Abstract: Correction of scintillation event data from a nuclear medicine imaging system for effects of pulse pile-up is carried out by separating event data packets into total energy and individual detector energy data packets, executing pile-up correction algorithms on each of the separated packets simultaneously using a pipeline processing architecture, and reassembling the corrected data packets into corrected scintillation event data packets. Pulse tail correction information for each individual detector is stored in a storage medium for a present event and immediately preceding event for which correction information exists, which allows individual detector correction information to be retrieved by using a look-up procedure, thereby enabling correction to be performed within a single processor cycle.

Abstract: To provide a method of correcting time of event trace data which is capable of correcting a deviation in starting time for collection of trace data. A difference in clock running rate between machines is obtained as a clock skew value by carrying out communications among a plurality of machines to be corrected a plurality of times and by storing operations of each operation as trace data and a required period of time for communications using trace data of a plurality of machines based on data on time when communications are performed and on a required period of time for communications. A time stamp value is corrected by using the obtained clock skew value so that operations of the time stamp coincide with each other.

Abstract: The invention relates to a method of correcting the effects of aging of a measurement sensor upon turning on the sensor. It also relates to a device delivering measurements corrected for the effects of aging of the device. According to the invention, the method of correcting the effects of aging of a sensor starts by on turning on the processing unit. The absolute time information is transmitted from a satellite positioning receiver to a processing unit. The age of the sensor is determined by comparison of the date of manufacture of the sensor and the absolute time information. Corrections to be made to a sensor measurement, based on the age of the sensor and on the degradation law, are determined. The corrections are applied to the sensor measurement.

Abstract: Pressure-based combustion parameters of an IC engine are determined based on engine cylinder pressure measurements and crank angle dependent cylinder volume data, where the pressure in a given engine cylinder is periodically sampled at scheduled crank angles to provide a measurement resolution that varies over the combustion cycle for that cylinder, and the cylinder volume data is retrieved from a table of pre-calculated data. The combustion parameter calculations are customized to suit the variable resolution pressure data, and the crank angles used to retrieve the pre-calculated cylinder volume data are offset from the scheduled crank angles to compensate for misalignment of the pressure measurements relative to the scheduled engine crank angles.

Abstract: An object of the present invention is to provide a sensing instrument capable to detect a substance existing in a very small quantity, such as environmental pollutants, instantly with a high degree of precision. As a specific means for solving the problem, a frequency signal from a crystal oscillator is sampled using a frequency signal from a reference clock generating part, the sampling value is outputted in a digital signal, quadrature detection is conducted with the digital signal for a frequency signal corresponding to the output signal, the rotational vector rotating at a frequency corresponding to the difference between the frequency of the frequency signal and the frequency of a sinusoidal wave used for the quadrature detection is taken out, and the variation of the frequency is detected by detecting the velocity of the rotational vector based on the respective sampling values.

Abstract: A process for correcting the time stamp of recordings such as photographs, obtained in many locations. An onboard clock records a time stamp for each photograph. GPS tracking data is obtained during movement of the camera. A time correction is sought, to account for an unknown error in the onboard clock, relative to the trusted GPS time data. To this end, an assigned location of each photograph is generated from the location tracking data and from an estimated time correction. Indicators of an appropriate time correction include clustering of the assigned locations, and correlation of the assigned locations to locations of reduced velocity. A GUI can be used to enable user assessment of clustering and/or correlation, and indication of a suitable time correction. Or, algorithmic assessment can be used. The determined time correction can be used to correct each photograph's time stamp.

Abstract: An HDMI cable carries high speed encoded data which are transmitted differentially over data channels, along with a clock. High-frequency loss and differential skew within a differential signal may be compensated by analog circuits embedded in the cable. These embedded circuits are tuned at production for best performance by observing the quality of the recovered analog signal. The embedded circuits are powered by a combination of power sources, both carried within the cable, and harvested from the high-speed signals themselves. Corresponding method and system for calibrating the cable are also provided.

Abstract: Labeling asymmetric network cables for improved network clock synchronization. Time asymmetries between pairs in a network cable are identified and associated with individual cables. This time asymmetry information is used to improve clock synchronization according to the IEEE-1588 standard. The time asymmetry information may be stored in a database and associated with a serial number on the cable, or may be associated with the cable in human and/or machine readable form.

Abstract: There is provided a calibration apparatus that calibrates a jitter measuring circuit for outputting a jitter measuring signal with a level according to an amount of jitter in an input signal based on the input signal and a delay signal obtained by delaying the input signal by means of a variable delay circuit. The calibration apparatus includes a delay control section that sequentially sets a first delay amount and a second delay amount in the variable delay circuit and a gain computing section that computes gain in the jitter measuring circuit based on the jitter measuring signal respectively output from the jitter measuring circuit for the first delay amount and the second delay amount.

Abstract: Real-time clock calibration is accomplished by generating a fast clock signal and a slow clock signal from an uncompensated clock signal; selectively, momentarily, replacing the uncompensated clock signal with the fast and slow clock signal to generate a compensated clock signal; generating from the compensated clock signal a calibration strobe and window trigger; responding to the window trigger to detect any uncompensated clock signal frequency error and responding to the calibration strobe to selectively, momentarily, replace the uncompensated clock signal with the fast or slow clock signal to reduce the clock signal frequency error.

Abstract: Disclosed is a circuit for testing a delay module. An output of a ring oscillator formed with the delay module is transmitted to a counter. The counter generates a plurality of counts, each count associated with a setting of control lines of the delay module. One of the plurality of counts is then compared with a previous one of the plurality of counts.

Abstract: Apparatus and method support the synchronization and calibration of a plurality of clocks in a medical device system that may provide treatment to a patient with a nervous system disorder. The plurality of clocks, which may be located at different components of the medical device system, comprises a first clock and a second clock. The second clock may be synchronized to a first clock by disabling a run mode operation and setting the second clock to a selected time. When a reference time of the first clock approximately equals the selected time, the second clock enables the run mode operation. Additionally, a drift time that is indicative of a time difference between the first clock and the second clock is determined. If the drift time is greater than a predetermined amount, an indication to resynchronize the first and second clocks is provided.

Abstract: A sensor is provided in one illustrative embodiment that includes a microcontroller that executes a program that generates quadrature output signals that indicate the change in a parameter being measured. As an example, the sensor could comprise a linear position transducer. The quadrature output signals can comprise square wave signals that are ninety degrees out of phase, each transition of the signals representing a unit of change in position of the measured mass. According to another aspect, the quadrature signals can be placed into phase with one another to indicate an error condition. In another aspect, user inputs can be provided to allow the user to select parameters such as frequency, update rate, and/or resolution. Moreover, at least one of the sensor inputs can be utilized to load calibration factor data for the sensor.

Abstract: A method, an apparatus, and a system for phase jitter measurement circuits are described herein.

Abstract: A timing calibration system for an adjustable delay time of a delay module for an electronic circuit is provided. The system includes a control delay module including at least one calibration delay module, the control delay module having a second delay time. The system also includes a timing module associated with the control delay module, a comparison module associated with the timing module and an adjustment module for the delay module. The timing module measures the second delay time, the comparison module compares the second delay time with a desired delay time and produces a comparison result and the adjustment module calibrates the adjustable delay time utilizing the comparison result.

Abstract: A method and apparatus for correcting for deterministic jitter in a sequential sampling timebase. The value of a fine analog delay is held at a substantially constant nominal rate during a duration of a counting of a digital clock. A time difference between a trigger at which a fine analog delay starts measuring time and the occurrence of a digital pulse of a stable clock used to count a coarse delay is measured. An input waveform is sampled at a sample time having a nominal delay time. After sampling, a desired compensation time is provided for the sample of the input waveform in accordance with combinations of three independent variables defining a calibration table. The waveform is reconstructed by shifting a delay time of a sampled value of the input waveform from its nominal delay time in accordance with a value defined by the calibration table.

Abstract: A method and apparatus for cycle-based simulation of a transparent latch includes classifying a phase of the transparent latch, classifying a phase of an input to the transparent latch, and classifying a phase of a simulation cycle. The transparent latch is simulated as a cycle-based simulation element based on the phase of the transparent latch, the phase of the input to the transparent latch, and the phase of the simulation cycle.

Abstract: In a method and device measuring a delay time of a section of a digital circuit, an output signal of the section is saved in different memory locations with a clock and earlier by a time interval with respect to the clock, different durations being assigned to the time interval. The delay time is determined as a function of the greatest of the different durations during which a test proceeds in a positive manner. The test proceeds in a positive manner if the value saved with the clock corresponds with the value saved so as to be earlier by the corresponding time interval.

Abstract: In a distributed control system, a first electronic control unit sends trigger information to a second electronic control unit. The trigger information includes a timing that triggers the second electronic unit to obtain second sensor information from a second sensor. The second electronic control unit is designed to receive the trigger information, and obtain, at the timing of the trigger information, the second sensor information from the second sensor. The second electronic unit is configured to send, to the first electronic control unit, the obtained second sensor information.

Abstract: The invention proposes a synchronization method and apparatus, wherein based on a measuring time (110, 210) and the value of at least one quantity of the at least one sensor object, the at least one sensor object is determined at at least one of the base times (tk?1, tk, tk+1).

Abstract: A method is directed to recovering a digital data content in a communication system, wherein the digital data content has been converted into an analog signal based on a primary clock, at a transmitter for transmitting to a receiver. The method comprises receiving the analog signal by the receiver. The analog signal is converted into a digital signal, based on a clock of the receiver. The digital signal is interpolated at the desired interpolation point, if digital signal in time has been shifted by an amount equal to or larger than a predetermined time length. The interpolated digital signal is recovered back to the digital data content, with the assist of an estimated channel impulse response. The channel impulse response is retrained every time when the interpolation point is significantly changed.

Abstract: A delay line (DL) circuit used to generate test pattern waveforms has a pulse generating circuit that is used during calibration to generate a pulse signal upon receiving a signal edge. A delay line of the DL circuit receives the pulse signal and delays the pulse signal by a selected time delay. A feedback loop of the DL circuit feeds the delayed pulse signal output from the delay line back to the input of the pulse generating circuit. Receipt of an edge of the fed back pulse signal at the input of the pulse generating circuit causes the pulse generating circuit to generate another pulse signal. The delayed pulse signal output from the delay line can be input to a counter that generates a counter value that is based on the period of oscillation of the delayed pulse signal.

Abstract: A method for controlling the power consumption in a tilt correcting coil is disclosed. The power consumption is corrected Controlling power consumption in the tilt correcting coil for correcting to correct the tilt of the images of on the cathode ray tube. If When a microcomputer judges that the mode is the on-state mode, then the microcomputer outputs a tilt correcting PWM signal in accordance with the user's inputting input. Then the The output tilt correcting PWM signal is converted into a dc voltage, and the level is adjusted. Then the signal is supplied to the tilt correcting coil, so that the tilt of the image on the screen would be is corrected. In the cases of the standby mode, the suspend mode and/or the or power-off mode, the microcomputer outputs a signal which has a function of minimizing the to minimize power consumption of by the tilt correcting coil. Therefore, the tilt Tilt of the image of the screen is corrected in the normal manner.