Abstract: Example embodiments provide a system and method for analyzing conversations and determining whether to participate with a response. A networked system receives, over a network, a communication that is a part of a conversation involving one or more users, whereby the networked system is a participant in the conversation. The networked system analyzes the communication including parsing key terms from the communication. The networked system then identifies a sentiment of a user among the one or more users based on the parsed key terms. Based on the identified sentiment, the networked system determines whether to respond to the communication. In response to a determination to respond, the networked system generates a customized response and transmits the customized response, over the network, to a device of the user. The customized response may comprise questions or a set of options related to the conversation.

Abstract: Exemplary methods, apparatuses, and systems include a first network edge device configuring a physical network interface to be included within a link aggregation group (LAG). The physical network interface of a second network edge device is also included within the LAG. The first network edge device receives, via the LAG, a first address resolution packet including a source and a destination. The first network edge device determines that the destination of the address resolution packet is a networking address assigned to a logical interface that is unique to the second network edge device. In response, first network edge device transmits the address resolution packet from a synchronization network interface to a synchronization network interface of the second network edge device. The synchronization network interface of each network edge device is excluded from sharing a LAG with network edge device ports of the other network edge device.

Abstract: Customizing publication via multiple outlets includes presenting a user interface for publishing a communication on a plurality of outlets; receiving an initial version of a communication; displaying the initial version of the communication in each of a plurality of editing windows simultaneously, wherein each of the plurality of editing windows corresponds to one of the plurality of outlets or a platform associated with one or more of the plurality outlets; receiving a customization to at least one of the displayed initial versions of the communication; and publishing the communication on each of the plurality of outlets, including the customization to at least one of the displayed initial versions of the communication.

Abstract: According to an embodiment of the present invention, a computer implemented method and system for automated test and retesting using an interactive interface provided by a computer processor comprising: an input configured to receive a set of rules for a virtual user, the set of rules comprising a plurality of conditional statements for the virtual user; a memory component configured to store the set of rules; and a rules engine, comprising at least one processor, configured to generate a plurality of test flows based on the set of rules wherein the test flow tool provides modeling capability through an interface comprising a canvas configured to manage one or more rules and a palette that contains a collection of modeling components; and further configured to automatically execute the plurality of test flows on a system under test.

Abstract: Embodiments of apparatuses and methods including virtual address memory range registers are disclosed. In one embodiment, a processor includes a memory interface, address translation hardware, and virtual memory address comparison hardware. The memory interface is to access a system memory using a physical memory address. The address translation hardware is to support translation of a virtual memory address to the physical memory address. The virtual memory address is used by software to access a virtual memory location in the virtual memory address space of the processor. The virtual memory address comparison hardware is to determine whether the virtual memory address is within a virtual memory address range.

Abstract: Embodiments of the present invention provide a data processing method, where, after being encapsulated according to an Ethernet protocol, a data processing command is sent to a cabinet by using an Ethernet switch, so that a storage controller in a storage engine can communicate with the cabinet by using the Ethernet switch, thereby effectively utilizing advantages such as ease of expansion and simple operation of the Ethernet switch.

Abstract: Television tuner emulation techniques are described. In an implementation, a television tuner is emulated through execution of software on a processing system by a computing device, the emulated television tuner includes functionality to obtain television content over an Internet Protocol (IP) based network. The functionality of the emulated television tuner is exposed to one or more applications that are executed by the computing device such that the application is not aware that the television tuner is emulated through execution of the software.

Abstract: Passing data over virtual links is disclosed, including: encapsulating a layer three data packet as an inner payload of a network data packet; and generating an outer header of the network data packet with a layer two header and a layer three header, wherein the network data packet is configured to communicate over a virtual link between a first interface of a first network appliance and a first interface of a second network appliance.

Abstract: Creating virtual links including: determining a first network appliance to configure to communicate with a second network appliance using a virtual link, wherein the virtual link comprises a layer three overlay point-to-point data link; and determining the second network appliance to configure to communicate with the first network appliance using the virtual link.

Abstract: For a design under test (DUT) that is to be emulated, a host system partitions the DUT into multiple partitions and maps each partition to an FPGA of an emulator which will emulate the partition. The host system stores information describing to which FPGAs each component of the DUT has been mapped. Additionally, mapped to each FPGA is trace and injection logic that traces signals exchanged by the FPGA with other FPGAs during emulation of the DUT. After the emulation of the DUT is complete, if a user wishes to debug a component of the DUT, the FPGAs that are configured to emulate the component are identified. For each identified FPGA, the trace and injection logic injects previously traced signals into the logic of the FPGA in order to reemulate the component. The host system generates waveforms for the user that include signals traced during the reemulation of the component.

Abstract: A method and apparatus for managing data is provided, including determining one or more network services associated with user-uploaded data stored in a database, and linking the user-uploaded data with the one or more network services to provide the user-uploaded data via the one or more network services.

Abstract: A network environment can include a proxy management server. The proxy management server can have access to multiple disparately located MDM servers. A mobile device receives configuration information including a network address of the proxy management server. The mobile device stores the network address of the proxy management server. In response to receiving a management notification such as notification that one or more of the multiple MDM servers has management information (e.g., commands, data, etc., to be executed by the mobile device) available for the mobile device, the mobile device utilizes the stored network address to communicate with the proxy management server. The proxy management server checks availability of the management information from multiple disparately located MDM management servers. The proxy management server retrieves the management information from the management servers and forwards it to the mobile device.

Abstract: Data files can be backed up by copying, in response to a backup request, files from a client device to a backup archive and recording the status of the files. Transformed copies of files in the backup archive can be created by automatically applying a transform to the files received from the client device. Upon receiving a subsequent backup request, differences can be identified between transformed files in the backup archive and files on the client device, and in response to identified differences in the files, the transformed files can be copied back to the client device.

Abstract: A method comprising receiving one or more data storage specifications from a tenant, determining that a plurality of physical storage units in a physical storage system comprises a sufficient system capacity to provision data storage for the tenant, sending a storage request message to request creation of a network storage entity for the tenant according to the data storage specifications, and receiving a storage response message indicating a first of a plurality of logical storage units allocated to the network storage entity according to the data storage specifications, wherein the plurality of logical storage units are distributed across the plurality of physical storage units, and wherein the plurality of logical storage units are arranged in a sequential order to form a logical circular buffer.

Abstract: In an example embodiment, a hypervisor exposes a first guest device to a first virtual machine. The hypervisor exposes a virtual host device and a pass-through device to a second virtual machine. The hypervisor maps a first memory and a second memory into the second virtual machine at a first base address register and a second base address register associated with the virtual host device and pass-through device. The hypervisor sends a mapping from the first virtual machine to the second virtual machine. The hypervisor sends a first address of a first ring of the first guest device and a second address of a second ring of an assigned device to the second virtual machine.

Abstract: The described embodiments include a system for executing a load using a first processor and a seond processor in a computer system. During operation, a load balancer executing on the first processor obtains one or more attributes of a load to be executed on the computer system. Next, the load balancer applies a set of configurable rules to the one or more attributes to select a processor from the first and second processors for executing the load. Finally, the system executes the load on the selected processor.

Abstract: This disclosure relates generally to data processing, and more particularly, to methods and systems for memory initialization of an integrated circuit. In one embodiment, a method for memory initialization at a circuitry is provided. The method comprises: identifying a portion of the circuitry configured as a memory device; detecting a start of a power-off state for a power domain within the circuitry including the memory device; performing a write operation to write data of a pre-determined pattern to the memory device upon detecting the start of the power-off state; and providing the data stored at the memory device for a reading operation after the power-off state ends.

Abstract: A partition mobility facility in which a partition that is executing one or more applications that have optimized code with one or more extended features is to be moved from a source system to a target system. If the target system does not support the extended mode features, then action is taken to remove the code having those features to facilitate migration.

Abstract: Techniques are disclosed for enabling seamless RESTful API generation and consumption through a single channel. Certain techniques are disclosed that allow for clients to both create an API and then immediately use or consume the API through a single channel of communication with a single component, such as a series of HTTP requests and/or responses sent between an application and an API Generation and Consumption (AGC) module.

Abstract: Configuration parameters are defined for indicating when and how a call handled by a call handler is to be streamed to a speech analytics system (“SAS”). The parameters may indicate when a call is to be streamed by identifying certain campaigns which calls associated therewith are to be streamed to the SAS. The parameters may also identify how the streaming is to occur, namely via a single audio stream, a mixed audio stream, or dual audio streams. When using dual audio streams, a stream for the agent audio is established separately from a stream for the remote party audio. In addition, procedures are indicated for determining whether sufficient number of licenses are available for interfacing with the SAS. The number of licenses used for a call depends on whether the configuration parameters indicate one or two streams are to be established.

Abstract: A testing device for real-time testing of at least a part of a virtual electronic control unit with an electronic control unit code is provided. The testing device has a computing unit of a first type, and a computing unit of a second type. The testing of a virtual electronic control unit with electronic control unit code, which is executable on the computing unit of the second type with a second instruction set, is made possible in that a computing unit of the first type executes an emulator for emulating the computing unit of the second type and the emulator executes the electronic control unit code. The emulator also has a simulation environment interface for exchanging data and/or events with the simulation environment.

Abstract: A method, system and computer readable media for deploying a virtual appliance are provided. The method includes receiving values of input parameters of a configuration file of a virtual appliance. The method includes for one of the values, determining, prior to activating the virtual appliance, whether the one of the values is in compliance with a configuration of one or more appliances. The method includes deploying the virtual appliance into the one or more appliances. In response to determining that the one of the values is in compliance, the method includes configuring the virtual appliance in accordance with the one of the values, wherein the determining is executed through a processor.

Abstract: Methods, systems, and media for binary compatible graphics support in mobile operating systems are provided. In some embodiments, binary compatible graphics support can be provided by extending diplomatic functions to perform library-wide prelude and postlude operations in the context of the foreign operating system before and after domestic library usage. In some embodiments, binary compatible graphics support can be provided by using thread impersonation approaches that allow one thread to temporarily take on the persona of another thread to perform some action that may be tread-dependent. In some embodiments, binary compatible graphics support can be provided by using dynamic library replication approaches that load multiple, independent instances of a single library within the same process.

Abstract: This application discloses a computing system to implement a design verification tool and simulate a circuit design with a regression. The computing system can capture events performed by a circuit design simulated with a regression and identify that one or more combinations of the captured events covers system level functionality of the circuit design. The computing system can determine whether the system level functionality covered by the combinations of the captured events was previously uncovered for the circuit design, and generate a regression efficiency metric configured to quantify newly covered system level functionality prompted by the regression.

Abstract: The invention concerns a method of designing a prototype comprising a plurality of programmable chips, such as FPGA chips, for modelling an ASIC circuit, said ASIC circuit being intended to implement a logic design comprising a hierarchy of logic modules communicating together. The method according to the invention comprises steps of: —partitioning the hierarchy of logic modules into regions each comprising one or a plurality of programmable chips, while minimising: —inter-region communications in a manner correlated to the physical connections available between each pair of programmable chips; —and the number of crossings of programmable chips of a critical combinatorial path; —establishing a routing of the signals between programmable chips using the physical resources available.

Abstract: Apparatuses, methods, and computer-readable media for buffer provision application (“BFA”) are described. The BPA may facilitate display of a guest application executing in a host operating system (“host OS”). The host OS may provide for execution of a guest application, such as through use of an emulator configured to emulate a guest OS environment. The BFA may provide a drawing buffer for use by the guest application. The drawing buffer may be caused to be allocated within the host OS by the BFA. The BFA may then cause the allocated buffer to be provided to the guest application so that the guest application may draw frame data directly to the drawing buffer. The BFA may then facilitate access to the drawing buffer by the host OS when compositing drawing buffer data with other drawing data of the host OS. Other embodiments may be described and claimed.

Abstract: Disclosed are techniques for implementing electronic design layouts with symbolic representations. These techniques determine an abstraction scope of a layout circuit component in a layout of an electronic design by referencing a user input or one or more default settings of the abstraction mechanism and identify first data that are included in or associated with a schematic symbol for the layout circuit component by traversing data from a symbolic representation data source with reference to the abstraction scope with the layout editing mechanism. In addition, these techniques further generate a symbolic representation for the layout circuit component by reproducing at least some of the first data in the layout and perform one or more layout operations on the symbolic representation to improve the layout and to generate a result set for the one or more layout operations.

Abstract: Disclosed are methods for allocating an address to an Electronic Control Unit (ECU) on an in-vehicle Ethernet network and devices therefor. A method may include allocating a first address value identifying the in-vehicle Ethernet network, allocating a second address value identifying a domain corresponding to the ECU, allocating a third address value identifying a group of ECUs in the allocated domain, allocating a fourth address value identifying the ECU in the group, and generating an IP address including the allocated first to fourth address values. The generated IP address is set as a fixed IP address of the ECU.

Abstract: A recycling tool includes a memory, a monitoring engine, a script execution engine, and a status check engine. The memory stores a stop script and a restart script. The monitoring engine receives a request to begin maintenance. The script execution engine executes the stop script to stop processes on middleware servers and databases. The status check engine determines that maintenance has completed. The script execution engine executes the restart script to restart processes on middleware servers and databases.

Abstract: Systems and methods for L2 Ethernet resilient hand-off include an access network configured between a first end point and a second end point, a first communication path and a second communication path for data flow between the first end point and the second end point, wherein the first communication path is active and the second communication path is inactive, and if a fault is detected in the first communication path, logic configured to activate the second communication path and perform a resilient hand-off of the data flow from the first communication path to the second communication path.

Abstract: This disclosure relates generally to systems integration testing (SIT), and more particularly to dynamic java message service emulator. In one embodiment, non-transitory computer-readable medium storing computer-executable trend analysis instructions is provided. The instructions may include instantiating, via one or more hardware processors, a dynamic enterprise java bean. The instructions may also include receiving, via the one or more hardware processors, a request at the dynamic enterprise java bean. The instruction may include generating, via the one or more hardware processors, a query for business rules based on the request. Additionally, the instructions may include configuring, via the one or more hardware processors, the dynamic enterprise java bean using the business rules. The instructions may further include processing, via the one or more hardware processors, the request using the configured dynamic enterprise java bean to generate a response.

Abstract: The present invention relates to an address assignment procedure where an address request containing a unique identification is sent to a predefined address of a network, and the role of an address assignment master is taken over in response to the receipt of a non-acknowledging response to the address request. Standard intelligent building blocks can thus be used to create a large product portfolio. The intelligent building blocks are connected to each other via a network and addresses can be assigned without needing additional process steps, human interaction or factory/field-service tooling.

Abstract: Disclosed are systems, methods, and computer program products for emulation of files using multiple images of the emulator state. In one example, the method includes loading the file into an emulator of the computer system; initiating emulation of the file by the emulator; storing an initial image of an initial state of the emulator; continuing the emulation of the file and detecting occurrence of a condition that results during the emulation of the file; creating and storing a new image of a next state of the emulator when an occurrence of the condition is detected; determining whether the emulation of the file has terminated correctly or incorrectly; and upon determining that the emulation of the file has terminated incorrectly, loading the new image of the next state into the emulator and resuming the emulation of the file from the next state of the emulator.

Abstract: Example embodiments relate to methods, systems, and a computer program product for detecting and responding to the presence of malware persistently executing in a monitored virtual machine of a virtual computing platform. The method includes logging I/O requests at a hypervisor kernel in a kernel log and at a virtual machine (VM) managed by the hypervisor in a VM log. The logged I/O requests then may be compared to detect evidence of malware according to differences between the I/O requests logged in the VM log and the kernel log.

Abstract: A system to manage a buffering of a data stream for a peer client in a peer-to-peer based streaming service includes a buffering control unit including a processor configured to control pieces of the data stream to be buffered in a first buffer of the peer client, and to control one or more outputted pieces to be buffered in a second buffer of the peer client, the outputted pieces being outputted from the first buffer for play back of the data stream. A method for managing a buffering includes storing pieces of the data stream in a first buffer; storing one or more outputted pieces of the data stream in a second buffer; and transmitting one or more pieces stored in the first buffer or the second buffer.

Abstract: Application validation is performed based on object level hierarchy data associated with the application. An application is executed on a physical or emulated host device, and assembly code is generated for the executing application. The assembly code is analyzed to identify objects associated with the application, and to identify relationships between the objects. Based on the object and relationship data, an object level hierarchy is generated for the application. Validation of the application may be performed by comparing an object level hierarchy for a current version of the application to a previously generated hierarchy for a previous version of the application to identify differences between the two hierarchies.

Abstract: A virtual architecture generating apparatus and method, a runtime system, a multi-core system, and methods of operating the runtime system and the multi-core system may include analyzing a requirement of an application, a feature of the application, and a requirement of a system enabling an execution of the application, and include generating a virtual architecture corresponding to the application, based on a physical architecture of a reconfigurable processor, the analyzed requirements and the analyzed feature.

Abstract: A judgment unit judges the pass/fail of DUTs. A power supply circuit has changeable characteristics, and supplies a power supply signal to the DUTs. A condition setting unit performs a pilot test before a main test for the DUTs, and acquires a test condition to be used in the main test. The condition setting unit executes: (a) measuring a first device characteristic value for each of multiple pilot samples sampled from among the DUTs while emulating a power supply characteristic close to what is used in a user environment in which the DUT is actually used; (b) measuring a predetermined second device characteristic value for each of the multiple pilot sample devices while emulating a power supply characteristic close to what is used in a tester environment in which the main test is performed; and (c) determining the test condition based on the first and second device characteristic values.

Abstract: A NOC comprises a die having a cache and a core area, a plurality of core tiles arranged in the core area in a plurality of subsets, at least one cache memory bank arranged in the cache area, whereby the at least one cache memory bank is distinct from each of the plurality of core files. The NOC further comprises an interconnect fabric comprising a request tree to connect to a first cache memory bank of the at least one cache memory bank, each core tile of a first one of the subsets, the first subset corresponding to the first cache memory bank, such that each core tile is connected to the first cache memory bank only, and a reply tree to connect the first cache memory bank to each core tile of the first subset.

Abstract: A processor of an aspect includes decode logic to receive a first instruction and to determine that the first instruction is to be emulated. The processor also includes emulation mode aware post-decode instruction processor logic coupled with the decode logic. The emulation mode aware post-decode instruction processor logic is to process one or more control signals decoded from an instruction. The instruction is one of a set of one or more instructions used to emulate the first instruction. The one or more control signals are to be processed differently by the emulation mode aware post-decode instruction processor logic when in an emulation mode than when not in the emulation mode. Other apparatus are also disclosed as well as methods and systems.

Abstract: An apparatus for system design verification has a test case module for compiling a test case in a scripting language (such as TCL) and a testbench including the design under test and operating with a Hardware Descriptor Language (such as SystemVerilog). A stimulus generated by the test case module is applied to the testbench through an interface gasket based on ‘C’.

Abstract: Embodiments of the present invention provide an approach for adapting an information extraction middleware for a clustered computing environment (e.g., a cloud environment) by creating and managing a set of statistical models generated from performance statistics of operating devices within the clustered computing environment. This approach takes into account the required accuracy in modeling, including computation cost of modeling, to pick the best modeling solution at a given point in time. When higher accuracy is desired (e.g., nearing workload saturation), the approach adapts to use an appropriate modeling algorithm. Adapting statistical models to the data characteristics ensures optimal accuracy with minimal computation time and resources for modeling. This approach provides intelligent selective refinement of models using accuracy-based and operating probability-based triggers to optimize the clustered computing environment, i.e., maximize accuracy and minimize computation time.

Abstract: A digital networking system includes a digital crosspoint switch, a host controller, and a data processing card that includes a programmable logic device such as a field-programmable gate array (FPGA). The host controller is operative to configure both the data processing card and the digital crosspoint switch in accordance with commands received over a user interface. The system is configurable to direct incoming data through the crosspoint switch to the data processing card for processing, and then back through the crosspoint switch for distribution to one or more network ports. The processing performed by the data processing card may include, among other options, feed filtering of a digital market data feed for use in high-frequency trading applications.

Abstract: Facilitating communications within a processing environment. Inbound traffic and outbound traffic on one or more virtual interfaces of the processing environment are monitored for a predefined amount of time. Based on the monitoring, a determination is made as to whether for a selected component of a virtual interface of the one or more virtual interfaces an inbound frame has been received but an outbound frame has not been transmitted for the predetermined amount of time. Based on determining that the inbound frame has been received but the outbound frame has not been transmitted, a generated outbound frame is forwarded to cause address registration information for the virtual interface to be refreshed.

Abstract: Methods and systems for a flexible, scalable hardware and software platform that allows a managed security service provider to easily provide security services to multiple customers are provided. According to one embodiment, a method is provided for delivering customized network services to subscribers of the service provider. A request is received, at a service management system (SMS) of the service provider, to establish an Internet Protocol (IP) connection between a first and second location of a first subscriber of the managed security service provider. Responsive to the request, the SMS causes a tunnel to be established between a first and second service processing switch of the service provider which are coupled in communication via a public network and associated with the first location and the second location, respectively.

Abstract: Methods, systems, and computer readable media for providing a unified framework to support diverse data generation engines are provided. One exemplary system includes a protocol emulator that transmits data to a device under test. The protocol emulator sends a request including a data profile identifier to a data generation adapter. The data generation adaptor identifies a data generation engine of a plurality of data generation engines to provide data corresponding to the data profile identifier and requests the data from the identified data generation engine. The data generation engine that receives the request provides the data to the emulator, and the emulator forwards the data to the device under test.

Abstract: In a data storage system, a hierarchical data structure, such as a file system or a database, is utilized to organize a hierarchical arrangement of device containers corresponding to various device identifiers of the plurality of hardware components in the target hardware system, scripts corresponding to various packet types of communication packets in the target hardware system, and responses corresponding to various packet data in the communication packets in the target hardware system. In response to receipt by a hierarchical emulation engine of a communication packet during emulation of the target hardware system, the communication packet including a device identifier, packet type and packet data, a response to the communication packet is determined by traversing the hierarchical arrangement based on the device identifier, packet type and packet data of the communication packet. The determined response is then provided.

Abstract: Systems and techniques are described for designing an integrated circuit (IC). Some embodiments explicitly represent wide-gates as distinct objects in an IC design data model. One or more IC design representations that are used in an IC design flow may natively support such wide-gate objects. These new objects can enable rapid access and preservation of wide-gates, thereby improving the runtime and/or quality of results (QoR) of an IC design system.

Abstract: The disclosure describes a process and apparatus for accessing devices on a substrate. The substrate may include only full pin JTAG devices (504), only reduced pin JTAG devices (506), or a mixture of both full pin and reduced pin JTAG devices. The access is accomplished using a single interface (502) between the substrate (408) and a JTAG controller (404). The access interface may be a wired interface or a wireless interface and may be used for JTAG based device testing, debugging, programming, or other type of JTAG based operation.

Abstract: A storage module and host device for storage module defragmentation are disclosed. In one embodiment, a host controller sends a storage module a first set of logical block addresses of a file stored in the storage module. The host controller receives a metric from the storage module indicative of a fragmentation level of the file in physical blocks of memory in the storage module. If the metric is greater than a threshold, the host controller reads the file and then writes it back to the storage module using a different set of logical block addresses. To avoid sending the file back and forth, in another embodiment, the host controller sends the fragmentation threshold and the different set of logical block addresses to the storage module. The storage module then moves the file itself if the metric indicative of the fragmentation level is greater than the threshold. Other embodiments are provided.