Of Peripheral Device Patents (Class 703/24)
  • Patent number: 8195436
    Abstract: A system for simulating interdependencies between multiple critical physical infrastructure models, including a first infrastructure data model that models a first critical physical infrastructure, a second infrastructure data model that models a second critical physical infrastructure, wherein the second critical physical infrastructure is a different critical physical infrastructure from the first critical physical infrastructure, a simulation engine including a visualization application and adapted to automatically produce a change in the second infrastructure data model in response to a change in the first infrastructure data model, and a user interface permitting a user to interact with the simulation engine.
    Type: Grant
    Filed: January 11, 2010
    Date of Patent: June 5, 2012
    Assignee: Intepoint, LLC
    Inventors: William J Tolone, Bei-tseng Chu
  • Patent number: 8195445
    Abstract: A data backup system is provided for backing up data files from a data source and for securing those data files against accidental modification or deletion. The system comprises storage and a data protection component that includes an application programming interface defining a command set. The system can also comprise a backup application that is configured to use the commands of the command set. The data protection component allows applications that use the commands of the command set, such as the backup application, to access the storage of the system. The data protection component prevents operating systems and applications that do not use the commands of the command set from accessing the storage. The data protection function of the data protection component can optionally be disabled to allow open access to the storage.
    Type: Grant
    Filed: January 29, 2011
    Date of Patent: June 5, 2012
    Assignee: Storage Appliance Corporation
    Inventors: Jeffrey Brunet, Ian Collins, Yousuf Chowdhary, Eric Li, Alex Lemelev
  • Patent number: 8195442
    Abstract: A system and method is described for connecting a logic circuit simulation to a hardware peripheral that includes a computer running software for communicating data to and from the hardware peripheral. The software transmits the data received from the hardware peripheral to the device being simulated by the logic circuit simulation. The computer also transmits the data received from the device being simulated by the electronic circuit simulation to the hardware peripheral. This allows the user to test the device being simulated using real hardware for input and output instead of simulated hardware.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: June 5, 2012
    Assignee: Ionipas Transfer Company, LLC
    Inventor: Robert Marc Zeidman
  • Patent number: 8195444
    Abstract: A peripheral electronic device includes a health check application configured to execute automatically upon connection of the peripheral device to a data source, such as a personal computer. The health check application can diagnose problems and if necessary, repair the problems with the peripheral device, the data source, or both. Examples of problems include corrupted data and indications of software, firmware, and hardware failures or impending failures. In some instances, the health check application can provide a warning of an impending failure. The health check application, after initially executing, can be triggered in various ways to scan again for problems. In addition to finding and repairing problems, the health check application can also attend to maintenance.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: June 5, 2012
    Assignee: Storage Appliance Corporation
    Inventors: Jeffrey Brunet, Ian Collins, Yousuf Chowdhary, Eric Li
  • Patent number: 8176253
    Abstract: Various technologies and techniques are disclosed for using transactional memory hardware to accelerate virtualization or emulation. A central processing unit is provided with the transactional memory hardware. Code backpatching can be facilitated by providing transactional memory hardware that supports a facility to maintain private memory state and an atomic commit feature. Changes made to certain code are stored in the private state facility. Backpatching changes are enacted by attempting to commit all the changes to memory at once using the atomic commit feature. An efficient call return stack can be provided by using transactional memory hardware. A call return cache stored in the private state facility captures a host address to return to after execution of a guest function completes. A direct-lookup hardware-based hash table is used for the call return cache.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: May 8, 2012
    Assignee: Microsoft Corporation
    Inventors: Martin Taillefer, Darek Mihocka, Bruno Silva
  • Publication number: 20120109621
    Abstract: A memory subsystem is provided including an interface circuit adapted for coupling with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for emulating at least one memory circuit with at least one aspect that is different from at least one aspect of at least one of the plurality of memory circuits. Such aspect includes a signal, a capacity, a timing, and/or a logical interface.
    Type: Application
    Filed: January 5, 2012
    Publication date: May 3, 2012
    Applicant: GOOGLE INC.
    Inventors: Suresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
  • Patent number: 8160844
    Abstract: In one embodiment, a processing block of a block diagram receives input data including a plurality of data elements organized as a matrix of a first size. At least a portion of the input data is partitioned into a plurality of data blocks in response to user-selected parameters. A data block includes selected ones of the plurality of data elements organized as a matrix of a second size. The data processing block performs a data processing function on the plurality of data blocks in a user-specified order to yield processed data corresponding to each data block. The processed data corresponding to each data block is then reassembled to form output data corresponding to the input data and the output data is output from the processing block to another block of the block diagram.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: April 17, 2012
    Assignee: The MathWorks, Inc.
    Inventors: Houman Zarrinkoub, Donald Paul Orofino, II, Navan Ruthramoorthy
  • Patent number: 8160863
    Abstract: A system and method for connecting a running logic circuit simulation to a network running at a higher speed that includes a computer for receiving data packets from the network and storing the received data packets in a first buffer. The computer next transmits the received data packets to an electronic circuit in the logic circuit simulation at a slower speed. The computer also receives data packets from the electronic device under simulation, and stores the data packets received from the electronic device under simulation in a second buffer. The computer then transmits the data packets received from the electronic device under simulation to the network at a higher speed.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: April 17, 2012
    Assignee: Ionipas Transfer Company, LLC
    Inventor: Robert M. Zeidman
  • Patent number: 8150670
    Abstract: An object of the present invention is to provide a simulator for verifying plural products with common hardware configuration, in which peripheral hardware that can be reused are constituted by hardware and other peripheral hardware is constituted by software simulator, and simulation method. A simulator comprises: a hardware section that includes a peripheral hardware configuration with a structure required for a CPU and OS to operate alone; a software section that simulates the operation of peripheral hardware other than hardware constituting the hardware section as a peripheral hardware model; and an interface board that connects the hardware section and software section.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: April 3, 2012
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Solutions Corporation
    Inventors: Shogo Ishii, Toshiyuki Ohno
  • Patent number: 8150675
    Abstract: A method, apparatus and computer program product for emulating a mobile network for an emulated mobile device is presented. A mobile device is emulated with a mobile device emulator. Network data requested by the mobile device emulator is acquired and stored in a mobile network data buffer. The data requested by the mobile device emulator is provided from the mobile network data buffer in accordance with predetermined network conditions, the predetermined network conditions selected to emulate a mobile network that would be utilized by a mobile device being emulated.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: April 3, 2012
    Assignee: Adobe Systems Incorporated
    Inventors: Kai Ortmanns, Soeren Ammedick
  • Patent number: 8145469
    Abstract: A memory mapping system for compactly mapping dissimilar memory systems and methods for manufacturing and using same. The mapping system maps a source memory system into a destination memory system by partitioning the source memory system and disposing memory contents within the partitioned source memory system into the destination memory system. In one embodiment, the mapping system factorizes a source data width of the source memory system in terms of a destination data width of the destination memory system to form at least one data sub-width. A source memory sub-region is defined for each data sub-width. The memory contents associated with each source memory sub-region are disposed within the destination memory system in a side-by-side manner across selected destination memory registers of the destination memory system. The mapping system thereby can compactly map the memory contents into the destination memory system without a loss of valuable memory space.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: March 27, 2012
    Assignee: Quickturn Design Systems, Inc.
    Inventor: Alexandre Birguer
  • Patent number: 8131535
    Abstract: In emulation of a target system on a host system one or more blocks of target system code may be translated with the host system to produce one or more corresponding blocks of translated code. Translating the target system code may include linking two or more blocks of translated code together to form a chain such that a look-up in a first translated block in the chain will directly branch to a second translated block. The target system code may be analyzed for the presence of one or more native target system instructions indicating modification of the target system code during execution. If such native target system instructions are present some or all of the blocks of translated code may be marked potentially invalid. The one or more blocks marked as potentially invalid may be re-translated and one or more instructions in the blocks of translated code may be overridden without undoing the chain.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: March 6, 2012
    Assignee: Sony Computer Entertainment Inc.
    Inventors: Stewart Sargaison, Victor Suba
  • Patent number: 8112266
    Abstract: A memory subsystem is provided including an interface circuit adapted for coupling with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for emulating at least one memory circuit with at least one aspect that is different from at least one aspect of at least one of the plurality of memory circuits. Such aspect includes a signal, a capacity, a timing, and/or a logical interface.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: February 7, 2012
    Assignee: Google Inc.
    Inventors: Suresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
  • Patent number: 8108201
    Abstract: A native device includes a memory storing a personal computing environment; an interface configured for coupling with a host information processing system; a native function system for performing a native function; and a native function emulator for emulating the native function in the host information processing system. According to another embodiment, a host information processing system includes: an interface for coupling with a native device comprising its user's personal computing environment; a processor configured for operating with the native device when the native device is coupled; and logic for emulating functions of the native device when the native device is coupled.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: January 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Mandayam Thondanur Ragnunath, Chandrasekhar Narayanaswami
  • Patent number: 8108198
    Abstract: A system and method are disclosed to trace memory in a hardware emulator. In one aspect, a first Random Access Memory is used to store data associated with a user design during emulation. At any desired point in time, the contents of the first Random Access Memory are captured in a second Random Access Memory. After the capturing, the contents of the second Random Access Memory are copied to a visibility system. During the copying, the user design may modify the data in the first Random Access Memory while the captured contents within the second Random Access Memory remain unmodifiable so that the captured contents are not compromised. In another aspect, different size memories are in the emulator to emulate the user model. Larger memories have their ports monitored to reconstruct the contents of the memories, while smaller memories are captured in a snapshot RAM. Together the two different modes of tracing memory are used to provide visibility to the user of the entire user memory.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: January 31, 2012
    Assignee: Mentor Graphics Corporation
    Inventors: Peer Schmitt, Philippe Diehl, Charles Selvidge, Cyril Quennesson
  • Patent number: 8099274
    Abstract: An article of manufacture, method and system are provided for facilitating input/output (I/O) processing of at least one guest processing system. The article of manufacture includes at least one computer-usable medium having computer-readable program code logic to facilitate the I/O processing of the at least one guest processing system. The computer-readable program code logic when executing performing the following: emulating on a native system an I/O architecture for the at least one guest processing system, the emulating including: providing multiple device managers for a plurality of I/O devices of the I/O architecture; providing at least one communications adapter process interfacing the multiple device managers to the at least one network driver process; and wherein the multiple device managers translate I/O messages in at least one guest processing system format to messages in native system format for processing by the at least one communications adapter process, thereby facilitating I/O processing.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 17, 2012
    Assignee: International Business Machines Corporation
    Inventors: Theodore J. Bohizic, Richard T. Brandle, Ping T. Chan, Michael S. Cirulli, Paul M. Gioquindo, Ying-Yeung Li, Stephen R. Valley
  • Patent number: 8086429
    Abstract: A system for performing verification includes a means for: importing a design netlist containing component(s), computing output function(s) for the component(s), generating output equivalent state set(s) from the output function(s), identifying next-state function(s) for the component(s), means for producing image equivalent state set(s) for the next-state function(s), means for classifying output-and-image equivalent state set(s) for the image equivalent state set(s) and the output equivalent state set(s), getting a preimage from the next-state function(s) and the output-and-image equivalent state(s) to generate a preimage of the output-and-image equivalent state(s), partitioning over original state(s) of the component(s), and equivalent class input set(s) of the component(s).
    Type: Grant
    Filed: July 7, 2008
    Date of Patent: December 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jason R. Baumgartner, Hari Mony, Viresh Paruthi, Fadi A. Zaraket
  • Patent number: 8078448
    Abstract: Systems and methods for automated testing are disclosed. In one embodiment, the method includes receiving an input during testing of an application on a first emulated device. The method further includes automatically creating from the input a test module configured to be executed on a second emulated device for testing of the application, wherein the first emulated device is different from the second emulated device. In one embodiment, the system includes a receiver configured to receive an input during testing of an application on a first emulated device. The system further includes a creation module in communication with the receiver and configured to automatically create from the input a test module configured to be executed on a second emulated device for testing of the application, wherein the first emulated device is different from the second emulated device.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: December 13, 2011
    Assignee: Adobe Systems Incorporated
    Inventors: Tim Wohlberg, Klaas Stöeckmann, Soeren Ammedick, Kai Ortmanns
  • Patent number: 8073674
    Abstract: A method for storage virtualization in user space. The method includes providing a first emulation module running in the OS kernel and providing a second emulation module in the user space of the computer, which may emulate a media changer or other SCSI or other storage device. The method continues with a kernel-resident driver receiving a packet of data at a port of the computer that is linked to a data communications network (such as a SAN). The packet of data may include command data for a particular data storage device (e.g., a SCSI command for a SCSI device). The method includes operating the first emulation module to communicate with the driver and to then pass through the packet of data to the second emulation module, allowing the second emulation module to run in user space but efficiently receive data from the kernel-resident driver via the first emulation module.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: December 6, 2011
    Assignee: Oracle America, Inc.
    Inventors: Charles R. Gehr, Ceri I. Davies, Stacy Maydew
  • Patent number: 8073675
    Abstract: A RAID storage device controller provides a host interface for interfacing the controller to a host system bus. The host interface is isolated from the attached storage devices, for example IDE disk drives, so that the actual attached drives are not limited in number or interface protocol. Various device ports can be implemented, and various RAID strategies, e.g., level 3 and level 5, can be used. In all the cases, the host interface provides a standard, uniform interface to the host, namely an ATA interface, and preferably a dual channel ATA interface. The host interface emulates the ATA single or dual channel interface and emulates one or two attached IDE devices per channel, regardless of the actual number of devices physically connected to the controller. Thus, for example, five or seven IDE drives can be deployed in RAID level 5 protocol without changing the standard BIOS in a PCI host machine. Thus the RAID controller is transparent relative to a standard dual channel ATA controller board.
    Type: Grant
    Filed: July 6, 2004
    Date of Patent: December 6, 2011
    Assignee: NVIDIA Corporation
    Inventors: Michael C. Stolowitz, Norman L. Towson, David G. Dutra
  • Patent number: 8069271
    Abstract: A data backup system is provided that when coupled to a data source, such as a personal computer, and a media player, such an Apple Computer IPod media player, the data backup system blocks certain communications between the data source and the media player thus preventing the data source from recognizing the media player as such thereby avoiding the launching of synchronization software for the media player, the data backup system also causing the automatic launching of a backup application stored on the data backup system so that data files can be located on the data source and then backed up to the media player.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: November 29, 2011
    Assignee: Storage Appliance Corporation
    Inventors: Jeffrey Brunet, Yousuf Chowdhary, Ian Collins, Hai Sheng Pan, Valeriy Kusov
  • Patent number: 8051385
    Abstract: An electronic device includes a content display for presenting content. The electronic device also includes a control display for enabling selection of a portion of the content. The content includes a plurality of items. The control display also enables a plurality of respective batch operations to be performed on the items.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: November 1, 2011
    Assignee: Amazon Technologies, Inc.
    Inventors: Mitchell A. Yawitz, Gregg E. Zehr, Symon J. Whitehorn
  • Patent number: 8046201
    Abstract: A method of creating and using a hardware independent communication interface block for block diagram environments is disclosed. The communication interface block includes user-selectable parameters controlling how a system being modeled by a block diagram communicates with image and data acquisition devices and control instruments or other electronic device interfaced with an external system. Based on the user selected parameters, the communication interface block calls an appropriate constructor to create an instrument object or acquisition device object which is used to enable communication with the control instrument or acquisition device respectively. The instrument object/acquisition device object calls a software driver appropriate for the hardware interface of the control instrument/acquisition device. The use of a common interface block provides scalability and ease of use to the block diagram environment when interacting with control instruments and acquisition devices.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: October 25, 2011
    Inventors: Melissa J. Pike, Loren Dean, Christian Portal, Robert O. Aberg, Patrick L. Edson, Thomas Gaudette, Jennifer R. Lymneos
  • Patent number: 8036874
    Abstract: There is provided with a software executing device co-operating with a hardware circuit or a hardware simulator, including: a software executing unit configured to execute a software; an execution monitoring unit configured to monitor execution of the software by the software executing unit to sequentially obtain an execution state of the software; a determining unit configured to determine whether the software executing unit and the hardware circuit or the hardware simulator are to be synchronized based on an obtained execution state of the software; and a synchronization controlling unit configured to control synchronization between the software executing unit and the hardware circuit or the hardware simulator.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: October 11, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masato Igarashi
  • Patent number: 8032352
    Abstract: Device, system, and method of storage controller simulating data mirroring. For example, an apparatus for simulating data mirroring includes: a storage controller to control a primary storage unit that has data stored therein, wherein the storage controller is able to simulate a process of mirroring data stored in the primary storage unit in response to a mirroring simulation command.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: October 4, 2011
    Assignee: International Business Machines Corporation
    Inventors: Akram Bitar, Aviad Zlotnick
  • Patent number: 8032353
    Abstract: A method and apparatus for utilizing a bridged peripheral system within a bridged computer system having a host computer and a remote computer. The host computer executes peripheral driver software that initiates at least one communication. The host computer also executes a peripheral emulation that represents a peripheral of the remote client computer, where the at least one communication is processed by the peripheral emulation. In one embodiment, the peripheral is an audio codec.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: October 4, 2011
    Assignee: Teradici Corporation
    Inventors: Charles Peter Baron, Noha Kafafi, Kevin Mlazgar, Bradley Reginald Quinton
  • Patent number: 8027827
    Abstract: Device, system, and method of storage controller having simulated volumes. For example, an apparatus for data storage management includes: a storage controller to manage access to one or more physical volumes, the storage controller including a simulation module to simulate access to one or more simulated volumes.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: September 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Akram Bitar, Aviad Zlotnick
  • Patent number: 8024170
    Abstract: Configuring reconfigurable interconnect resources employing a switch matrix and configuration bit look-up table are disclosed. Reconfigurable interconnect resources include multiplexors to decrease the number of bits needed to load a configuration. Distributed processing resources configure a selected reconfigurable interconnect resource, interconnecting each input of the reconfigurable interconnect resource with a particular output of the reconfigurable interconnect resource using configuration bits scalably extracted from a row of configuration bits of a look-up table. Use of a configuration bit look-up table allows for compression of the bits needed to load the configuration for a reconfigurable interconnect resource.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: September 20, 2011
    Assignee: Mentor Graphics Corporation
    Inventors: Xavier Montagne, Florent Bedoiseau
  • Patent number: 8024171
    Abstract: Methods and systems for a managed resource simulator for storage area networks are disclosed. To simulate a managed resource, a first template of generic communication information is executed. The execution of the first template establishes communications between an agent and a server of a storage area network, wherein the agent is a type of agent that manages the managed resource to be simulated. A second template is then populated with data specific to the managed resource to be simulated. The second template further includes generic communication information used to establish communications between an agent and a store process. This generic communication information corresponds to the managed resource to be simulated. The managed resource is then simulated by executing the second template. This allows the simulated managed resource to be tested, and any causes of failed transactions may be corrected, without having access to the actual physical managed resource.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: September 20, 2011
    Assignee: EMC Corporation
    Inventor: Eugenio Korolev
  • Patent number: 8024172
    Abstract: A method and system for emulating tape library commands is disclosed. Tape library commands implemented in response to commands received from a data protection application are emulated in a disk based storage medium so that existing data protection applications may be used to copy data to and from the disk based storage medium.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: September 20, 2011
    Assignee: NetApp, Inc.
    Inventors: Don Alvin Trimmer, Roger Keith Stager, Craig Anthony Johnston, Yafen Peggy Chang, Gavin David Cohen, Rico Blaser
  • Patent number: 8019589
    Abstract: A memory subsystem is provided including an interface circuit adapted for communication with a system and a majority of address or control signals of a first number of memory circuits. The interface circuit includes emulation logic for emulating at least one memory circuit of a second number.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: September 13, 2011
    Assignee: Google Inc.
    Inventors: Suresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
  • Patent number: 8005997
    Abstract: A monitoring device according to the present invention is a monitoring device connectable between a target device including a first memory holding a first data sequentially renewed and a host device acquiring a second data coinciding with the first data held in the first memory, and includes a first bus, a second memory holding the second data, a first control portion allowing the second data to be sequentially inputted to the second memory through the first bus according to the renewal of the first data, an event detection portion outputting an event detection signal when the data flowing to the first bus satisfies an event detection condition set in advance, and a second control portion allowing the second data to be outputted from the second memory based on the event detection signal.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: August 23, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Susumu Hirai
  • Patent number: 7996635
    Abstract: A method for archiving data from a first disk-based storage device to a second disk-based storage device includes moving an emulated tape from a first element to a second element simulatively without actually moving data associated with the emulated tape. The data associated with the emulated tape is transmitted from the first disk-based storage device to the second disk-based storage device via a communication link. The data associated with the emulated tape is removed from the first disk-based storage device.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: August 9, 2011
    Assignee: Hitachi, Ltd.
    Inventor: Yoshiki Kano
  • Publication number: 20110191095
    Abstract: A method (and structure) of mapping a memory addressing of a multiprocessing system when it is emulated using a virtual memory addressing of another multiprocessing system includes accessing a local lookaside table (LLT) on a target processor with a target virtual memory address. Whether there is a “miss” in the LLT is determined and, with the miss determined in the LLT, a lock for a global page table is obtained.
    Type: Application
    Filed: April 13, 2011
    Publication date: August 4, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumeda Wasudeo Sathaye
  • Publication number: 20110185072
    Abstract: Emulating devices across selected communication pathways by way of a terminal session. At least some of the illustrative embodiments are methods including establishing a terminal session between a first computer system and a second computer system (the second computer system distinct from the first computer system, and the second computer system having a management processor with a plurality of communication pathways to a main processor of the second computer system), configuring the management processor to send data regarding emulation of a first mass storage device across a first selected pathway of the plurality of communication pathways to the main processor (the configuring by way of the terminal session), and emulating (by the management processor) the first mass storage device across the first selected pathway.
    Type: Application
    Filed: January 27, 2010
    Publication date: July 28, 2011
    Inventors: Srinivasan VARADARAJAN, Kevin E. Boyum, Ivan Farkas
  • Patent number: 7987075
    Abstract: A method and apparatus for developing multicore microcomputer-based systems. A dual core controller model having at least one parameter is simulated and, similarly, a plant model having at least one parameter and controlled by the controller model is also simulated. The user interface then has access to the parameters of the controller model and plant model and optionally suspends execution of the controller model and plant model in response to a trigger event. The user interface determines the status of the various controller model parameters for both cores and/or plant model parameters at the time of the trigger without altering the controller model parameters or the plant model parameters. The core parameters for both cores are displayed on a display device.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: July 26, 2011
    Assignee: Hitachi, Ltd
    Inventors: Yasuo Sugure, Donald J. McCune, Sujit Phatak, George Saikalis
  • Patent number: 7983890
    Abstract: A method, apparatus and computer program product for mapping and executing an application on a multi-processor system is presented. At least one array to be considered for distribution among processors of said multi-processor system is indicated. The application is mapped according to a performance model associated with benchmark performance data of a parallel library on a parallel computer architecture. Then either the application is executed on the multi-processor system, or the application is simulated using a specified machine model for a multiprocessor system. Feedback information is then provided to influence architecture parameters for a multiprocessor system.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: July 19, 2011
    Assignee: Massachusetts Institute of Technology
    Inventors: Nadya Travinin Bliss, Henry Hoffman
  • Patent number: 7983893
    Abstract: An emulator is disclosed that allows for diagnoses of failures or defects within the emulator. A map of faulty resources is generated to identify which resources should be avoided during compilation. Thus, in a transparent and automated manner, defects found during diagnostics are stored in a database of unusable emulator resources. A compiler has access to the database and compiles the design taking into account unusable resources. In another embodiment, the defects of an emulator board are stored on the emulator board itself. This allows each board to store its own maintenance information that can be used at the manufacturing site for changing defective chips. Defects stored on the board itself allow the defects to be obtained independent of a position of a board within the emulator to simplify identification of the faulty resource.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: July 19, 2011
    Assignee: Mentor Graphics Corporation
    Inventors: Eric Durand, Estelle Reymond, John Fadel
  • Patent number: 7979264
    Abstract: A system comprising a media processing apparatus and a computer where the media processing apparatus emulates a mass storage device and interfaces with the computer is disclosed. In one embodiment the media processing apparatus appears to the computer as a Universal serial bus (USB) mass storage device, and the operating system (OS) on the computer, using its pre-installed USB mass storage device driver, establishes bi-directional communication channel with the media processing apparatus. Thus, the need to develop an OS specific kernel-mode device driver for the media processing apparatus is eliminated. The system may employ a proprietary communication protocol on the USB bus to send and receive data between the computer and the media processing apparatus.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: July 12, 2011
    Assignee: Streaming Networks (Pvt) Ltd
    Inventors: Mohammad Ayub Khan, Muhammad Israr Khan, Sved Muhammad Ziauddin, Haroon-ur-Rashid
  • Patent number: 7974830
    Abstract: A tape management method capable of easily using a file on a virtual tape from a plurality of programs in a system virtually emulating a magnetic tape apparatus by a disk apparatus. When a use request is generated from other program to a volume of a virtual tape used by one program, a host computer generates and uses a volume of a temporal virtual tape and can thus permit the use of the temporal tape volume from a plurality of programs without drastically changing the specification of an existing tape interface. The volume of the virtual tape temporarily generated is generated in a virtual tape management table and a virtual tape file uses a file of the same type.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: July 5, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Michiaki Sekine, Takeaki Murakoso, Hiroyuki Takabayashi, Norichika Hatabe
  • Patent number: 7974829
    Abstract: A system for simulating mobile phone and method thereof is provided. The system has separately designed man-machine-interface (MMI) kernel module, simulator module and plug-in module. If a designer wants to replace the MMI kernel module in a developing project, the present invention allows not only the transplantation and extension of code but also the integration with the existing simulator module. Besides, the plug-in module uses the inter-process communication (IPC) mechanism and the dynamic linking library (DLL) mechanism of the operating system of a host to exchange data with the simulator module and display a mobile phone operation interface so that the simulator module is able to support future plug-in module.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: July 5, 2011
    Assignee: Sunplus Technology Co., Ltd.
    Inventor: Yung-Chin Ko
  • Patent number: 7966085
    Abstract: A system and method for providing an audio source to an audio hardware device is disclosed. The system includes a detection module to detect a first audio input and a selection module to selectively provide the first audio input at an audio output to an audio device after the first audio input has been detected. The system also includes an emulation module to provide hardware emulation information corresponding to feedback data of the audio device after the first audio input has been detected.
    Type: Grant
    Filed: January 19, 2006
    Date of Patent: June 21, 2011
    Assignee: Sigmatel, Inc.
    Inventors: Antonio Torrini, Konstantin Shkolnyy
  • Publication number: 20110144970
    Abstract: A method and apparatus that partitions a single display's viewable area into at least two virtual viewable areas, and emulates the at least two virtual viewable areas as at least two emulated physical displays with an operating system such that the operating system behaves as if interfacing with at least two actual independent physical displays. The method provides the operating system with generated display identification data (such as “EDID”) for each of the emulated physical displays in response to a query from the operating system. The method and apparatus also receive notification of an interrupt (where the interrupt corresponds to the single physical display), and reports to the operating system with at least two sets of interrupt reporting information, corresponding to the at least two emulated physical displays, as if two interrupts were received. The operating system is thereby “faked” into acting as if two physical displays are in operation.
    Type: Application
    Filed: December 15, 2009
    Publication date: June 16, 2011
    Applicant: ATI TECHNOLOGIES ULC
    Inventors: Yinan Jiang, Shahriar Pezeshgi, Ming-Wei Chien
  • Patent number: 7953580
    Abstract: The present invention relates to a method for network management comprising configuration of control protocols between network elements in a network represented through a current, static, network element object model comprising a number of managed objects with attributes and instances and representing resources.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: May 31, 2011
    Assignee: Ericsson AB
    Inventors: David Cleary, Boris Danev
  • Patent number: 7953588
    Abstract: A method (and system) for emulating a target system's memory addressing using a virtual-to-real memory mapping mechanism of a host multiprocessor system's operating system, includes inputting a target virtual memory address into a simulated page table to obtain a host virtual memory address. The target system is oblivious to the software it is running on.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: May 31, 2011
    Assignee: International Business Machines Corporation
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumedh Wasudeo Sathaye
  • Patent number: 7949512
    Abstract: The present invention includes a system for simulating the performing of data storage operations. The system may include a storage manager component, at least one media management component directed by the storage manager component to manage storage operations to at least one storage device, and a storage emulation module adapted to simulate the characteristics of the at least one storage device. Under the direction of the storage manager, the emulation module may be adapted to simulate storage operations to one or more storage devices performed by one or more of the media management components.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: May 24, 2011
    Assignee: CommVault Systems, Inc.
    Inventors: Manoj Kumar Vijayan Retnamma, Ho-Chi Chen, Zahid Iikal, Rajiv Kottomtharayil
  • Patent number: 7930165
    Abstract: A method and corresponding equipment for emulation of a target programmable unit, which has at least one CPU, by means of an external emulation device, which is coupled to the target programmable unit by means of a communication link, comprising: transferring predetermined initialization data through the communication link to the emulation device for initializing the emulation; transferring through the communication link to the emulation device a CPU clock signal and emulation data; emulating the target programmable unit in the external emulation device using the transferred emulation data; ascertaining respective trace data from the emulation in the external emulation device and storing and/or outputting the trace data; deriving respective target integrity-control data and emulation integrity-control data from respective target-internal data and emulation-internal data; and transferring the derived target integrity-control data from the target programmable unit to the external emulation device.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: April 19, 2011
    Assignee: Accemic GmbH & Co. KG
    Inventors: Alexander Weiss, Alexander Lange
  • Patent number: 7925250
    Abstract: A method, system, and program product for providing for reuse of a mobile device application in a desktop environment is disclosed. The method includes obtaining an application that is configured for running on a mobile device, and then running the mobile device application on a desktop. A method for deploying an application that includes providing a computer infrastructure that is operable to run the application on a desktop and provide user preferences for the application on the desktop is also disclosed.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: April 12, 2011
    Assignee: International Business Machines Corporation
    Inventor: Richard Redpath
  • Publication number: 20110077932
    Abstract: A self-configuring communication system includes a portable memory device that stores personalization data. The self-configuring communication system includes a local instrument. The local instrument includes an interface for the portable memory device. The local instrument includes a processor to establish a link through the interface to the portable memory device without intervention and, upon establishing the link, to execute a program to configure the local instrument to emulate a telephone described by the personalization data.
    Type: Application
    Filed: September 28, 2009
    Publication date: March 31, 2011
    Inventors: Christopher P. Ricci, Howard L. Speight
  • Patent number: 7912693
    Abstract: Systems and methods are provided for verifying respective configuration data values for programming configuration memory cells of an integrated circuit device such as a programmable logic device (PLD). Each configuration memory cell controls an input of a corresponding initialization value from a file in response to a selectable assertion of an initialization signal of a test bench during a logic simulation of the PLD. The file structurally associates the configuration memory cell with the corresponding initialization value. A current value of one or more of the configuration memory cells is written with the respective configuration data value via a configuration port of the PLD during the logic simulation. Each configuration memory cell compares its initialization and current values in response to a selectable assertion of a check signal of the test bench. A mismatch error is output in response to a difference between the initialization and current values of one or more of the configuration memory cells.
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: March 22, 2011
    Assignee: Xilinx, Inc.
    Inventors: Ui Sun Han, Walter N. Sze, Tsu-Chien Shen