System Configuring Patents (Class 710/104)
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Patent number: 9667699Abstract: The invention relates to a method for transmitting data between a first automation appliance, and at least one second automation appliance, via a CANopen bus using a service data object as an SDO service, wherein an SDO client implemented in the first automation appliance is used to send a download or upload request to an SDO server implemented in the at least one second automation appliance, wherein the data are encapsulated in a CANopen frame by an application implemented in the first automation appliance or the at least one second automation appliance wherein the CANopen frame with the encapsulated data is transmitted or sent by means of an SDO service into or out of a data tunnel object defined in an object dictionary of the SDO server, and wherein the encapsulated data are decapsulated by the application implemented in the first or the at least one second automation appliance.Type: GrantFiled: March 29, 2011Date of Patent: May 30, 2017Assignee: SCHNEIDER ELECTRIC AUTOMATION GMBHInventors: Heinz Schaffner, Pascal Hampikian
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Patent number: 9654557Abstract: Embodiments of the invention provide systems and methods for updating cache data on multiple servers without requiring a restart of those servers. More specifically, embodiments of the present invention provide an ability for an application to clear one or more cached tables when the table content has been modified. The cache can be refreshed across servers without impacting the active transactions of end users. So for example, during a business process such as the general ledger period close the system will no longer need a system restart to update cached period information.Type: GrantFiled: May 7, 2013Date of Patent: May 16, 2017Assignee: ORACLE INTERNATIONAL CORPORATIONInventor: Pradip K. Pandey
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Patent number: 9655272Abstract: A connecting circuit includes a motherboard, a first back panel, and a second back panel. The motherboard defines a first connector and a second connector. The first connector includes a first address distinguishing pin. The second connector includes a second address distinguishing pin. The first back panel is coupled with the first connector and transmits a first address signal to the first connector. The second back panel is coupled with the second connector and transmits a second address signal to the second connector. The first address distinguishing pin is connected to ground and the second address distinguishing pin is connected to a high level voltage to distinguish the first address signal from the second address signal.Type: GrantFiled: July 31, 2015Date of Patent: May 16, 2017Assignee: ScienBiziP Consulting (Shenzhen) Co., Ltd.Inventors: Kang Wu, Guo-Yi Chen
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Patent number: 9652428Abstract: The invention relates to a method and a coupling device (10) for dynamically allocating USB endpoints (31, 32, 33, 34) of a USB interface (30), which can be accessed using at least two applications, comprising: a USB interface (30) that has at least two ports (P0, P2, P4), each of which comprises at least one USB endpoint (31, 32, 33, 34); and a control device (20) for dynamically allocating the USB endpoints (31, 32, 33, 34). The control device is designed so as to preconfigure each USB endpoint (31, 32, 33, 34) which is required for the at least two applications by means of an initialization process, and thus the control device can switch the allocation of the endpoints according to the access using at least one of the applications without the USB endpoints (31, 32, 33, 34) affected by the switch having to be deactivated.Type: GrantFiled: April 2, 2012Date of Patent: May 16, 2017Assignee: Unify GmbH & Co. KGInventors: Elmar Albert, Andras Selmeczi
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Patent number: 9647852Abstract: Embodiments of systems and methods for selective single-ended transmission for high speed serial links. In an embodiment, a method includes training a data link in a differential mode. The method may also include training the data link in a single-ended mode. Additionally, the method may include dynamically operating the data link in the single-ended mode or the differential mode according to a monitored performance characteristic of the data link.Type: GrantFiled: July 17, 2014Date of Patent: May 9, 2017Assignee: DELL PRODUCTS, L.P.Inventors: Stuart A. Berke, Bhyrav M. Mutnury
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Patent number: 9633315Abstract: Method, system, and programs for distributed machine learning on a cluster including a plurality of nodes are disclosed. A machine learning process is performed in each of the plurality of nodes based on a respective subset of training data to calculate a local parameter. The training data is partitioned over the plurality of nodes. A plurality of operation nodes are determined from the plurality of nodes based on a status of the machine learning process performed in each of the plurality of nodes. The plurality of operation nodes are connected to form a network topology. An aggregated parameter is generated by merging local parameters calculated in each of the plurality of operation nodes in accordance with the network topology.Type: GrantFiled: April 27, 2012Date of Patent: April 25, 2017Assignee: EXCALIBUR IP, LLCInventors: Olivier Chapelle, John Langford, Miroslav Dudik, Alekh Agarwal
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Patent number: 9614508Abstract: A clock generator having deskewed outputs signals wherein a transit time of each of a plurality of traces coupled to the clock generator outputs are determined and the longest trace is identified as the trace having the longest transit time. A time delay is then added to an output clock signal at each of the clock generator outputs that are not coupled to the longest trace. The addition of the time delay for each of the clock generator outputs is effective in automatically deskewing the clock generator outputs.Type: GrantFiled: December 3, 2015Date of Patent: April 4, 2017Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.Inventors: Jagdeep Bal, Louis F. Poitras
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Patent number: 9609588Abstract: According to one embodiment, an information processing apparatus comprises a wireless communication device, a display, a logon process module, and a display control module. The logon process module is configured to cause the display to display a logon screen, in a logon process of identifying a user account which uses an operating system. The display control module is configured to cause the display to display, together with the logon screen, a state of an access point detected by the wireless communication device.Type: GrantFiled: April 17, 2013Date of Patent: March 28, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Kenichi Tonouchi, Yoshinori Honda, Takeshi Tajima, Susumu Kasuga
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Patent number: 9588930Abstract: A method includes exchanging data between a chip card and a terminal in a contact-based manner via a contact field. The method comprises the steps of: activating a first contact assignment in response to a first communication protocol present on the contact field and occupying a first part of contact surfaces of the contact field; recognizing a change of the communication protocol from a first communication protocol to a second communication protocol with a protocol recognition unit in the chip card; and activating a second contact assignment in response to the recognized second communication protocol occupying a second part of contact surfaces of the contact field. The first and the second part of contact surfaces of the contact field are selected from an ISO-7816-2 contact field having a maximum of six contact surfaces and the second communication protocol requires at least two data lines.Type: GrantFiled: May 8, 2012Date of Patent: March 7, 2017Assignee: GIESECKE & DEVRIENT GMBHInventors: Bernhard Büttner, Robert Griesmeier, Karl Eglof Hartel
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Patent number: 9582441Abstract: Various methods and devices involving a slave device are discussed. The slave device, which may be without a clock input, receives a clock message and generates a clock based on the received clock message. In some embodiments, the slave device receives a further clock message and transmits a confirmation message simultaneously with receiving the further clock message. In other embodiments, determining a clock may comprise sampling the clock message with an internal system clock and providing the clock based on located edges. Other techniques are also discussed.Type: GrantFiled: February 27, 2014Date of Patent: February 28, 2017Assignee: Infineon Technologies AGInventors: David Levy, Gerhard Pichler
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Patent number: 9575919Abstract: In a storage device applying PCIe to a back-end network connection, in order to be capable of allocating bus numbers and making a PCIe switch expanded afterwards usable, it is necessary to once reset all PCIe switches. To dissolve this necessity, PCIe switches of the back-end network of the storage device are connected in series, a range of continuous bus numbers that are managed and stored in bus number management table is allocated for the back-end network connection, and when expanding the PCIe switch, the bus numbers are allocated in ascending order from a minimum value of the allocatable bus numbers to each of a link between the PCIe switches and to a virtual PCI bus within the PCIe switch, and the bus numbers are allocated in descending order from a maximum value of the allocatable bus numbers to the link between the PCIe switch and a drive.Type: GrantFiled: September 25, 2013Date of Patent: February 21, 2017Assignee: Hitachi, Ltd.Inventors: Hirotoshi Akaike, Katsuya Tanaka, Makio Mizuno
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Patent number: 9575866Abstract: A Sub-Diagnostic Module incorporated into a System Module. The Sub-Diagnostic Module receives signals from the System Modules through the diagnostic signal interface. The diagnostic signal interface passes the signals through to the diagnostic signal evaluation logic where it determines if a signal or combination of signals is an event to be recorded in the sub-diagnostic registers and/or the sub-diagnostic log memory. The events recorded in the registers and log memory are accessed by the Portable Diagnostic Module through the Sub-Diagnostic Module's diagnostic protocol interface. Recorded events placed in log memory are synchronized by the sub-diagnostic time synchronizer. The time synchronizer receives high resolution time information from a local clock, such as a physical layer clock, and lower resolution network synchronized information from the diagnostic protocol interface.Type: GrantFiled: November 6, 2014Date of Patent: February 21, 2017Assignee: DAP Holding B.V.Inventor: Richard Mourn
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Patent number: 9569388Abstract: This document discusses, among other things, an identification (ID) detection module configured to identify a first ID code in a first detect period within a first attach period and to identify a second ID code in a second detect period within the first attach period.Type: GrantFiled: November 21, 2013Date of Patent: February 14, 2017Assignee: FAIRCHILD SEMICONDUCTOR CORPORATIONInventor: Bert Marston
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Patent number: 9558048Abstract: A middleware machine environment can manage message queues for multimode applications. The middleware machine environment includes a shared memory on a message receiver, wherein the shared memory maintains one or more message queues for the middleware machine environment. The middleware machine environment further includes a daemon process that is capable of creating at least one message queue in the shared memory, when a client requests that the at least one message queue be set up to support sending and receiving messages. Additionally, different processes on a client operate to use at least one proxy to communicate with the message server. Furthermore, the middleware machine environment can protect message queues for multimode applications using a security token created by the daemon process.Type: GrantFiled: August 10, 2012Date of Patent: January 31, 2017Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Richard Frank, Todd Little, Arun Kaimalettu, Leonard Tominna
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Patent number: 9558140Abstract: A robust method for addressing each of the participants of a bus system comprising a control unit, and a bus and a plurality of addressable participants connected to the bus, comprising the steps of a) pre-selecting a first number of participants, b) selecting from the pre-selected participants a second number of participants, and c) assigning one or more addresses to them, and repeating the steps a) to c). The selection and pre-selection is based on current sources, specific threshold values, and measurement error. The bus system and addressable device (are also claimed.Type: GrantFiled: October 1, 2013Date of Patent: January 31, 2017Assignee: MELEXIS TECHNOLOGIES N.V.Inventor: Marc Lambrechts
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System and method for accessing operating system and hypervisors via a service processor of a server
Patent number: 9553776Abstract: The present disclosure relates to a server that makes use of a host central processing unit (CPU) which accesses a production network to enable communications with a remotely located subsystem using the production network. A USB host system may be operably associated with the host CPU. A service processor may also be incorporated in the server, which is configured to communicate with an out of band network. A service processor USB system may be operably associated with the service processor and may communicate with the USB host system. This enables access to either an operating system or a hypervisor running on the host CPU via the out of band network, using an Ethernet-over-USB protocol.Type: GrantFiled: May 16, 2012Date of Patent: January 24, 2017Assignee: AVOCENT HUNTSVILLE, LLCInventor: Steven Geffin -
Patent number: 9547331Abstract: Disclosed is an apparatus and method to set the speed of a clock. A computing device may include a processor and a scheduler of the processor, the scheduler may be configured to: receive a plurality of votes for requested bandwidths from a plurality of different execution environments; sum the requested bandwidths; and set the clock speed based upon the sum of the requested bandwidths.Type: GrantFiled: April 3, 2014Date of Patent: January 17, 2017Assignee: QUALCOMM IncorporatedInventors: Ron Keidar, Michael K. Batenburg
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Patent number: 9529406Abstract: Interface management techniques provide reduced power consumption along with reducing heat and EMI generation in a computer system having multiple interconnected processing units. Physical link layers of external interfaces that interconnect the processing units have dynamically adjustable bandwidth provided by an adjustable width and adjustable operating frequency. The bandwidths may be dynamically adjusted by predicting interface bandwidth requirements. From a required bandwidth, an active width and an operating frequency for the physical link layers are determined and set. The interface is operated according to the determined width and operating frequency.Type: GrantFiled: June 12, 2014Date of Patent: December 27, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Daniel Mark Dreps, Frank D. Ferraiolo, Anand Haridass, Prasanna Jayaraman
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Patent number: 9526992Abstract: Technologies are generally described for server resource allocation for distributed games. In one example, a method includes allocating a first set of resources for a first player instance on a first server, a second set of resources for a second player instance on the first server, and a third set of resources for a third player instance on a second server. The method also includes comparing a first relationship strength defined between the first player instance and the second player instance with a second relationship strength defined between the first player instance and the third player instance. Further, the method includes distributing at least one of the first set of resources, the second set of resources, or the third set of resources between the first server and the second server based on a result of the comparing.Type: GrantFiled: April 2, 2013Date of Patent: December 27, 2016Assignee: EMPIRE TECHNOLOGY DEVELOPMENT LLCInventors: Ran Zhao, Qi Li, Xuefeng Song
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Patent number: 9524769Abstract: A dynamic Random Access Memory (DRAM) module (105) is disclosed. The DRAM module (105) can includes a plurality of banks (205-1, 205-2, 205-3, 205-4) to store data and a refresh engine (115) that can be used to refresh one of the plurality of banks (205-1, 205-2, 205-3, 205-4). The DRAM module (105) can also include a Smart Refresh Component (305) that can advise the refresh engine (115) which bank to refresh using an out-of-order per-bank refresh. The Smart Refresh Component (305) can use a logic (415) to identify a farthest bank in the pending transactions in the transaction queue (430) at the time of refresh.Type: GrantFiled: September 10, 2015Date of Patent: December 20, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Mu-Tien Chang, Krishna Malladi, Dimin Niu, Hongzhong Zheng
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Patent number: 9508319Abstract: A display and a method for displaying video frames thereof are provided. In the method, a connection state between a first port, a second port and a source device is detected. When only one port is connected to the source device, an original resolution data is provided to the source device through the port and a video streaming transmitted from the source device is received. The video streaming is divided and respectively outputted to the display by a first display controller and a second display controller. When the first port and the second port are both connected to the source device, two adjusted resolution data are provided to the source device through the first port and the second port respectively, and two video streamings transmitted from the source device are received and outputted to the display by the first display controller and the second display controller respectively.Type: GrantFiled: June 5, 2014Date of Patent: November 29, 2016Assignee: Wistron CorporationInventor: Feng-Yuan Chen
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Patent number: 9507941Abstract: Disclosed herein are techniques for verifying the integrity of an electronic device. A normal world virtual processor and a secure world virtual processor are instantiated. An integrity verification agent is executed by the secure world virtual processor. A kernel operation attempted by the normal world virtual processor is intercepted by the secure world virtual processor.Type: GrantFiled: November 10, 2014Date of Patent: November 29, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Peng Ning, Moo-Young Kim, Min-Jung Kim
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Patent number: 9503096Abstract: The disclosure relates to technology for configuring programmable logic devices having multiple programmable hardware units configurable in one or more functional modes. The programmable hardware units are coupled to independent switch devices (e.g., multiplexers) that select configuration patterns stored in a common and shared configuration memory. The configuration memory includes a set of configuration registers to store the configuration patterns, which configuration patterns correspond to the one or more functional modes. The configuration registers may be addressed using an index of addresses stored in memory that identify a select line in one of the switch devices for a particular programmable hardware unit. Each select line in a switch device corresponds to a particular one of the configuration registers storing the configuration pattern. The addressed configuration register is accessed to retrieve the configuration pattern and configure the programmable hardware unit.Type: GrantFiled: January 8, 2016Date of Patent: November 22, 2016Assignee: FUTUREWEI TECHNOLOGIES, INC.Inventors: Qiang Wang, Zhenguo Gu, Zhuolei Wang, Qiang Li
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Patent number: 9501439Abstract: Embodiments herein describe a switchboard coupled to a system bus in an integrated circuit for managing the flow of data between different entities coupled to the bus (e.g., processing cores, accelerators, memory controllers, input/output (I/O) interfaces, and the like). The switchboard is a hardware module that may be tasked with assigning different system bus addresses (or range of addresses) to each of the entities coupled to the bus. These addresses may be unique such that each entity can be uniquely identified by its assigned address. The address space of the system bus also includes managed address that are reserved—i.e., are not assigned to any particular entity. The switchboard is tasked with assigning the managed addresses (also referred to as virtual channels) to an entity which can be used to enable direct communication between hardware entities using the system bus.Type: GrantFiled: January 19, 2016Date of Patent: November 22, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mark S. Fredrickson, Scott M. Willenborg
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Patent number: 9495318Abstract: Embodiments of a bridge unit and system are disclosed that may allow for processing fence commands send to multiple bridge units. Each bridge unit may process a respective portion of a plurality of transactions generated by a master unit. The master unit may be configured to send a fence command to each bridge unit, which may stall the processing of the command. Each bridge unit may be configured to determine if all transactions included in its respective portion of the plurality of transactions has completed. Once each bridge unit has determined that all other bridge units have received the fence command and that all other bridge units have completed their respective portions of the plurality of transactions that were received prior to receiving the fence command, all bridge units may execute the fence command.Type: GrantFiled: November 25, 2013Date of Patent: November 15, 2016Assignee: Apple Inc.Inventors: Deniz Balkan, Gurjeet S. Saund, Jim J. Lin, Timothy R. Paaske, Ben D. Jarrett
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Patent number: 9489195Abstract: Techniques and systems are provided for generating radar control software for radar systems having a variety of different hardware architectures in an efficient manner. A base radar control program may be provided that is configurable using architecture-specific configuration data. A database may also be provided that includes configuration data associated with a plurality of different radar system architectures. Radar control software may be generated for a radar system of interest by retrieving configuration data associated with a corresponding hardware architecture from the database and using the data to configure the base radar control program.Type: GrantFiled: December 11, 2013Date of Patent: November 8, 2016Assignee: Raytheon CompanyInventors: Alan B. Moore, Erin L. Kashiwada
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Patent number: 9477288Abstract: A universal serial bus (USB) host includes a power unit and a USB interface unit. The power unit includes a battery and a charging module configured to control the battery. The USB interface unit is configured to interface with a first USB device, and is configured to be controlled based on a remaining amount of power of the battery. The USB interface unit is further configured to maintain a data connection between the USB interface unit and the first USB device when a power supply connection between the USB interface unit and the first USB device is disconnected.Type: GrantFiled: September 12, 2012Date of Patent: October 25, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Seung-Soo Yang
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Patent number: 9477615Abstract: A method for low latency data transfers between a wireless root device and a wireless endpoint device connected through a wireless peripheral-interconnect bus. The method comprises setting the wireless root device and the wireless endpoint device to operate in bi-directional low latency bus (BDLLB) mode; generating, by the wireless root device, a first data frame to be transmitted to the end-point device, wherein the first data frame includes at least a preamble, a block acknowledgment (ACK) frame and aggregation of a plurality of medium access control service data units (MSDUs) according to an order they received from a data link layer of the wireless peripheral-interconnect bus; and transmitting the first data frame to the wireless endpoint device over a wireless medium.Type: GrantFiled: August 11, 2009Date of Patent: October 25, 2016Assignee: Qualcomm IncorporatedInventors: Gal Basson, Tal Azogui
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Patent number: 9436485Abstract: Methods, apparatuses, and computer program products are provided for synchronization of data between an electronic mobile device and an electronic computing dockstation. Embodiments include detecting, by the dockstation, completion of a docking procedure connecting the mobile device to the dockstation; identifying, by the dockstation, applications that are open on the mobile device; opening, by the dockstation, the identified applications on the dockstation; identifying, by the dockstation, files that are open on the mobile device; syncing, by the dockstation, the identified files with corresponding files within the dockstation, including updating an existing file within the dockstation; and opening on the dockstation, by the dockstation, the synced files with the open applications on the dockstation.Type: GrantFiled: June 28, 2012Date of Patent: September 6, 2016Assignee: International Business Machines CorporationInventors: William T. Byrne, Robert J. Christopher, Paul D. Kangas, Daniel M. Ranck
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Patent number: 9436484Abstract: Methods, apparatuses, and computer program products are provided for synchronization of data between an electronic mobile device and an electronic computing dockstation. Embodiments include detecting, by the dockstation, completion of a docking procedure connecting the mobile device to the dockstation; identifying, by the dockstation, applications that are open on the mobile device; opening, by the dockstation, the identified applications on the dockstation; identifying, by the dockstation, files that are open on the mobile device; syncing, by the dockstation, the identified files with corresponding files within the dockstation, including updating an existing file within the dockstation; and opening on the dockstation, by the dockstation, the synced files with the open applications on the dockstation.Type: GrantFiled: August 9, 2011Date of Patent: September 6, 2016Assignee: International Business Machines CorporationInventors: William T. Byrne, Robert J. Christopher, Paul D. Kangas, Daniel M. Ranck
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Patent number: 9413565Abstract: An interface circuit may include a termination resistor and a termination voltage generation unit. The termination resistor may be coupled between a reception pad and a termination node. The termination voltage generation unit may detect a voltage level of the termination node, and may drive the termination node to a level of a termination voltage when the voltage level of the termination node deviates from a predetermined range.Type: GrantFiled: July 20, 2015Date of Patent: August 9, 2016Assignee: SK hynix Inc.Inventor: Hae Kang Jung
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Patent number: 9407786Abstract: A cooperative system comprises an image processing apparatus and a portable terminal; the image processing apparatus comprises: a display; an obtaining portion obtaining screen data from the portable terminal; a display controller displaying a first and second screen on the display; and a transmitter transmitting screen data and operation information to the portable terminal; the portable terminal comprises: a display; an obtaining portion obtaining screen data from the image processing apparatus; a display controller displaying the first and second screen on the display; a transmitter transmitting screen data and operation information to the image processing apparatus; a memory storing a cooperation table; an identification portion that, when user operates the first screen on the display of the portable terminal or image processor, identifies a potential next operation as corresponding to the user's operation; and a notification transmitter transmitting a notification of the potential next operation to the iType: GrantFiled: July 19, 2013Date of Patent: August 2, 2016Assignee: Konica Minolta, Inc.Inventors: Kazusei Takahashi, Katsuhiko Akita, Takeshi Morikawa, Daisuke Nakano
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Patent number: 9395940Abstract: Some of the embodiments of the present disclosure provide method comprising receiving a request at a device for a device driver associated with the device, the request for the device driver being received at the device through a network, the device having a network configuration in the network; and transmitting the device driver from the device in response to the request, including transmitting the network configuration of the device.Type: GrantFiled: May 5, 2009Date of Patent: July 19, 2016Assignee: Marvell International Ltd.Inventors: David Watkins, Lyman Leonard Hall, Scott Rowberry, Kevin Thompson, Mark Montierth
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Patent number: 9367419Abstract: Certain aspects of the present disclosure are directed to a baseboard management controller (BMC). The BMC includes: a processor; a network interface controller assigned with a network address; and a memory having firmware. The firmware is configured to be, when executed at the processor, in communication with a plurality of computer nodes, and to receive, through the same network interface controller, management requests each for performing a management operation at one of the plurality of computer nodes and addressed to the same network address, the management requests being directed to at least two of the plurality of computer nodes.Type: GrantFiled: January 8, 2013Date of Patent: June 14, 2016Assignee: AMERICAN MEGATRENDS, INC.Inventors: Anurag Bhatia, Winston Thangapandian
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Patent number: 9355215Abstract: A data acquisition system includes a receptacle and a data acquisition device. The receptacle has a housing, sensor inputs to receive data signals from sensors coupled to an object, and a rib to block insertion of a standard Universal Serial Bus (USB) plug and facilitate insertion of a modified USB plug having a slot that mates with the rib. The data acquisition device includes circuitry to receive, store and process data, a USB plug having pins operatively coupled to the circuitry, a first subset of pins configured to receive data signals from the receptacle and a second subset of pins configured to support standard USB communication with USB-compliant devices, and a slot formed in the USB plug such that the slot facilitates interconnection of the USB plug both with standard USB-compliant devices and with the receptacle, the slot mating with the rib to facilitate interconnection.Type: GrantFiled: April 24, 2015Date of Patent: May 31, 2016Assignee: BRAEMAR MANUFACTURING, LLCInventor: Erich Vlach
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Patent number: 9323610Abstract: Methods, systems, and devices are provided that processes storage commands. Data may be read from a storage memory at a storage device based on a read command received at the storage device from a host. An error may be detected in the data read from the storage memory at the storage device. In response to the error, placeholder data may be transmitted from the storage device to the host without transmitting an indication that the read command failed or succeeded. Corrected data may be transmitted from the storage device to the host, where the host replaces the placeholder data with the corrected data.Type: GrantFiled: January 30, 2014Date of Patent: April 26, 2016Assignee: SanDisk Technologies Inc.Inventors: Amir Segev, Tal Sharifie, Shay Benisty
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Patent number: 9323711Abstract: An integrated circuit device includes a transmitter circuit including an output driver. The integrated circuit device includes a first register to store a value representative of a drive strength setting associated with the transmitter circuit such that the output driver outputs data in accordance with the drive strength setting. The integrated circuit device also includes a second register to store a value representative of an equalization setting associated with the transmitter circuit such that the output driver outputs data in accordance with the equalization setting. The integrated circuit device further includes a third register to store a value representative of a slew rate setting associated with the transmitter circuit such that the output driver outputs data in accordance with the slew rate setting.Type: GrantFiled: April 9, 2015Date of Patent: April 26, 2016Assignee: Rambus Inc.Inventors: Mark A. Horowitz, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe
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Patent number: 9317275Abstract: Disclosed are a computer system storing with a restoration program and a method of updating the restoration program, the computer system including: a first storage unit in which a predetermined program is installed, a second storage unit in which a restoration program corresponding to the program is stored, a communication unit which communicates with an external server, a user input unit, and a controller which stores an update file corresponding to the program received from the external server in the first storage unit, and updates the program installed in the first storage with the update file, the controller updating the restoration program of the second storage unit with the update file of the first storage unit if receiving a certain key input through the user input unit, and restoring the program on the basis of the updated restoration program.Type: GrantFiled: October 31, 2011Date of Patent: April 19, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-hwa Lee, Jae-hwan Kim, Min-hyung Lee
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Patent number: 9301170Abstract: According to one aspect, the disclosed subject matter describes herein a system that includes a mobile robotic platform for navigating within a coverage area associated with an access point belonging to a communications network under test, wherein the mobile robotic platform includes a client device emulation module configured to emulate multiple client devices that are wirelessly connected to the access point and to send emulated test traffic data to the access point from each of the emulated client devices via a wireless connection. The mobile robotic platform also includes a real client device that includes a client application configured to communicate simulated test traffic data to the access point via an established wireless connection and a performance metrics module configured to determine wireless communication performance metrics associated with the wireless connection between the access point and at least one of the real client device or the emulated client devices.Type: GrantFiled: March 28, 2014Date of Patent: March 29, 2016Assignee: IxiaInventors: Madhu H. Rangappagowda, Jimmy Hardy, Qing Liu, Timothy Earl Bennington-Davis, Dane Bennington
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Patent number: 9292334Abstract: A system for controlling and operating applications in multiprocessor systems is described. Various multiprocessor systems comprising various processors coupled to various transceiver processors operate independently and automatically establish communications with each other. Data managers within the independent multiprocessor systems exchange messages indicating types of data processed by software applications in the independent multiprocessor systems. When a data manager determines that a software application in another independent multiprocessor system is configured to process the same data type, then data can be sent from one multiprocessor system to the other to allow a software application in the communicating multiprocessor system to control and operate a software application in the other multiprocessor system.Type: GrantFiled: April 17, 2014Date of Patent: March 22, 2016Assignee: EAGLE HARBOR HOLDINGS, LLCInventors: Dan Alan Preston, Robert Pierce Lutter
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Patent number: 9292462Abstract: Techniques for broadcasting a command in a distributed switch, at a first switch module within the distributed switch. Embodiments receive a request to reset a PCIe link for a first host device, the first host device connected to a plurality of downstream PCIe devices through the distributed switch. A routing table specifying a plurality of downstream switch modules, connected to the first switch modules by one or more ports of the first switch module, is identified. Embodiments suspend PCIe traffic for the first host device on the one or more ports of the first switch module. Broadcast messages are transmitted to the plurality of downstream switch modules, specifying a first reset operation. Upon receiving an acknowledgement message from each of the plurality of downstream switch modules specified in the routing table, embodiments resume PCIe traffic for the first host device on the one or more ports.Type: GrantFiled: May 22, 2013Date of Patent: March 22, 2016Assignee: International Business Machines CorporationInventors: Ronald E. Freking, Elizabeth A. McGlone, Daniel R. Spach, Curtis C. Wollbrink
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Patent number: 9281067Abstract: A semiconductor test system includes a nonvolatile memory and a test device. The nonvolatile memory is configured to include an information region. The test device is configured to include a pin memory and a pin memory controller. The pin memory controller is configured to separate information data into a plurality of information data groups, sequentially transmit the separated plurality of information data groups to the pin memory, sequentially transmit the transmitted plurality of information data group in the pin memory to the nonvolatile memory, and program the transmitted plurality of information data group in the nonvolatile memory into the information region.Type: GrantFiled: August 11, 2014Date of Patent: March 8, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Hong Gab Lee, Mansik Choi, Byoungwoo Ye
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Patent number: 9262295Abstract: Embodiments of the present invention provide a method, system and computer program product for configuration item (CI) status value analysis for multiple performance monitors. In one embodiment of the invention, a multi-CI analysis method can be provided. The method can include weighting different CI status values produced by different performance monitors for a single resource in a monitored computing system and displaying selected ones of the weighted different CI status values according to relevance determined by weight. In one aspect of the embodiment, weighting different CI status values produced by different performance monitors for a single resource in a monitored computing system can include locating the different CI status values for the single resource in a configuration management database (CMDB), identifying the different performance monitors producing the different CI status values in the CMDB and applying weights to the different CI status values according to CI status value characteristics.Type: GrantFiled: July 9, 2007Date of Patent: February 16, 2016Assignee: International Business Machines CorporationInventors: Brett A. Coley, Niraj Joshi, Wayne B. Riley
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Patent number: 9250649Abstract: In accordance with embodiments of the present disclosure, a system may comprise a plurality of slots each configured to receive a modular information handling system, a plurality of air movers each configured to cool at least one modular information handling system disposed in at least one of the plurality slots, and a chassis management controller communicatively coupled to the plurality of slots and the plurality of air movers and configured to display a recommended placement of modular information handling systems in the plurality of slots based on at least one of: identities of slots populated with modular information handling systems, an airflow ranking of the plurality of slots, an impedance ranking of information handling systems disposed in the slots, and a workload of each of the information handling systems disposed in the slots.Type: GrantFiled: September 30, 2013Date of Patent: February 2, 2016Assignee: Dell Products L.P.Inventors: Hasnain Shabbir, Ramsundar Govindarajan, Dinesh Kunnathur Ragupathi
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Patent number: 9244620Abstract: A storage device includes a semiconductor memory storing data. A controller instructs to write data to the semiconductor memory in accordance with a request the controller receives. A register holds performance class information showing one performance class required to allow the storage device to demonstrate best performance which the storage device supports, of performance classes specified in accordance with performance.Type: GrantFiled: April 13, 2015Date of Patent: January 26, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventor: Akihisa Fujimoto
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Patent number: 9239724Abstract: A computer device and a boot method thereof are provided. The method is applicable to a computer with a Basic Input Output System (BIOS) and an Operating System (OS). The computer includes a chassis and a memory. In the boot method, after the computer is started, it is judged whether the chassis is opened in an interval from the last boot time to the current boot time. If the chassis is not opened in the interval from the last boot time to the current boot time, the BIOS does not detect hardware elements connected to the computer to obtain setting and parameter values of each hardware element, but reads directly the setting and parameter values of each hardware element that are stored in the memory last time, initializes each hardware element, transmits the setting and parameter values to the OS, and executes the OS to complete the boot process.Type: GrantFiled: October 28, 2013Date of Patent: January 19, 2016Assignee: WISTRON CORPORATIONInventor: Shu-Lin Chao
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Patent number: 9235427Abstract: A method for booting is provided. A devices manager disables resources of one or more bootable devices of a list of bootable devices having resource conflicts with a selected one of the list of bootable devices. The devices manager attempts to boot the selected one of the list of bootable devices. If the selected one of the list of bootable devices fails to boot, then the devices manager selects a next bootable device of the list of bootable devices for booting and repeats disabling resources and attempting to boot the selected next bootable device until one of the list of bootable devices boots or all bootable devices of the list of bootable devices fail to boot.Type: GrantFiled: February 29, 2012Date of Patent: January 12, 2016Assignee: Red Hat Israel, Ltd.Inventor: Michael Tsirkin
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Patent number: 9213500Abstract: A data processing method, which includes: writing, by an application module, data to be written in a data buffer, and sending a write request command and an address of the data buffer to a Virtual Host Bus Adapter (VHBA); sending, by the VHBA, the write request command and the address of the data buffer to a storage array module; and acquiring, by the storage array module, the data to be written from the data buffer, and then writing, into the storage medium, the data to be written according to the address of the data to be written into the storage medium. In the embodiments, it is only required to transfer the address of the data buffer and the data to be written when writing the data, so memory copy is reduced and system performance is improved.Type: GrantFiled: June 4, 2013Date of Patent: December 15, 2015Assignee: Huawei Technologies Co., Ltd.Inventor: Qingchao Luo
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Patent number: 9202061Abstract: An SOC implements a security enclave processor (SEP). The SEP may include a processor and one or more security peripherals. The SEP may be isolated from the rest of the SOC (e.g. one or more central processing units (CPUs) in the SOC, or application processors (APs) in the SOC). Access to the SEP may be strictly controlled by hardware. For example, a mechanism in which the CPUs/APs can only access a mailbox location in the SEP is described. The CPU/AP may write a message to the mailbox, which the SEP may read and respond to. The SEP may include one or more of the following in some embodiments: secure key management using wrapping keys, SEP control of boot and/or power management, and separate trust zones in memory.Type: GrantFiled: April 27, 2015Date of Patent: December 1, 2015Assignee: Apple Inc.Inventors: R. Stephen Polzin, Fabrice L. Gautier, Mitchell D. Adler, Timothy R. Paaske, Michael J. Smith
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Patent number: 9201661Abstract: A booting method is provided. In the booting method, a basic input/output system (BIOS) is activated to check a first set value. When the first set value corresponds to a fast boot mode, the BIOS performs a fast boot process, in which the fast boot process is interrupted when the BIOS receives a system control interrupt. The BIOS changes a second set value and the first set value according to the system control interrupt, so that the first set value corresponds to a normal boot process. Next, the BIOS is reactivated. Further, the BIOS performs a normal boot process when the first set value corresponds to the normal boot mode, in which the BIOS checks the second set value, so as to execute an operating process corresponding to the second set value and recover the second set value and the first set value.Type: GrantFiled: September 18, 2013Date of Patent: December 1, 2015Assignee: Wistron CorporationInventors: Margaret Peyi Lin, Cho-Pin Su, Yu-Ping Chen, Ming-Hung Tsai