Abstract: Each of one or more storage device units has a switch device for relaying communication in accordance with a communication interface in which the number of master devices that can exist in the same domain is defined and having a plurality of switch ports. A controller unit has a storage controller having a plurality of initiator ports. A storage controller acquires, via each of the plurality of initiator ports, the ID of a storage device unit connected to the initiator port. The storage controller determines a system configuration on the basis of a port ID relationship between the plurality of initiator ports and the plurality of acquired IDs. The storage controller performs switch setting, for each of the one or more switch devices, that corresponds to the determined system configuration, via at least one initiator port connected to the switch device.

Abstract: Embodiments can provide additional computing resources at minimal and incremental cost by providing instances of one or more server compute subsystems on a system-on-chip. The system-on-chip can include multiple compute subsystems where each compute subsystem can include dedicated processing and memory resources. The system-on-chip can also include a management compute subsystem that can manage the processing and memory resources for each subsystem.

Abstract: Provided is an information processing apparatus including a processor and a PCI node connected to the processor via a first PCI bus, the processor obtaining a class code and a subclass code from the PCI node connected to the first PCI bus, determining whether or not the PCI node is a bridge based on the obtained class code and subclass code, searching for a PCI node connected to the PCI node via a second PCI bus based on having determined that the PCI node is a bridge, and searching for another PCI node connected to the first PCI bus based on having determined that the PCI node is not a bridge.

Abstract: A packet data network traffic management device comprises a plurality of ports comprising at least a first port, a second port, and a third port; and a plurality of deterministic multi-threaded deterministic micro-controllers, each of the micro-controllers associated with a corresponding one of the ports to control packet data through the corresponding port; and the plurality of multi-threaded deterministic micro-controllers cooperatively operate to selectively communicate data packets between the plurality of ports.

Abstract: A method of generating a boot image for fast booting an image forming apparatus. In the method, a boot image is generated to contain information regarding a system state after processes that are not used to execute an operating system and at least one application are terminated. Then, the image forming apparatus is fast booted using the boot image.

Abstract: Devices and methods for initializing one or more registers of a programmable integrated circuit (IC) to store an initial condition value are provided. A first bitstream that programs the region of the IC to supply the initial condition value to the one or more registers is first programmed on the IC. Then, once the registers are initialized with the initial condition value, a second bitstream is subsequently programmed to the region of the IC to supply values associated with a function of the design to the one or more registers.

Abstract: An electronic device includes a connector, a first communication circuit connected with the connector, a second communication circuit connected with the connector, and a processor. The processor is configured to verify identification information corresponding to an external electronic device connected with the electronic device through the connector, to receive or transmit, if the external electronic device is an electronic device of a first type, data from or to the external electronic device through the first communication circuit and the second communication circuit based on the identification information, and to receive or transmit, if the external electronic device is the electronic device of a second type, data from or to the external electronic device through the first communication circuit based on the identification information.

Abstract: A computing system comprises one or more cores. Each core comprises a processor. In some implementations, each processor is coupled to a communication network among the cores. In some implementations, a switch in each core includes switching circuitry to forward data received over data paths from other cores to the processor and to switches of other cores, and to forward data received from the processor to switches of other cores.

Abstract: An apparatus is provided comprising a memory and a processor configured to: execute a device driver for operating a device; detect a data throughput associated with the device driver; identify a configuration setting based on the data throughput; and re-configure the apparatus based on the configuration setting.

Abstract: The disclosed technology is generally directed to peripheral access. In one example of the technology, stored configuration information is read. The stored configuration information is associated with mapping a plurality of independent execution environments to a plurality of peripherals such that the peripherals of the plurality of peripherals have corresponding independent execution environments of the plurality of independent execution environments. A configurable interrupt routing table is programmed based on the configuration information. An interrupt is received from a peripheral. The interrupt is routed to the corresponding independent execution environment based on the configurable interrupt routing table.

Abstract: A firmware attempts to allocate memory address resources, such as memory addresses in a PCI I/O and a PCI memory address space, to bus devices in a multi-processor computing system. If an out-of-resource (OOR) condition occurs during allocation of the memory address resources, memory address resources can be re-allocated from stacks that were successfully allocated requested resources to stacks that were not successfully allocated requested resources. Memory address resources can also, or alternately, be re-allocated from sockets that were successfully allocated requested resources to sockets that were not successfully allocated requested resources. If stack-level or socket-level readjustment of the memory address resource allocation fails, a base memory address of a configuration memory address space can be lowered, and the allocation can be retried.

Abstract: A computer-implemented method determines that a link operation associated with a first link, among the set of interface links in a computing system, has resulted in a first set of signal lanes, included in the first link, becoming unused. The method further includes determining a link configuration and selecting, based on the link configuration, a second link from among the interface links, and determining a second set of signal lanes, from among the unused signal lanes included in the first link, to include in the second link. The signal lanes to include in the second link are based on an attribute associated with the second link. The method further includes dynamically reconfiguring the signal lanes included in the second to set to be included in the lanes in the second link. Some computing systems include a lane routing device connected to signal lanes of links among the interface links.

Abstract: A communication system comprising a central bus module for providing AC supply voltage, a bus line system connected thereto, and a number of subscriber devices connected to the bus line system, wherein power supply of the electronic part of the subscriber devices is achieved by means of an AC/DC rectifier circuit.

Abstract: In one embodiment, a master device has a first port and a second port and initially applies a DC voltage only to the first port. A plurality of slave devices, each have a third port and a fourth port, are serially connected to the master device in a ring, via conductors, starting at the first port and ending at the second port. The conductors simultaneously carry the DC voltage and differential data. Each slave device, after performing a detection routine, then sequentially applies the DC voltage to the adjacent downstream slave device in a first direction around the ring. If the master does not detect the presence of the DC voltage at its second port, the master device applies the DC voltage to both the first port and the second port to sequentially power up the slave devices in both directions around the ring of slave devices.

Abstract: Aligning memory access operations to a geometry of a storage device, including: receiving, by a storage array controller, information describing the layout of memory in the storage device; determining, by the storage array controller, a write size in dependence upon the layout of memory in the storage device; and sending, by the storage array controller, a write request addressed to a location within the memory unit in dependence upon the layout of memory in the storage device.

Abstract: Methods and systems are disclosed for booting an integrated circuit (IC). In an example implementation, boot read only memory (ROM) code is loaded for execution by a processor circuit of the IC. Via execution of the boot ROM code on the processor circuit, a first boot image is retrieved. A memory address is communicated from a host device to the processor circuit of the IC via an external data bus coupled to a bus interface circuit in the IC. The bus interface circuit is configured by execution of the first boot image to map a first block of addresses on the internal data bus to a second block of addresses on the host device starting at the memory address. When bus mastering is enabled, the processor retrieves a second boot image from the host device by issuing read requests to the first block of addresses.

Abstract: A secure programming system can receive a job control package having a security kernel and a target payload of content for programming into a pre-defined set of trusted devices. A device programmer can install a security kernel on the trusted devices and reboot the trusted devices using the security kernel to validate the proper operation of the security kernel. The target payload can then be securely installed on the trusted devices and validated.

Abstract: A memory control device includes a memory control part that controls memory through an interface part in accordance with a predetermined communication regulation, an illegal access detection part that detects an illegal access to the memory according to an access state from the memory control part to the memory and a signal state of the interface part, and a signal control part that switches the signal state of the interface part from a write-allowed state, in which the interface part is able to be written, to a write-inhibited state, in which the interface part is protected from being rewritten, when the illegal access is detected by the illegal access detection part.

Abstract: The present disclosure relates to a system and method for enabling implementation of a secondary function of a universal serial bus (USB) device on a computer that the USB device is communicating with, wherein an operating system of the computer does not have a required driver which needs to be mapped to the USB device to enable implementation of the secondary function. The system involves a USB device which has the required driver for implementing the secondary function stored therein. The required driver can be supplied to the computer from the USB device using a control which selects the secondary function of the USB device.

Abstract: In some examples, version data in an extension point of a graphical user interface of a version of a software application may be identified. In some examples, based on the identified version data, a version of a user interface module available to integrate with the user interface of the version of the software application may be determined.

Abstract: Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage system is provided that includes storage drives each comprising a PCIe interface, and configured to store data and retrieve the data stored on associated storage media responsive to data transactions received over a switched PCIe fabric. The data storage system includes processors configured to each manage only an associated subset of the storage drives over the switched PCIe fabric. A first processor is configured to identify first data packets received over a network interface associated with the first processor within a network buffer of the first processor as comprising a storage operation associated with at least one of the plurality of storage drives managed by a second processor, and responsively transfer the first data packets into a network buffer of the second processor.

Abstract: A device includes a first interface to receive a signal from a first communication link, wherein the receive signal includes out-of-band (OOB) information. A detector coupled to the first interface detects the OOB information. An encoder coupled to the detector encodes the OOB information into one or more symbols (e.g., control characters). A second interface is coupled to the encoder and a second communication link (e.g., a serial transport path). The second interface transmits the symbols on the second communication link. The device also includes mechanisms for preventing false presence detection of terminating devices.

Abstract: A hybrid storage system is described having a mixture of different types of storage devices comprising rotational drives, flash devices, SDRAM, and SRAM. The rotational drives are used as the main storage, providing lowest cost per unit of storage memory. Flash memory is used as a higher-level cache for rotational drives. Methods for managing multiple levels of cache for this storage system is provided having a very fast Level 1 cache which consists of volatile memory (SRAM or SDRAM), and a non-volatile Level 2 cache using an array of flash devices. It describes a method of distributing the data across the rotational drives to make caching more efficient. It also describes efficient techniques for flushing data from L1 cache and L2 cache to the rotational drives, taking advantage of concurrent flash devices operations, concurrent rotational drive operations, and maximizing sequential access types in the rotational drives rather than random accesses which are relatively slower.

Abstract: The present invention relates to an information processing apparatus having a plurality of storage units, capable of starting in any of a plurality of activation modes including a first activation mode and a second activation mode operable with a faster activation time than the first activation mode.

Abstract: A commissioning method, a master control board, and a service board are provided. The method comprises: a master control board switching a transmission channel to a commissioning serial port and transmitting a commissioning enabling signal to a selected service board; and after the service board receives the commissioning enabling signal, the service board switching the transmission channel to a local commissioning serial port and performing commissioning processing with the master control board. The embodiments of the invention preserve the commissioning serial ports inside single boards (i.e., service boards) for commissioning single boards respectively as well as enable the serial ports of the master control board of a core switch system to perform serial communication conveniently with CPU of any single board of the core switch system.

Abstract: A firmware-based technique for retrieving and displaying status information from a paired Bluetooth™ device during a boot sequence for a computing platform is discussed. The retrieved status information for the paired device may be displayed in a text or graphical format.

Abstract: A method and a device are provided. In an example, the method includes detecting a presence of a module in a socket. Based on detecting the presence of the module, a power configuration parameter stored in a memory of the module is read, and power is applied to an integrated circuit of the module according to the power configuration parameter.

Abstract: Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage system is provided that includes a first processor configured to establish a network connection with an external system, and receive first storage operations transferred by the external system over the network connection, the first storage operations related to storage and retrieval of data on at least one storage drive. The first processor is configured to transfer information describing the network connection for delivery to at least a second processor. The second processor is configured to identify when the first processor has failed, responsively establish the network connection with the external system based at least on the information describing the network connection, and receive second storage operations transferred by the external system over the network connection.

Abstract: When providing a user with native access to at least a portion of device hardware, the user can be prevented from modifying firmware and other configuration information by controlling the mechanisms used to update that information. In some embodiments, an asymmetric keying approach can be used to encrypt or sign the firmware. In other cases access can be controlled by enabling firmware updates only through a channel or port that is not exposed to the customer, or by mapping only those portions of the hardware that are to be accessible to the user. In other embodiments, the user can be prevented from modifying firmware by only provisioning the user on a machine after an initial mutability period wherein firmware can be modified, such that the user never has access to a device when firmware can be updated. Combinations and variations of the above also can be used.

Abstract: Methods, computing systems and computer program products implement embodiments of the present invention that include assigning, to multiple users, respective sets of original roles for accessing data stored on a computer system, and performing, in response to requests from the users, multiple operations on the data. While performing the multiple operations on the data, a transaction log is generated that includes a plurality of entries, each of the entries storing attributes of a given operation. Based on the entries in the log file, a respective set of learned roles for respective users is identified, and the respective sets of the learned roles are assigned to the respective users.

Abstract: In an apparatus including a plurality of integrated circuit chips, it makes it possible not to connect a ROM to all integrated circuit chips. Each chip incorporates a processor, and has terminal for connecting with a ROM and a RAM. The chip includes a communication unit communicating with another integrated circuit chip, and a reset controller which includes a register storing initial data setting for the processor in a reset state, and selects, based on a logical level of an external terminal, between whether to provide the data of the register to a reset terminal of the processor and whether to provide an external signal to the reset terminal of the processor.

Abstract: The invention introduces a method for dynamically selecting a booting OS (Operating System), executed by a micro-controller of an apparatus, which contains at least the following steps. The micro-controller detects a selection signal output from a selection unit, and determines which one of two ROMs (Read-Only Memories) is to be activated accordingly. After a CS (Chip Select) signal of the determined ROM is asserted, a firmware stored in the determined ROM is loaded and executed, and an OS corresponding to the firmware, which is stored in a storage device, is loaded and executed.

Abstract: A monitoring apparatus comprises: a processing unit that determines, if received type information of one or more other monitoring apparatuses does not match type information of the monitoring apparatus, one or more apparatuses that serve as monitoring targets of the monitoring apparatus from among a plurality of apparatuses that were being monitored by the one or more other monitoring apparatuses; a notification unit that notifies a management server of information on the one or more other monitoring apparatuses whose monitoring target was changed and of the type information of the monitoring apparatus; and a transmission unit that collects, after the notification unit made notification, operation information on the one or more apparatuses that were determined by the processing unit as monitoring targets of the monitoring apparatus, and transmits the collected operation information to the management server.

Abstract: A technique for maintaining RAID (redundant array of independent disks) configuration metadata across multiple SPs (storage processors) includes receiving a change request by a controller within a first SP, writing, by the first SP, a RAID configuration change described by the change request to a persistent intent log, and informing a second SP that the intent log has been written. The second SP, upon being informed of the write to the intent log, reads the RAID configuration change from the intent log and writes the RAID configuration change to a persistent configuration database. In this manner, the first SP and the second SP both receive the RAID configuration change and thus are both equipped to service reads and writes directed to a affected RAID storage.

Abstract: Embodiments of the inventive concept include solid state drive (SSD) multi-card adapters that can include multiple solid state drive cards, which can be incorporated into existing enterprise servers without major architectural changes, thereby enabling the server industry ecosystem to easily integrate evolving solid state drive technologies into servers. The SSD multi-card adapters can include an interface section between various solid state drive cards and drive connector types. The interface section can perform protocol translation, packet switching and routing, data encryption, data compression, management information aggregation, virtualization, and other functions.

Abstract: A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence.

Abstract: System and method can support data communication in a heterogeneous environment. The system can establish a connection between a first device and a second device, wherein the connection is based on a protocol, which associates a host mode or an accessory mode with one or more connected devices. Furthermore, a controller on the first device can determine a device type associated with the second device, and can configure the first device to be in either the host mode or the accessory mode, based on the determined device type associated with the second device, to handle data communication between the first device and the second device.

Abstract: In calibrating the phase skew between an SDRAM data strobe (“DQS”) signal and data (“DQ”) signal in a device, the data signal driver circuit impedance is adjusted to impair impedance matching on the DQ signal channel while system-level memory tests are performed. The phase skew is stepped through a range during the memory tests, and an error count is determined for each test. The memory tests may emulate mission-mode operation of the device. Following the memory tests, an optimal phase skew corresponding to a lowest error count is determined. The DQS signal may be delayed with respect to the DQ signals by a value corresponding to the optimal phase skew in subsequent mission-mode operation of the device.

Abstract: A charging method and a charging apparatus for an electronic device are provided. The method for charging a battery of a first electronic device, includes determining whether a current supply device is connected to a second electronic device connected to the first electronic device, recognizing at least one external device connected to the second electronic device when the current supply device is connected to the second electronic device, setting a charging current based on the recognized at least one external device, and receiving the set charging current from the current supply device connected to the second electronic device and charging the battery of the first electronic device.

Abstract: A peripheral component interconnect (PCI) device includes a first memory which includes a plurality of page buffers, a base address register which includes a plurality of base addresses, and a first address translation unit which translates each of the plurality of base addresses to a corresponding one of a plurality of virtual addresses. A map table includes a plurality of map table entries each accessed in correspondence to each of the plurality of virtual addresses, and maps each of the plurality of virtual addresses onto a physical address of physical addresses of the plurality of page buffers. The first address translation unit translates each of the plurality of virtual addresses to a corresponding one of the physical addresses using the map table.

Abstract: To provide a serial communication system that can flexibly or easily change a system configuration. For example, when coupled to first and second serial buses, a motor module transmits a first signal to the second serial bus. Subsequently, the motor module transmits a first command containing a candidate address to the first serial bus; meanwhile, the motor module searches for an address where an acknowledgement is not received in response to the first command. The motor module transmits the search result address to the second serial bus. A control unit at the reception of the first signal changes to a sleep state that stops communications with the first serial bus and receives an address as a search result from the second serial bus.

Abstract: A USB communication control method, in which a USB host and a USB accessory executing an Android operating system are connected to each other through a USB cable, includes: when an application is executed on the USB accessory, acquiring USB connection information between the USB host and the USB accessory by the application; when the application being executed on the USB accessory is completed, initializing an Android Open Accessory Protocol (AOAP) of the USB accessory by the application by assigning USB control authority to the application; changing the USB connection information between the USB host and the USB accessory to information of a state before the completion of the application; and resuming USB communication between the USB accessory and the USB host.

Abstract: Techniques for handling connections between network devices that support multiple port communication modes are provided. In one embodiment, a first network device can detect a communication problem between a local port of the first network device and a peer port of a second network device, where the local port supports a plurality of communication modes including a default mode and one or more non-default modes. The first network device can further set the local port to operate in the default mode, receive on the local port a user-configured mode of the peer port from the second network device, and determine a communication mode for the local port from the plurality of communication modes, where the determining is based on the user-configured mode of the peer port and a user-configured mode of the local port. The first network device can then set the local port to operate in the determined communication mode.

Abstract: A method for controlling a rendering time of a second video content stream on a second device to be synchronized with a rendering time of a first video content stream on a first device, said second video content stream being organized in chunks, includes receiving by a control device a request of a chunk of the second video content stream from the second device, receiving by the control device, the packets of the requested chunk, and delivering by the control device the requested chunk to the second device at a delivery time at which said requested chunk should be delivered to the second device so that the rendering time of the second video content stream on the second device is synchronized with the rendering time of the first video content stream on the first device.

Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a processor and a basic input/output system comprising a program of instructions executable by the processor and configured to cause the processor to initialize one or more information handling resources of the information handling system. The basic input/output system may be further configured to, prior to boot of an operating system of the information handling system, initialize a virtual device controller emulating a hardware controller for controlling peripheral devices communicatively coupled to the processor, and cause the virtual device controller to interact with a driver executing on the operating system to control the peripheral devices.

Abstract: A technique includes jointly encrypting and error encoding plain text data. The joint encryption and error encoding includes processing plain text data in an encryption cipher comprising a plurality of successive rounds to generate cipher text data; and embedding error correction encoding in the encryption cipher to error correction encode the cipher text data.

Abstract: A computer startup method, a startup apparatus, a state transition method, and a state transition apparatus are described. When the computer is in a suspend-to-RAM (STR) state, the power consumption is a first power consumption. When the computer transitions from the suspend-to-disk (STD) state to the startup state, the time consumption is a first time consumption. The state transition method includes, when the computer is in the startup state, obtaining a first power state transition command to instruct the computer to transition from the startup state to a specific state; and to respond to the first power state transition command, making the computer to be in the specific state.

Abstract: Failover of a virtual function exposed by an SR-IOV adapter of a computing system, including: instantiating, by a hypervisor, a standby virtual function in the computing system; detecting a loss of communication between a logical partition and an active virtual function mapped to the logical partition; placing the active virtual function and the standby virtual function in an error state; remapping the logical partition to the standby virtual function; and placing the standby virtual function in an error recovery state.

Abstract: A method and apparatus for outputting a supplementary content from a WFD is disclosed.

Abstract: According to one embodiment, a semiconductor device includes a device. The device includes a decoder, a generation circuit, a register, and a modifier. The decoder analyzes a command of a received packet. The generation circuit generates a unique device number in accordance with information in the packet. The register holds the generated unique device number. The modifier updates and outputs the packet. When a packet issued by a host is a command packet, among broadcast packets which return to the host through one or more devices, for determining the unique device number, the command packet includes parameters of an initial value and final value of device number.