Protocol Selection Patents (Class 710/11)
  • Patent number: 9955241
    Abstract: An apparatus for enabling a first device to identify a second device comprises a first interface and a second interface. Each interface is configured to allow communication between the first device and the second device, and the first interface is distinct from the second interface. The apparatus further comprises one or more controllers configured to receive a first identifier from the second device via the first interface. If the first identifier has a predetermined value, the controllers receive a second identifier from the second device via the second interface. The controllers identify the second device using the second identifier.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: April 24, 2018
    Assignee: ELEKTA LIMITED
    Inventor: Adrian Maxwell Smith
  • Patent number: 9946532
    Abstract: An image processing device and control method that includes a processor and a memory storing a set of instructions that, when executed by the processor, controls the image processing device to receive a first data object representing a software update to be applied to the at least one peripheral device coupled to the image processing device. A communication mode switch message is generated to change a mode of communicating data between the at least one peripheral device and the image processing device and communicate the communication mode switch message to the at least one peripheral device. Currently active communication mode is disabled and a previously disabled communication pathway of the at least one peripheral device is activated as an update mode. The data representing the software update is transmitted via the update mode to apply the software update to the at least one peripheral device.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: April 17, 2018
    Assignees: CANON INFORMATION AND IMAGING SOLUTIONS, INC., CANON U.S.A., INC.
    Inventors: Jiayin Peng, Jiuyuan Ge, Song Cang, Bryan Heller
  • Patent number: 9934181
    Abstract: Described are embodiments of methods, apparatuses, and systems for PCIe tunneling across a multi-protocol I/O interconnect of a computer apparatus. A method for PCIe tunneling across the multi-protocol I/O interconnect may include establishing a first communication path between ports of a switching fabric of a multi-protocol I/O interconnect of a computer apparatus in response to a peripheral component interconnect express (PCIe) device being connected to the computer apparatus, and establishing a second communication path between the switching fabric and a PCIe controller. The method may further include routing, by the multi-protocol I/O interconnect, PCIe protocol packets of the PCIe device from the PCIe device to the PCIe controller over the first and second communication paths. Other embodiments may be described and claimed.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: April 3, 2018
    Assignee: INTEL CORPORATION
    Inventors: David J. Harriman, Maxim Dan
  • Patent number: 9871192
    Abstract: An electronic device including a semiconductor memory is provided. The semiconductor memory may include an interlayer dielectric layer having a hole; a conductive pattern filled in the hole; and a variable resistance element coupled with the conductive pattern over the conductive pattern and storing different data according to a resistance change, wherein the conductive pattern includes a carbon-containing conductive layer in a region adjacent to the variable resistance element.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: January 16, 2018
    Assignee: SK hynix Inc.
    Inventors: Hyung-Suk Lee, Young-Ju Lee, Sook-Joo Kim
  • Patent number: 9870476
    Abstract: Systems, methods, and apparatus, including computer programs encoded on computer storage media, for facilitating secure communication. A system for facilitating secure communication includes an enterprise network, one or more operational technology networks, and a management server. Each of the operational technology networks can include one or more controller devices operable to control one or more operational devices, and can include a respective site security server and a respective security relay server. The security relay server can be operable to facilitate secure communication between controller devices of the operational technology network and its corresponding site security server. The management server can be a node on the enterprise network and can be operable to communicate with each site security server.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: January 16, 2018
    Assignee: Accenture Global Services Limited
    Inventors: Song Luo, Walid Negm, James J. Solderitsch, Shaan Mulchandani, Amin Hassanzadeh, Shimon Modi
  • Patent number: 9870337
    Abstract: A method comprises identifying resource needs of a plurality of peripherals and resource requirements of a plurality microcontrollers. The method includes comparing the resource needs of the plurality of peripherals with the resource requirements of the plurality of microcontrollers to identify generic resources common to the plurality of microcontrollers, wherein a first microcontroller and a second microcontroller of the plurality of microcontrollers provide the generic resources to processor pin locations according to differing architectures. The method includes assigning each resource of the generic resources to a fixed motherboard location, the assigning including assigning the fixed location to an interface pin.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: January 16, 2018
    Assignee: E3 EMBEDDED SYSTEMS, LLC
    Inventor: Russell Kevin Huffman
  • Patent number: 9864864
    Abstract: Systems, methods, and apparatus, including computer programs encoded on computer storage media, for facilitating communication in an industrial control network. A system includes an industrial control network, one or more controller devices, one or more emulators, and an encryption relay processor. Each controller device can be operable to control one or more operational devices connected to the industrial control network. Each emulator can be configured to communicate with a respective controller device, and each emulator can be configured to reference a respective profile that includes information about security capabilities of the respective controller device. The encryption relay processor can be operable to facilitate communication to and from each emulator over the industrial control network.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: January 9, 2018
    Assignee: Accenture Global Services Limited
    Inventors: Song Luo, Walid Negm, James J. Solderitsch, Shaan Mulchandani, Amin Hassanzadeh, Shimon Modi
  • Patent number: 9852264
    Abstract: A biometric reading device, for tracking fitness activity, via creating a profile of the user on web portal, comprising a touch screen with the front camera, finger print scanner for thumb, finger print scanner for index finger, and extendable voice recorder at the base panel, the circuit board, essential to be linked with the web portal, a start and stop press button to initiate and stop the fitness tracking record respectively, the speakers at both ends, motion sensors adjacent to both the speakers, audio output, micro USB input to connect pulse measuring or wearable devices, and the power source input. The devise is used for tracking and maintain the fitness activity record, creating the individual profile or account by capturing the biometric data (finger prints, voice recordings and facial image) of the user.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: December 26, 2017
    Inventor: Padmanabaiah Srirama
  • Patent number: 9846672
    Abstract: Systems, methods, circuits, devices and computer-readable mediums for configuring serial devices are disclosed. In some implementations, a device comprises: an input for receiving first and second requests from a serial bus; a decoder coupled to the input and configured to determine if either of the first and second requests is a configuration mode request; a controller coupled to the decoder and configured to: in response to a determination that the first request is a configuration mode request, program a configuration block with configuration data obtained from the serial bus and alter a device behavior according to the configuration data; and in response to a determination that the second request is not a configuration mode request, perform one or more actions on the device according to the second request.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: December 19, 2017
    Assignee: Atmel Corporation
    Inventors: Daniel Harfert, Richard V. De Caro
  • Patent number: 9833901
    Abstract: The present invention provides a general purpose operating system (GPROS) that shows particular usefulness in the robotics and automation fields. The operating system provides individual services and the combination and interconnections of such services using built-in service extensions, built-in completely configurable generic services, and ways to plug in additional service extensions to yield a comprehensive and cohesive framework for developing, configuring, assembling, constructing, deploying, and managing robotics and/or automation applications. The invention includes GPROS extensions and features directed to use as an autonomous vehicle operating system. The vehicle controlled by appropriate versions of the GPROS can include unmanned ground vehicle (UGV) applications such as a driverless or self-driving car. The vehicle can likewise or instead include an unmanned aerial vehicle (UAV) such as a helicopter or drone.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: December 5, 2017
    Assignee: Perrone Robotics, Inc.
    Inventor: Paul J. Perrone
  • Patent number: 9832038
    Abstract: A communication system and a method for operating a communication system, the communication system having a CAN bus and at least two devices connected with the aid of the CAN bus. Such a device has a CAN control unit, an asynchronous, serial communication (ASC) interface unit, and a switch. The CAN control unit is suitable for transmitting, in a first transmission mode, CAN data frames over the CAN bus with the aid of a first physical protocol. The asynchronous, serial communication interface unit or ASC interface unit is suitable for transmitting, in a second transmission mode, ASC data frames over the CAN bus with the aid of a second physical protocol. The switch is designed for switching over between the first transmission mode and the second transmission mode as a function of at least one agreement effective between the device and at least one other device.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: November 28, 2017
    Assignee: ROBERT BOSCH GMBH
    Inventors: Axel Aue, Martin Gruenewald
  • Patent number: 9820134
    Abstract: The invention enables a device to discover one or more other devices within range for a device-to-device mode of communication. This proximity discovery may trigger a target device, e.g. to start listening to signals from a source device or perform any other action based on the proximity discovery like e.g. charging at a toll gate. A source device that wants to be discovered broadcasts a message including an identifier or a representation of the identifier. This identifier may be an identifier of the target device to be contacted or of the source device or a derivation thereof or a common security association used by a set of peers. The target device compares the broadcast identifier with a known identifier to establish proximity discovery.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: November 14, 2017
    Assignees: Koninklijke KPN N.V., Nederlandse Organisatie voor Toegepast-Natuurwetenschappelijk Onderzoek TNO
    Inventors: Frank Fransen, Peter Veugen, Sander de Kievit, Maarten Everts
  • Patent number: 9766692
    Abstract: An integrated circuit (IC) implements an industry standard-defined peripheral interconnect to connect to another integrated circuit or component in a system. The industry standard specification includes a software interface that is well-defined and implemented by various software in the system, and thus is desirable to retain. However, the physical interconnect in the systems employing the integrated circuit may be short, and thus the elaborate physical layer definition may consume more integrated circuit area and power than is otherwise desirable in the IC. The IC may implement a simpler and more power-efficient physical layer, reducing both power consumption and semiconductor substrate area consumption, in some embodiments.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: September 19, 2017
    Assignee: Apple Inc.
    Inventors: Sanjay Dabral, R. Stephen Polzin
  • Patent number: 9736037
    Abstract: A device management system includes a system management information handling system (IHS) that is coupled to a network. A first device is included in the device management system and is not configured to communicate with the system management IHS. A plurality of user IHSs are each configured to communicatively couple to the first device and are each configured to communicatively couple to the system management IHS through the network. Each of the plurality of user IHSs is configured to retrieve device information from the first device when that user IHS is communicatively coupled to the first device. Each of the plurality of user IHSs is configured to provide the device information for the first device to the system management IHS when that user IHS is communicatively coupled to the system management IHS through the network.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: August 15, 2017
    Assignee: Dell Products L.P.
    Inventors: Carlton Andrews, Gregory James Breinholt, Karthik Krishnakumar
  • Patent number: 9697068
    Abstract: A method for building a scalable system dump facility is provided. The method includes loading a component into system memory. The component includes a plurality of program modules. A component text range table entry is created for each component, whereby the component text range table entry includes: an address range, a component identifier, a data collection function, and a link to one or more related components. Upon invoking a system dump facility, a failing function instruction is determined, based on an address of the failing instruction. The component text range table is searched for an address of a failing function that is in the address range. Memory regions that are associated with the address range are transferred to a storage device first. Memory regions that are associated with related components are transferred next. Remaining memory regions are then transferred.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: July 4, 2017
    Assignee: International Business Machines Corporation
    Inventors: Adekunle Bello, Douglas Griffith, Angela A. Jaehde, Robert S. Manning
  • Patent number: 9652190
    Abstract: The present disclosure is directed to a method and user interface for redirecting print jobs. The method involves receiving a notification indicating that execution of a print job at a first printing device failed. The method also involves displaying a network printing device map on a display unit in response to receiving the notification. The network printing device map is a graphical representation of a network topology of a plurality of printing devices within a local network. The method further involves receiving an input gesture indicative of a selection of a second printing device of the plurality of printing devices with which to execute the print job. Additionally, the method involves causing the first printing device to transmit the print job to the second printing device upon receiving the input gesture.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: May 16, 2017
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Keisuke Fukushima
  • Patent number: 9632930
    Abstract: Certain embodiments of the present disclosure generally relate to allocating a sub-area of Fiber Channel addresses (FCIDs) to a device. A range of addresses may be assigned to the device using a mask address, where the most significant bits represent a mask and the least significant bits represent a sub-range of FCIDs available to be assigned to the device. Therefore, routing information may be stored efficiently in a Ternary Content Addressable Memory (TCAM) by storing a single entry in the TCAM for each sub-area of FCIDs allocated to a device, instead of storing an entry for each FCID. The single entry may indicate the mask address and the width of the mask.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: April 25, 2017
    Assignee: Cisco Technology, Inc.
    Inventors: Christian Sasso, Siddharth Kasat, Ankur Goyal, Ronak Desai, Hariharan Balasubramanian
  • Patent number: 9614652
    Abstract: Embodiments herein relate to a system for enabling communication in the radio communications network (1). The system comprises the first radio base station (12), the second radio base station (13) and the wireless terminal (10). The first radio base station (12) and the second radio base station (13) are configured to serve the wireless terminal (10) simultaneously. The first radio base station (12) is configured to set up to the wireless terminal (10), a first channel for receiving data over from the wireless terminal (10), and a first assisting channel for transmitting feedback data regarding transmissions over the first channel. The second radio base station (13) is configured to set up to the wireless terminal (10), a second channel for transmitting data over to the wireless terminal (10), and a second assisting channel for receiving, from the wireless terminal (10), feedback data regarding transmissions over the second channel.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: April 4, 2017
    Assignee: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
    Inventors: Stefan Wager, Fredrik Gunnarsson, Niklas Johansson, Magnus Stattin, Riikka Susitaival, Vesa Virkki
  • Patent number: 9606758
    Abstract: A system and method of connecting a computer to a printer which reduces the number of hardware printing devices. An example method includes determining that a virtual printer is available for use, broadcasting over a network that the peripheral is available for use, receiving a request from the first computer through a web service to connect to the virtual printer, mapping the virtual printer to the first computer, and sending information to the first computer through the web service to facilitate connection by the first computer to the virtual printer through the second computer.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: March 28, 2017
    Assignee: NCR Corporation
    Inventor: Kevin Mitchell Chandler
  • Patent number: 9600413
    Abstract: Technologies for one-level memory (1LM) and two-level memory (2LM) configurations in a common platform are described. A processor includes a first memory interface coupled to a first memory device that is located off-package of the processor and a second memory interface coupled to a second memory device that is located off-package of the processor. The processor also includes a multi-level memory controller (MLMC) coupled to the first memory interface and the second memory interface. The MLMC includes a first configuration and a second configuration. The first memory device is a random access memory (RAM) of a one-level memory (1LM) architecture in the first configuration. The first memory device is a first-level RAM of a two-level memory (2LM) architecture in the second configuration and the second memory device is a second-level non-volatile memory (NVM) of the 2LM architecture in the second configuration.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: March 21, 2017
    Assignee: Intel Corporation
    Inventors: Joydeep Ray, Varghese George, Inder M. Sodhi, Jeffrey R. Wilcox
  • Patent number: 9584632
    Abstract: This disclosure relates generally to communication network protocols, and more particularly to systems and methods for multi-protocol translation. In one embodiment, a multi-protocol translation method is disclosed, comprising: receiving, at a storage area network switch, a frame formatted according to a first protocol; selecting, using the received frame, a second protocol from a plurality of protocols according to which to convert the received frame; obtaining a protocol format specification data of a second protocol; converting by the storage area network switch, the received frame to a converted frame according to the second protocol based on the protocol format specification data of the second protocol; and providing, by the storage area network switch, the converted frame.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: February 28, 2017
    Assignee: WIPRO LIMITED
    Inventor: Madhukar Gunjan Chakhaiyar
  • Patent number: 9552316
    Abstract: Techniques for adaptive interface support are described. In one embodiment, for example, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to execute a basic input/output system (BIOS), determine a respective impedance state for each of one or more pins in an M.2 physical interface, determine an interface type for a peripheral device coupled with the M.2 physical interface based on the impedance states for the one or more pins, and control an operational state of the peripheral device during execution of the BIOS, based on the interface type for the peripheral device. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 29, 2014
    Date of Patent: January 24, 2017
    Assignee: INTEL CORPORATION
    Inventors: Nathaniel L. Desimone, Robert E. Gough, Sean C. Dardis
  • Patent number: 9524108
    Abstract: A solid state drive (SSD) device includes a Peripheral Component Interconnect-Express (PCIe) interface, a non-volatile storage media, and a memory that stores code, the code including an Advanced Host Controller Interface (AHCI) controller, and a Non-Volatile Memory-Express (NVMe) controller. The SSD device is operable to select one of the AHCI controller and the NVMe controller to process data storage commands between the PCIe interface and the non-volatile storage media.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: December 20, 2016
    Assignee: DELL PRODUCTS, LP
    Inventors: Swee Chay Hia, Munif F. Farhan
  • Patent number: 9515887
    Abstract: A communication processing device including: a storage section configured to store a policy table associating an identifier identifying a communication unit with an identifier of a policy applied to the communication unit and a priority; an obtaining section configured to refer to the policy table and obtain the identifier of the policy and the priority, the identifier of the policy and the priority being associated with the identifier of the communication unit, at a time of protocol processing of the communication unit; a policy applying section configured to group one or more communication units associated with an identifier of an identical policy, and apply the identical policy to the grouped one or more communication units; and a band control section configured to perform band control on a basis of the priority for each communication unit.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: December 6, 2016
    Assignees: Sony Corporation, Sony Interactive Entertainment Inc.
    Inventors: Koji Shima, Kenjiro Komaki, Hikaru Mitsuhashi
  • Patent number: 9495629
    Abstract: A memory card and a communication method between a memory card and a host unit are disclosed. High throughput of data between the memory card and the host unit is guaranteed by providing a communication interface between the memory card and the host unit including a first communication interface between a memory unit of the memory card and a control unit of the memory card and a second communication interface between the control unit of the memory card and the host unit.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: November 15, 2016
    Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
    Inventors: Alok Kumar Mittal, Deepak Naik
  • Patent number: 9471484
    Abstract: A memory controller of a data storage device, which communicates with a host, is configurable to have at least two different pinout assignments for interfacing with respective different types of memory devices. Each pinout assignment corresponds to a specific memory interface protocol. Each memory interface port of the memory controller includes port buffer circuitry configurable for different functional signal assignments, based on the selected memory interface protocol to be used. The interface circuitry configuration for each memory interface port is selectable by setting a predetermined port or registers of the memory controller.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 18, 2016
    Assignee: Novachips Canada Inc.
    Inventors: HakJune Oh, Jin-Ki Kim, Young Goan Kim, Hyun Woong Lee
  • Patent number: 9471811
    Abstract: A secure provisioning manifest used to authenticate and securely communicate with peripherals attached to a computer is provided with techniques to learn about a new peripheral not authorized to be attached to the computer and possibly gain authorization for the peripheral. A secure I/O module, that is separate from an operating system and transaction software executed by a processor of the computer, uses the secure provisioning manifest to authenticate and establish a secure encrypted session for communicating with each peripheral authorized to be attached to the computer. When an unauthorized peripheral is found, identifying information for the peripheral is transmitted to an enterprise provisioning server with a request to authorize the peripheral.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: October 18, 2016
    Assignee: NCR Corporation
    Inventors: Erick Christian Kobres, Ron William Rogers
  • Patent number: 9459939
    Abstract: A method, medium, and system to receive an event stream, the event stream including a plurality of events, the events being semantically modeled; receive domain insights specifying a relationship between two events, the domain insights being semantically modeled and defined by a specified time limit and a comparison of event attributes using the specified time limit with a logical operator; retrieve stored representations of events referenced in the received domain insights; process the event stream, the received domain insights, and the retrieved stored events to produce a temporal processing result; and store the temporal processing result.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: October 4, 2016
    Assignee: BUSINESS OBJECTS SOFTWARE LTD.
    Inventor: Yuqian Song
  • Patent number: 9442791
    Abstract: A computer program product and a computer system for building a scalable system dump facility is provided. The method includes loading a component into system memory. The component includes a plurality of program modules. A component text range table entry is created for each component, whereby the component text range table entry includes: an address range, a component identifier, a data collection function, and a link to one or more related components. Upon invoking a system dump facility, a failing function instruction is determined, based on an address of the failing instruction. The component text range table is searched for an address of a failing function that is in the address range. Memory regions that are associated with the address range are transferred to a storage device first. Memory regions that are associated with related components are transferred next. Remaining memory regions are then transferred.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: September 13, 2016
    Assignee: International Business Machines Corporation
    Inventors: Adekunle Bello, Douglas Griffith, Angela A. Jaehde, Robert S. Manning
  • Patent number: 9411734
    Abstract: Electronic devices have a semiconductor memory unit including a magnetization compensation layer in a contact plug. One implementation of the semiconductor memory unit includes a variable resistance element having a stacked structure of a first magnetic layer, a tunnel barrier layer, and a second magnetic layer, and a contact plug arranged in at least one side of the variable resistance element and comprising a magnetization compensation layer. Another implementation includes a variable resistance element having a stacked structure of a first magnetic layer having a variable magnetization, a tunnel barrier layer, and a second magnetic layer having a pinned magnetization; and a contact plug arranged at one side of and separated from the variable resistance element to include a magnetization compensation layer that produces a magnetic field to reduce an influence of a magnetic field of the second magnetic layer on the first magnetic layer.
    Type: Grant
    Filed: December 29, 2013
    Date of Patent: August 9, 2016
    Assignee: SK hynix Inc.
    Inventor: Cha-Deok Dong
  • Patent number: 9398533
    Abstract: In one embodiment, setting, by a first node, a settable data rate for a first part of a data frame, the data frame also having a second part having a defined second data rate, and transmitting, by the node, the first part at the set data rate and the second part at the second data rate, the first part including at least a portion of a payload of the data frame and the second part including an identifier based on the set data rate.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: July 19, 2016
    Assignee: Atmel Corporation
    Inventors: Tilo Ferchland, Sascha Beyer, Michael Schmidt
  • Patent number: 9391797
    Abstract: Aspects of the invention support different products having a host device and a communications device. The host device may interact with the communications device to exchange messages containing data objects over a fieldbus network for transporting messages containing data objects. Read/write requests to the fieldbus data objects may be answered locally in the communications device, or the fieldbus data object may be mapped to host data when host access is required. The communications device stores a profile image associated with a designated host type, so that the communications device may map the data object to host data for the host device and then exchange the host data with the host device. The communications device may subsequently interact with a different host type if a corresponding profile image is downloaded to the memory device.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: July 12, 2016
    Assignee: Schneider Electric USA, Inc.
    Inventors: Ronald H. Naismith, William E. LeRette, Achim Zimmermann
  • Patent number: 9377968
    Abstract: Systems and methods implemented therein are disclosed for communicating data between a memory controller and a first flash device. The system comprises a memory controller having a flash interface module. The memory controller is adapted to be communicatively coupled to a host system. The memory controller configured to receive a template. The template comprises a first set of resources for communicating data between the memory controller and the flash device and based on the template. The memory controller is adapted to configure the first set of resources for communicating data between the memory controller and the first flash device. The flash interface module is communicatively coupled to the memory controller. The flash interface module is configured to communicate data between the memory controller and the first flash device via the first set of resources.
    Type: Grant
    Filed: November 13, 2013
    Date of Patent: June 28, 2016
    Assignee: SanDisk Technologies LLC
    Inventor: Gary Lin
  • Patent number: 9342402
    Abstract: A programmable integrated circuit with memory interface circuitry is provided. The memory interface circuitry may include soft memory interface logic and hard memory interface logic. The soft memory interface logic may be implemented using programmable circuits, whereas the hard memory interface logic may be implemented using non-programmable dedicated circuits. The soft memory interface logic may include error correction code (ECC) encoder and decoder circuits and circuitry for carrying out a read modified write (RMW) operation. The hard memory interface logic may include a write data buffer, a read data buffer, and other circuitry for supporting the RMW operation. The soft memory interface logic is interposed between the hard memory interface logic and the user logic on the programmable integrated circuit.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: May 17, 2016
    Assignee: Altera Corporation
    Inventors: Yu Ying Ong, Weizhong Xu
  • Patent number: 9239924
    Abstract: A computer system includes a server having a memory connected thereto. The server is adapted to be connected to a network to permit remote storage and retrieval of data files from the memory. A file identification application is operative with the server to identify errant files stored in the memory. The file identification application provides the functions of: (1) selecting a file stored in said memory; (2) generating a unique checksum corresponding to the stored fire; (3) comparing said unique checksum to each of a plurality of previously generated checksums, wherein the plurality of previously generated checksums correspond to known errant files; and (4) marking the file for deletion from the memory if the unique checksum matches one of the plurality of previously generated checksums.
    Type: Grant
    Filed: September 3, 2012
    Date of Patent: January 19, 2016
    Assignee: Intellectual Ventures I LLC
    Inventor: Gary Stephen Shuster
  • Patent number: 9213492
    Abstract: The present invention relates to an SD memory card, including an SD card adapter and a memory card. One end of the SD card adapter is provided with an SD interface, and the other end is provided with a receiving groove. Both ends of the memory card are respectively provided with a set of SDIO interface contacts and a USB interface. The memory card can be inserted into the receiving groove to electrically connect the set of SDIO interface contacts and the SD interface.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: December 15, 2015
    Assignee: SHENZHEN NETCOM ELECTRONICS CO., LTD.
    Inventors: Zhixiong Li, Weiwen Pang, Ping Wang
  • Patent number: 9183087
    Abstract: Apparatus for storing and retrieving data such as in a computer network. A plurality of local data storage units each comprise a local control circuit and a housing which encloses a moveable data transducer adjacent a data storage medium. A shared resource module physically interconnects each of the local units, and includes shared circuitry that supplies a resource required by the local control circuits to transfer data to and from the data storage media. In some preferred embodiments, the resource comprises a programming instruction set that is utilized by a programmable processor in each of the local control circuits, such as servo code used to provide data transducer positional control. Alternatively, the resource comprises a shared buffer memory space utilized by read/write channels in each of the local control circuits. Preferably, data are stored across the data storage media using RAID techniques (redundant array of independent discs/devices).
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: November 10, 2015
    Assignee: Seagate Technology LLC
    Inventor: David Peter DeCenzo
  • Patent number: 9112327
    Abstract: A receptacle connector for a electronic device includes two sets of contacts arranged in two opposing rows in a cavity. A corresponding plug connector can be inserted into the receptacle connector so as to contact both sets of contacts. The receptacle connectors includes contacts that are dedicated for DisplayPort signals and contacts that provide non-DisplayPort signals. The contacts dedicated for DisplayPort signals are only enabled if the electronic device receives a notification from a connected accessory that that the accessory supports DisplayPort capability. Otherwise these contacts are in an “open” or deactivated state.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: August 18, 2015
    Assignee: Apple Inc.
    Inventors: Mushtaq Sarwar, Jeffrey J. Terlizzi
  • Patent number: 9106309
    Abstract: A vehicular communication system includes: a vehicular communication apparatus; and a portable terminal apparatus. The vehicular communication apparatus includes: a vehicular storage device that stores a predetermined vehicular application for a predetermined function; and a vehicular input device that enters an operation for the predetermined function. The portable terminal apparatus includes: a mobile storage device that stores a predetermined mobile application for the predetermined function; a mobile input device that enters an operation for the predetermined function; an interoperation detection device that detects establishment of an interoperation state, in which the predetermined vehicular application and the predetermined mobile application interoperate with each other; and an operation input disable device that prevents the mobile input device from entering the operation when the interoperation detection device detects the establishment of the interoperation state.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: August 11, 2015
    Assignee: DENSO CORPORATION
    Inventor: Yoshitaka Ozaki
  • Patent number: 9092393
    Abstract: Systems, methods, and devices for communicating with a serial/parallel interface are described herein. In an aspect, a wireless device includes a transceiver configured to output a plurality of transmission paths, and an antenna configured to output a signal corresponding to at least one of the transmission paths. The wireless device further includes a wireless switching component including a radio-frequency switch configured to selectively connect the antenna to one of the transmission paths, a plurality of signal pins, a serial interface including a plurality of serial inputs electrically coupled to at least one pin of the plurality of signal pins, a parallel interface including a plurality of parallel inputs electrically coupled to at least one pin of the plurality of signal pins, a decoder, and a level shifter configured to control the radio-frequency switch, the at least one pin electrically coupled to both a serial input and a parallel input.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: July 28, 2015
    Assignee: Skyworks Solutions, Inc.
    Inventors: David Scott Whitefield, Nuttapong Srirattana, Kevin F. Walsh, Florinel G. Balteanu
  • Patent number: 9043516
    Abstract: A data storage device includes a first memory device configured to store data having a first property, a second memory device configured to store data having a second property, and a controller. The controller selects data stored in the first memory device, and transfers the selected data to the second memory device or stores the selected data in another physical location of the first memory device selectively depending on an update count (UC) of an address at which the selected data is stored.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: May 26, 2015
    Assignees: SK HYNIX INC., INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Hyeok-Jun Seo, Seok-Min Ko, Eui-Young Chung
  • Patent number: 9043499
    Abstract: A dispersed storage network memory includes a pool of storage nodes, where the pool of storage nodes stores a multitude of encoded data files. A storage node obtains and analyzes data access response performance data for each of the storage nodes to produce a modified data access response plan that includes identity of an undesired performing storage node and an alternative data access response for the undesired performing storage node. The storage nodes receive corresponding portions of a data access request for at least a portion of one of the multitude of encoded data files. The undesired performing storage node or another storage node processes one of the corresponding portions of the data access request in accordance with the alternative data access response.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: May 26, 2015
    Assignee: Cleversafe, Inc.
    Inventors: Michael Colin Storm, Jason K. Resch
  • Patent number: 9043510
    Abstract: A processor having a streaming unit is disclosed. In one embodiment, a processor includes one or more execution units configured to execute instructions of a processor instruction set. The processor further includes a streaming unit configured to execute a first instruction of the processor instruction set, wherein executing the first instruction comprises the streaming unit loading a first data stream from a memory of a computer system responsive to execution of a first instruction. The first data stream comprises a plurality of data elements. The first instruction includes a first argument indicating a starting address of the first stream, a second argument indicating a stride between the data elements, and a third argument indicative of an ending address of the stream. The streaming unit is configured to output a second data stream corresponding to the first data stream.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: May 26, 2015
    Assignee: Oracle International Corporation
    Inventors: Darryl J Gove, David L Weaver, Gerald Zuraski
  • Patent number: 9043493
    Abstract: A virtual machine (VM) migration from a source virtual machine monitor (VMM) to a destination VMM on a computer system. Each of the VMMs includes virtualization software, and one or more VMs are executed in each of the VMMs. The virtualization software allocates hardware resources in a form of virtual resources for the concurrent execution of one or more VMs and the virtualization software. A portion of a memory of the hardware resources includes hardware memory segments. A first portion of the memory segments is assigned to a source logical partition and a second portion is assigned to a destination logical partition. The source VMM operates in the source logical partition and the destination VMM operates in the destination logical partition. The first portion of the memory segments is mapped into a source VMM memory, and the second portion of the memory segments is mapped into a destination VMM memory.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: May 26, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Utz Bacher, Reinhard Buendgen, Einar Lueck, Angel Nunez Mencias
  • Patent number: 9032099
    Abstract: Multi-level memory architecture technologies are described. One processor includes a requesting unit, a first memory interface to couple to a far memory (FM), a second memory interface to couple to a near memory (NM) and a multi-level memory controller (MLMC) coupled to the requesting unit, the first memory interface and the second memory interface. The MLMC is to write data into a memory page of NM in response to a request from the requesting unit to retrieve the memory page from FM. The MLMC receives a hint from the requesting unit and clears a writeback bit for the memory page indicated in the hint. The hint indicates that the data contained in the memory page of the NM is not to be subsequently requested by the requesting unit. The MLMC starts a writeback operation of a memory sector including the memory page and one or more additional memory pages.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: May 12, 2015
    Assignee: Intel Corporation
    Inventors: Jorge E. Parra, Marc Torrant, Joydeep Ray
  • Publication number: 20150127856
    Abstract: Various structures and methods are disclosed related to configurable scrambling circuitry. Embodiments can be configured to support one of a plurality of protocols. Some embodiments relate to a configurable multilane scrambler that can be adapted either to combine scrambling circuits across a plurality of lanes or to provide independent lane-based scramblers. Some embodiments are configurable to select a scrambler type. Some embodiments are configurable to adapt to one of a plurality of protocol-specific scrambling polynomials. Some embodiments relate to selecting between least significant bit (“LSB”) and most significant bit (“MSB”) ordering of data. In some embodiments, scrambler circuits in each lane are adapted to handle data that is more than one bit wide.
    Type: Application
    Filed: December 31, 2014
    Publication date: May 7, 2015
    Applicant: Altera Corporation
    Inventors: Curt Wortman, Chong H. Lee, Huy Ngo
  • Patent number: 9022279
    Abstract: A method for identifying an application usable with an accessory is provided. The method includes receiving an accessory identifier associated with the accessory, identifying an application protocol associated with the accessory identifier, identifying an application that supports the application protocol, and providing information about the application to a user device. A method for identifying an accessory usable with an application is also provided. The method includes receiving information about an application, determining an application protocol associated with the application, determining an accessory that supports the application protocol, and providing information about the accessory to a user device.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: May 5, 2015
    Assignee: Apple Inc.
    Inventors: Lawrence G. Bolton, Peter T. Langenfeld, Shyam S. Toprani
  • Patent number: 9021144
    Abstract: Systems and methodologies are described that facilitate utilizing timers in conjunction with transmitting buffer status reports (BSR). A prohibit timer can be utilized to determine when BSRs can be transmitted to an eNB. The prohibit timer can be initialized or restarted upon transmitting a BSR to an eNB. A BSR retransmit timer can be used to determine when to retransmit a BSR. The BSR retransmit timer can be initialized upon transmitting a BSR to an eNB and restarted each time an uplink resource allocation is received from the eNB. Once the timer expires, if an uplink transmission buffer contains data (e.g., size>0), the BSR can be retransmitted to the eNB. Control data feedback can additionally be used to determine when to retransmit the BSR. In addition, in either case, the timer duration values can be provided by the eNB.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: April 28, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Aleksandar Damnjanovic, Sai Yiu Duncan Ho
  • Patent number: 9021154
    Abstract: Provided are a device and computer readable storage medium for programming a memory module to initiate a training mode in which the memory module transmits continuous bit patterns on a side band lane of the bus interface; receiving the bit patterns over the bus interface; determining from the received bit patterns a transition of values in the bit pattern to determine a data eye between the determined transitions of the values; and determining a setting to control a phase interpolator to generate interpolated signals used to sample data within the determined data eye.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: April 28, 2015
    Assignee: Intel Corporation
    Inventors: Tonia G. Morris, Jonathan C. Jasper, Arnaud J. Forestier
  • Patent number: 9021148
    Abstract: Mechanisms are provided for providing an early warning of an error state of a remote direct memory access (RDMA) resource to a userspace application. The mechanisms detect, using kernelspace logic, an error event having occurred, and perform a write operation to write an error state value to a userspace shared memory state data structure indicating the RDMA resource to be in an error state. The mechanisms detect, using userspace logic, the RDMA resource being in an error state by reading the error state value from the userspace shared memory state data structure in response to a userspace application attempting to perform a RDMA operation using the RDMA resource. In addition, the mechanisms initiate, by the userspace application, an operation to tear down the RDMA resource in response to detecting the RDMA resource being in the error state.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: April 28, 2015
    Assignee: International Business Machines Corporation
    Inventors: Omar Cardona, Matthew R. Ochs, Vikramjit Sethi