Mode Selection Patents (Class 710/14)
  • Patent number: 9563468
    Abstract: In a transactional memory environment including a first processor and one or more additional processors, a computer-implemented method includes identifying a memory location and sending a probe request from the first processor to the additional processors. The probe request includes the memory location. The computer implemented method further includes generating, by each additional processor, an indication including whether the memory location is in use for a transaction by the additional processor. The computer-implemented method further includes sending the indication from each additional processor to the first processor and proceeding, by the first processor, based on the indication.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: February 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel
  • Patent number: 9491624
    Abstract: A mobile terminal is configured to store information associated with accessing an application that requires bootstrapping; recognize an invocation of the application; identify a rule, included in the information, associated with accessing the application; determine whether the rule indicates that a user of the mobile terminal is allowed to access the application; determine whether the mobile terminal supports the bootstrapping; and provide access to the application when the rule indicates that the user of the mobile terminal is allowed to access the application and when the mobile terminal supports the bootstrapping.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: November 8, 2016
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: William C. King, Bjorn Hjelm
  • Patent number: 9489307
    Abstract: An asynchronous dual domain bridge is implemented between the cache coherent master and the coherent system interconnect. The bridge has 2 halves, one in each clock/powerdown domain—master and interconnect. The powerdown mechanism is isolated to just the asynchronous bridge implemented between the master and the interconnect with a basic request/acknowledge handshake between the master subsystem and the asynchronous bridge.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: November 8, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Daniel B Wu, Timothy D Anderson
  • Patent number: 9483096
    Abstract: A data storage device includes a non-volatile memory and a host interface. A method includes supplying a first supply voltage to the host interface during a first mode of operation of the non-volatile memory. The method further includes supplying a second supply voltage to the host interface in response to a transition from the first mode of operation to a second mode of operation of the non-volatile memory.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: November 1, 2016
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Ekram Hossain Bhuiyan, Steve Xiaofeng Chi
  • Patent number: 9473892
    Abstract: Example appliances that trigger applications on consumer devices based on user proximity to appliance background are disclosed. A disclosed example system includes an appliance to detect a proximity of a user to the appliance, a remote server to receive a result of the proximity detection from the appliance, and to send an application trigger based on the result, and a user device associated with the user to activate an application on the user device in response to the application trigger received from the remote server.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: October 18, 2016
    Assignee: Whirlpool Corporation
    Inventors: Richard J. Hughes, Peter J. Melsa, Brandon L. Satanek, Wen Shi
  • Patent number: 9436573
    Abstract: Multifunctional I/O apparatus having one connection terminal with two connections and an electronic circuit, which with the assistance of a plurality of settable operating states detects an active input signal or passive input signal applied on the two connections of the connection terminal or controls/switches an externally driven load.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: September 6, 2016
    Assignee: Endress + Hauser GmbH & Co. KG
    Inventors: Tobias Paul, Ralph Stib, Armend Zenuni
  • Patent number: 9344121
    Abstract: The disclosure discloses a Software Defined Radio (SDR)-based radio communication transmission system. A front-end analog interface unit, a Digital-to-Analog (D/A) and Analog-to-Digital (A/D) conversion unit, a core processing unit and a storage unit adopt the universal bus for interconnection and interworking. The core processing unit is configured to acquire the front-end processed data from the front-end analog interface unit, and to choose to transmit the front-end processed data to the D/A and A/D conversion unit by the control of the universal bus according to whether the radio communication standard of the current data accords with the current working mode.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: May 17, 2016
    Assignees: ZTE Corporation, ZTE Microelectronics Technology Co., Ltd.
    Inventors: Ning Chen, Bingxin Tian
  • Patent number: 9312707
    Abstract: An apparatus for providing electrical power, including an electrically non-conductive generally cube-shaped housing, an electrical power supply operationally connected and positioned in the housing, a first plurality of power outlets electrically connected to power supply for connecting three-prong plugs, a second plurality of power outlets for connecting male USB connectors, and a power cord operationally connected to the power.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: April 12, 2016
    Assignee: S P TECHNOLOGIES LLC
    Inventors: Brian Stewart, Scott Weaver
  • Patent number: 9313571
    Abstract: An electronic apparatus includes a storage to store an operating system, a controller to boot the electronic apparatus using the operating system stored in the storage, a speaker to output sound, a communication interface to receive sound data from an external apparatus, and a sound processor to process and output the received sound data through the speaker, and the communication interface, the sound processor, and the speaker operate even when the electronic apparatus is not booted.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: April 12, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-jun Park, Ki-young Ko
  • Patent number: 9294052
    Abstract: According to one embodiment, an electronic apparatus includes a terminal, an amplifier, a speaker, a power supply circuit and a first controller. The terminal configured to input an audio signal from an external device. The amplifier configured to amplify the audio signal. The speaker configured to output sound corresponding to the audio signal which is amplified by the amplifier. The power supply circuit configured to supply power to the amplifier. The first controller configured to control the power supply circuit to continue the supply of the power, when the electronic apparatus is in a non-operative state.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: March 22, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Terunobu Hara, Hiroaki Yokomichi
  • Patent number: 9285853
    Abstract: A method of providing power to electronics within a cable is described. The method may include communicatively coupling a first device to a second device via a cable. The cable may include electronic components integrated within the cable. The method may also include providing a signal from the first device to the second device. The method may also include providing, via an internal power line within the cable, power to the integrated electronic components. The method may also include providing, via a device power line within the cable, power between the first device and the second device, wherein the internal power line and the device power line are electrically isolated from one another inside the cable.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: March 15, 2016
    Assignee: Intel Corporation
    Inventors: Bradley Saunders, Robert Dunstan
  • Patent number: 9261943
    Abstract: A semiconductor device which can consume less power and a method for driving the semiconductor device can be provided. The semiconductor device includes a processor including a control device and an arithmetic unit, a memory device, an input/output device, and a plurality of bus lines which is a path for transmitting and receiving instructions, addresses, or data between the processor and the memory device, or the processor and the input/output device. A first memory storing each piece of information over the bus line is connected to each of the bus lines, and a second memory storing a status flag relating to information over the bus line is connected to the control device.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: February 16, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshifumi Tanada
  • Patent number: 9232519
    Abstract: A method for transmitting, by a base station, signals in a communication system. Control information for a subsidiary carrier band is transmitted to a mobile station via a primary carrier band. Data is transmitted to the mobile station via the subsidiary carrier band based on the control information and via the primary carrier band. Furthermore, the primary carrier band is a carrier frequency band which the mobile station initially attempts to access or via which information of a carrier aggregation configuration is transmitted. Additionally, the control information includes a logical index assigned to the subsidiary carrier band for the mobile station and a physical index of a frequency allocation band used as the subsidiary carrier band. The physical index corresponds to one of plural absolute frequency band indexes assigned to frequency allocation bands available in the communication system.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: January 5, 2016
    Assignee: LG ELECTRONICS INC.
    Inventors: Seung Hee Han, Min Seok Noh, Jin Sam Kwak, Yeong Hyeon Kwon, Hyun Woo Lee, Dong Cheol Kim, Sung Ho Moon
  • Patent number: 9223742
    Abstract: Computer readable storage mediums, electronic devices, and accessories having stored thereon data structures. A data structure includes a pin selection field operable to identify a connector pin and cause a host device to select one of a plurality of communication protocols for communicating with an accessory over the identified connector pin. The data structure also includes an accessory capability field defining an accessory identifier that uniquely identifies the accessory.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: December 29, 2015
    Assignee: Apple Inc.
    Inventors: Scott Mullins, Alexei Kosut, Scott Krueger, John Ananny
  • Patent number: 9218283
    Abstract: A die assignment scheme assigns data in the order it is received, to multiple memory dies. Any busy dies are skipped until they become ready again so that the system does not wait for busy dies to become ready. Immediately sequential writes to the same die are prohibited so that reading speed is not impacted.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: December 22, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Sergey Gorobets, Alan Bennett
  • Patent number: 9213606
    Abstract: An image rescue system includes an application program for communication with a mass storage device, the application program being in communication with an operating system layer for accessing the mass storage device to read and write information. The image rescue system further includes a device driver in communication with the application program, the operating system layer and the mass storage device, the device driver for allowing the application program to access the mass storage device to read and write information by bypassing the operating system layer, the device driver for communicating with the mass storage device to allow the application program to access information in the mass storage device considered damaged by the operating system layer, the damaged information being inaccessible to the operating system layer, wherein the image rescue system accesses the mass storage device to retrieve and recover information accessible and inaccessible to the operating system layer.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: December 15, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Neal Anthony Galbo, Berhanu Iman, Ngon Le
  • Patent number: 9214979
    Abstract: In accordance with some embodiments, the present disclosure relates to a dual mode control interface that can be used to provide both a radio frequency front end (RFFE) serial interface and a two-mode general purpose input/output (GPIO) interface within a single digital control interface die. In certain embodiments, the dual mode control interface, or digital control interface, can communicate with a power amplifier. Further, the dual mode control interface can be used to set the mode of the power amplifier.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: December 15, 2015
    Assignee: Skyworks Solutions, Inc.
    Inventor: David Steven Ripley
  • Patent number: 9208349
    Abstract: A functional library can secure data gathering devices of a personal computing device on behalf of a secure application program to provide a more secure computing session during which sensitive data gathering activities are performed using any of those data gathering devices. The functional library, when incorporated within a personal computing device, creates a secure personal computing device on which to execute application programs such as mobile banking applications. The secure functional library acquires exclusive access to one or more of a predetermined plurality of the data gathering devices on behalf of a calling secure software application. Exclusive access is achieved by gaining access to each of the predetermined set and then locking that access throughout either the entire computing session, or at least until the execution of sensitive data gathering activities being performed during that computing session have been completed.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: December 8, 2015
    Assignee: SnoopWall, Inc.
    Inventors: Gary S. Miliefsky, Ken Lichtenberger, Christopher P. Gauthier
  • Patent number: 9195297
    Abstract: A bridging device and a power saving method thereof are disclosed. The disclosed bridging device includes a connector, a connection detector and a bridging chip. The connector is operative to connect to a host and includes a power pin and a command pin. The connection detector is coupled to the power pin to determine whether the connector is floating, and, outputs a linked signal when the connection is non-floating. The bridging chip is coupled to the command pin and the connection detector. When the bridging chip receives a power saving command transferred from the host via the command pin and the linked signal transferred from the connection detector, the bridging chip executes a power saving operation.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: November 24, 2015
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Wei-Hung Chen, Hui-Chih Lin
  • Patent number: 9176914
    Abstract: Disclosed are a method of configurating a CANopen network, a method of operating a slave device of the CANopen network, and a system for controlling a PC device using the CANopen network. The method of operating the slave device connected to the CANopen network includes creating a process data object for transmission, designating identifier information for the process data object, and transmitting the created process data object to a device corresponding to the designated identifier information. The identifier information includes a communication object identifier allowing another slave device or a master device connected to the CANopen network to receive the process data object.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: November 3, 2015
    Assignee: LSIS Co., Ltd.
    Inventor: Seung Shin Han
  • Patent number: 9146835
    Abstract: A first first-in-first-out (FIFO) memory may receive first processor input from a first processor group that includes a first processor. The first processor group is configured to execute program code based on the first processor input that includes a set of input signals, a clock signal, and corresponding data. The first FIFO may store the first processor input and may output the first processor input to a second FIFO memory and to a second processor according to a first delay. The second FIFO memory may store the first processor input and may output the first processor input to a third processor according to a second delay. The second processor may execute at least a first portion of the program code and the third processor may execute at least a second portion of the program code responsive to the first processor input.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: September 29, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark D. Bellows, Mark S. Fredrickson, Scott D. Frei, Steven P. Jones, Chad B. McBride
  • Patent number: 9069540
    Abstract: An information handling system provides power to a peripheral through a peripheral interface, such as a USB interface, by communicating power availability with a primary set of power parameters through a data link and communicating power availability with a secondary set of power parameters through a power link. If a peripheral device has the capability to draw power at the second power parameters, it does so while monitoring for a fold back of host power that indicates power is not available at the second power parameters.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: June 30, 2015
    Assignee: Dell Products L.P.
    Inventors: Andrew T. Sultenfuss, Mohammed K. Hijazi
  • Patent number: 9043500
    Abstract: An electronic data tablet has a controller and transition manager. The controller is to store in a memory of the tablet virtual configuration space information for a peripheral device of a computer, and the transition manager is to control the controller to operate in a first mode and a second mode. The virtual configuration space information is stored in the tablet memory when the first mode is to be switched to the second mode. When the second mode is switched to the first mode, the virtual configuration space information is accessed to control recognition of the peripheral device of the computer without performing a re-scanning operation.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: May 26, 2015
    Assignee: Intel Corporation
    Inventors: Siva Ramakrishnan, Kristine Karnos, Siddhartha Nath
  • Patent number: 9043510
    Abstract: A processor having a streaming unit is disclosed. In one embodiment, a processor includes one or more execution units configured to execute instructions of a processor instruction set. The processor further includes a streaming unit configured to execute a first instruction of the processor instruction set, wherein executing the first instruction comprises the streaming unit loading a first data stream from a memory of a computer system responsive to execution of a first instruction. The first data stream comprises a plurality of data elements. The first instruction includes a first argument indicating a starting address of the first stream, a second argument indicating a stride between the data elements, and a third argument indicative of an ending address of the stream. The streaming unit is configured to output a second data stream corresponding to the first data stream.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: May 26, 2015
    Assignee: Oracle International Corporation
    Inventors: Darryl J Gove, David L Weaver, Gerald Zuraski
  • Patent number: 9043493
    Abstract: A virtual machine (VM) migration from a source virtual machine monitor (VMM) to a destination VMM on a computer system. Each of the VMMs includes virtualization software, and one or more VMs are executed in each of the VMMs. The virtualization software allocates hardware resources in a form of virtual resources for the concurrent execution of one or more VMs and the virtualization software. A portion of a memory of the hardware resources includes hardware memory segments. A first portion of the memory segments is assigned to a source logical partition and a second portion is assigned to a destination logical partition. The source VMM operates in the source logical partition and the destination VMM operates in the destination logical partition. The first portion of the memory segments is mapped into a source VMM memory, and the second portion of the memory segments is mapped into a destination VMM memory.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: May 26, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Utz Bacher, Reinhard Buendgen, Einar Lueck, Angel Nunez Mencias
  • Patent number: 9043499
    Abstract: A dispersed storage network memory includes a pool of storage nodes, where the pool of storage nodes stores a multitude of encoded data files. A storage node obtains and analyzes data access response performance data for each of the storage nodes to produce a modified data access response plan that includes identity of an undesired performing storage node and an alternative data access response for the undesired performing storage node. The storage nodes receive corresponding portions of a data access request for at least a portion of one of the multitude of encoded data files. The undesired performing storage node or another storage node processes one of the corresponding portions of the data access request in accordance with the alternative data access response.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: May 26, 2015
    Assignee: Cleversafe, Inc.
    Inventors: Michael Colin Storm, Jason K. Resch
  • Publication number: 20150142992
    Abstract: It is provided to implement a different number of logical slaves in a field device for use in an AS interface network as a function of the assigned address, which slaves may be addressed using the assigned address in the standard or in the expanded addressing mode. Thus, in a field device, it is possible to provide slaves having different profiles, via which different data types may be exchanged. Furthermore, a method is provided, with which a field device having different slaves is able to be addressed in a simple manner while avoiding double addressing.
    Type: Application
    Filed: January 21, 2015
    Publication date: May 21, 2015
    Inventors: Wolfgang Kropp, Andreas Schiff
  • Patent number: 9037756
    Abstract: A mobile terminal and an interface method thereof for connecting external devices, such as an adapter, a Universal Serial Bus (USB) cable, a docking station, an accessory, and the like, to the mobile terminal are provided. The mobile terminal includes a battery, a connector including a pin for data communication and first and second power pins for charging the battery, a memory for storing a reference voltage indicating a dedicated adapter of the battery, and a controller for receiving a voltage input from the first and second power pins, for recognizing an external device connected with the connector as the dedicated adapter when a voltage input from the pin for data communication is the reference voltage, and for charging the battery with power input to the first and second power pins.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: May 19, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jong Hyun Lee
  • Patent number: 9032109
    Abstract: Roughly described, an integrated circuit chip comprises a plurality of peripheral circuits, each peripheral circuit connected to a respective debug unit; a shared hub; and between each respective debug unit and the shared hub, a single physical interface configured to transport both configuration data and event data, wherein the interface is configured such that if an event occurs while the interface is transporting configuration data, the interface interrupts the transport of the configuration data in order to transport the event data.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: May 12, 2015
    Assignee: UltraSoC Technologies Ltd.
    Inventor: Andrew Brian Thomas Hopkins
  • Patent number: 9032099
    Abstract: Multi-level memory architecture technologies are described. One processor includes a requesting unit, a first memory interface to couple to a far memory (FM), a second memory interface to couple to a near memory (NM) and a multi-level memory controller (MLMC) coupled to the requesting unit, the first memory interface and the second memory interface. The MLMC is to write data into a memory page of NM in response to a request from the requesting unit to retrieve the memory page from FM. The MLMC receives a hint from the requesting unit and clears a writeback bit for the memory page indicated in the hint. The hint indicates that the data contained in the memory page of the NM is not to be subsequently requested by the requesting unit. The MLMC starts a writeback operation of a memory sector including the memory page and one or more additional memory pages.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: May 12, 2015
    Assignee: Intel Corporation
    Inventors: Jorge E. Parra, Marc Torrant, Joydeep Ray
  • Patent number: 9032110
    Abstract: Systems and methods for reducing power consumption of a device utilized to measure affective response to content by overriding selections of a mode-selector. The mode-selector receives tags corresponding to segments of content. The mode-selector selects, based on the tags, modes for operating the device to measure affective response to the segments. A threshold module receives measurements of the user's state, taken by a sensor, and indicates whether a predefined threshold is reached by the measurements. If reached, the device is operated according to a first mode to measure the affective response. Otherwise, the device is operated according to a second mode to measure the affective response. The power consumption of the device when operating in the second mode is significantly lower than the power consumption of the device when operating in the first mode.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: May 12, 2015
    Inventors: Ari M. Frank, Gil Thieberger
  • Publication number: 20150127857
    Abstract: A host apparatus capable of sharing terminology information and a peripheral device, a method of sharing the terminology information, and a terminology information sharing system. The host apparatus includes a communication module to provide a communication interface between the host apparatus and the peripheral device, an information sharing unit to share terminology information related to a plurality of functions of the peripheral device, and a user interface unit to operate the plurality of functions of the peripheral device and to display the shared terminology information related to each of the plurality of functions. Accordingly, the peripheral device and the host apparatus use identical terminology information related to the functions of the peripheral device.
    Type: Application
    Filed: January 14, 2015
    Publication date: May 7, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Hyung-jong KANG
  • Patent number: 9025175
    Abstract: In a case where a parameter received from an application is a first parameter, an information processing apparatus receives data included in the parameter as string type data, converts the received data into binary data, and transmits the converted data to a printing apparatus. In a case where the received parameter is a second parameter, the information processing apparatus transmits data corresponding to the second parameter to the printing apparatus.
    Type: Grant
    Filed: February 14, 2013
    Date of Patent: May 5, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masakazu Takahashi
  • Patent number: 9026688
    Abstract: A system for programming one or more configurable logic devices (e.g., FPGA or CPLD) via universal serial bus (USB) may include one or more CLDs; a microcontroller coupled to the one or more CLDs via a parallel data bus; a processor coupled to the microcontroller via a USB interface, the processor having access to CLD access logic and one or more CLD images; and instructions executable by the processor to program at least one of the CLDs by loading the CLD access logic onto the microcontroller, using the CLD access logic loaded on the microcontroller to set each of the at least one CLD to a programming mode, and forwarding a particular CLD image from the processor to the microcontroller via the USB interface and from the microcontroller to each of the at least one CLD via the parallel data bus.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: May 5, 2015
    Assignee: Breakingpoint Systems, Inc.
    Inventor: Jonathan Stroud
  • Patent number: 9021165
    Abstract: A data acquisition system includes a receptacle and a data acquisition device. The receptacle has a housing, sensor inputs to receive data signals from sensors coupled to an object, and a rib to block insertion of a standard Universal Serial Bus (USB) plug and facilitate insertion of a modified USB plug having a slot that mates with the rib. The data acquisition device includes circuitry to receive, store and process data, a USB plug having pins operatively coupled to the circuitry, a first subset of pins configured to receive data signals from the receptacle and a second subset of pins configured to support standard USB communication with USB-compliant devices, and a slot formed in the USB plug such that the slot facilitates interconnection of the USB plug both with standard USB-compliant devices and with the receptacle, the slot mating with the rib to facilitate interconnection.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: April 28, 2015
    Assignee: Braemar Manufacturing, LLC
    Inventor: Erich Vlach
  • Patent number: 9021157
    Abstract: Various embodiments initialize a communication link associated with data transfer to a connected state between participants in the communication link. In some cases, the communication link is paired with a first Input/Output (I/O) completion port effective to enable the data transfer. Some embodiments disassociate the communication link with the first I/O completion port and re-initialize the communication link while retaining the connected state. Alternately or additionally, the communication link is paired with at least a second I/O completion port. In some cases, the second I/O completion port utilizes an I/O model that differs from an I/O model associated with the first I/O completion port. Alternately or additionally, the communication link can be reconfigured to follow a IO model that does not utilize an IO completion port at all.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: April 28, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Matthew R. Cox, Ivan D. Pashov, Jonathan A. Silvera, Paul Sliwowicz
  • Patent number: 9021150
    Abstract: A storage device including a non-volatile memory configured to store data from a host, and a controller. The controller is configured to detect when the host is in a low power periodic update mode, the detecting based at least on part on a timing of a communication from the host, and place the storage device in a power up in standby mode when the host is in the low power periodic update mode.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: April 28, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kent W. Gibbons, Dean V. Dang, Colin W. Morgan
  • Patent number: 9021144
    Abstract: Systems and methodologies are described that facilitate utilizing timers in conjunction with transmitting buffer status reports (BSR). A prohibit timer can be utilized to determine when BSRs can be transmitted to an eNB. The prohibit timer can be initialized or restarted upon transmitting a BSR to an eNB. A BSR retransmit timer can be used to determine when to retransmit a BSR. The BSR retransmit timer can be initialized upon transmitting a BSR to an eNB and restarted each time an uplink resource allocation is received from the eNB. Once the timer expires, if an uplink transmission buffer contains data (e.g., size>0), the BSR can be retransmitted to the eNB. Control data feedback can additionally be used to determine when to retransmit the BSR. In addition, in either case, the timer duration values can be provided by the eNB.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: April 28, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Aleksandar Damnjanovic, Sai Yiu Duncan Ho
  • Patent number: 9021149
    Abstract: In an electronic conference system, an information display apparatus is provided, that allows to proceed with a conference efficiently even if performing a capturing of electronic data during the conference. The information display apparatus has a display device that is provided with a plurality of display modes and available for an electronic conference system, in which a connection of a data input device is monitored, and a processing method for the inputted data from the data input device whose connection has been detected is made different depending on the current display mode. In the processing method, when the display mode is a mode in which the data is editable and the inputted data is image data, the electronic conference system is caused to directly capture the data therein, and in the case except it, a storage dialog for the inputted data is displayed.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: April 28, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Akiko Nagata
  • Patent number: 9021148
    Abstract: Mechanisms are provided for providing an early warning of an error state of a remote direct memory access (RDMA) resource to a userspace application. The mechanisms detect, using kernelspace logic, an error event having occurred, and perform a write operation to write an error state value to a userspace shared memory state data structure indicating the RDMA resource to be in an error state. The mechanisms detect, using userspace logic, the RDMA resource being in an error state by reading the error state value from the userspace shared memory state data structure in response to a userspace application attempting to perform a RDMA operation using the RDMA resource. In addition, the mechanisms initiate, by the userspace application, an operation to tear down the RDMA resource in response to detecting the RDMA resource being in the error state.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: April 28, 2015
    Assignee: International Business Machines Corporation
    Inventors: Omar Cardona, Matthew R. Ochs, Vikramjit Sethi
  • Publication number: 20150113177
    Abstract: A method of operating an integrated circuit may include receiving an update request via an input-Output protocol, such as the Peripheral Interconnect Component Express (PCIe) protocol. The integrated circuit is placed in an update mode when the update request is received. State information is stored in predefined registers on the integrated circuit and configuration data on the integrated circuit may be subsequently updated. An asserted update mode signal is stored in a status register on the integrated circuit to indicate that the integrated circuit is in the update mode. The configuration data may include a core configuration portion and a peripheral configuration portion. When the integrated circuit is in the update mode, only the core configuration is updated while the peripheral configuration portion may be preserved.
    Type: Application
    Filed: October 21, 2013
    Publication date: April 23, 2015
    Applicant: Altera Corporation
    Inventors: Tat Mun Lui, Ting Lok Song
  • Patent number: 9015356
    Abstract: The present disclosure includes methods and devices for a memory controller. In one or more embodiments, a memory controller includes a plurality of back end channels, and a command queue communicatively coupled to the plurality of back end channels. The command queue is configured to hold host commands received from a host. Circuitry is configured to generate a number of back end commands at least in response to a number of the host commands in the command queue, and distribute the number of back end commands to a number of the plurality of back end channels.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: April 21, 2015
    Assignee: Micron Technology
    Inventors: Mehdi Asnaashari, Yu-Song Liao, Jui-Yao Yang, Siamack Nemazie
  • Patent number: 9015377
    Abstract: A register file organization is used to support multiple accesses from more than one processor or pipeline. This shared register file is organized for a multiple processor device that includes a high performance (HP) and a low power (LP) core. The shared register file includes separate HP and LP storage units coupled to separate HP and LP write and read ports.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: April 21, 2015
    Assignees: STMicroelectronics (Bejing) R&D Company Ltd., STMicroelectronics S.R.L.
    Inventors: YongQiang Wu, PengFei Zhu, HongXia Sun, Elio Guidetti
  • Patent number: 9015370
    Abstract: A terminal 50a functions as a signal terminal when a first PC 30 and a first port replicator 50 are connected to each other. A terminal 60a functions as a power terminal when a second PC 40 and a second port replicator 60 are connected to each other. Thus, even if the PC or the port replicator becomes multifunctional, it is possible to suppress a significant increase in the number of pins of the connectors 11 and 23. Further, it is possible to keep up with functionally improved PCs and port replicators while maintaining compatibility with the past products.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: April 21, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Hiroshi Kusuyama
  • Patent number: 9015387
    Abstract: An operating method of a semiconductor device includes selecting a block requiring storage space recycling from a memory device, checking costs required for performing the respective recycling techniques, selecting one of the recycling techniques based on the costs, and recycling a storage space by applying the selected recycling technique to the selected block.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: April 21, 2015
    Assignee: SK Hynix Inc.
    Inventor: Eu-Joon Byun
  • Patent number: 9009361
    Abstract: According to one embodiment, a video output device includes a first resolution converter and a first determination module. The first determination module is configured to determine whether a first level indicating the performance of resolution conversion processing of the first resolution converter is higher than a second level. The first resolution converter is configured to convert video data with a first resolution into one with a second resolution when the first level is higher than the second level.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: April 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Satoshi Kataoka
  • Patent number: 9003072
    Abstract: There is provided a portable data storage device with wireless functionality. The portable storage device includes a digital switch circuit for controlling a flow of data in the portable storage device; a non-volatile memory module coupled to the digital switch circuit, the non-volatile memory module being for storing data; an interface coupled to the digital switch circuit for enabling the portable data storage device to be used for data transfer with a host device; a microcontroller coupled to the digital switch circuit for controlling the digital switch circuit; and a wireless communications module coupled to the microcontroller for wireless transmission/reception of data. The microcontroller is configured to toggle amongst a plurality of discrete modes of the digital switch circuit such that in at least one of the plurality of discrete modes the digital switch circuit diverts data away from the microcontroller to reduce a processing load on the microcontroller. A corresponding method is also disclosed.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: April 7, 2015
    Assignee: T-Data Systems (S) Pte Ltd
    Inventor: Winn Tan
  • Patent number: 9003070
    Abstract: A system that incorporates teachings of the present disclosure may include, for example, a system having a controller to collect a plurality of User Interface (UI) device configurations, receive a request from a computing device to download one or more of the plurality of UI device configurations, and transmit to the computing device the one or more UI device configurations requested to configure one or more UI devices of the computing device. Other embodiments are disclosed.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: April 7, 2015
    Assignee: STEELSERIES ApS
    Inventor: Jacob Wolff-Petersen
  • Publication number: 20150095520
    Abstract: A semiconductor memory apparatus includes an input data bus inversion unit, a data input line, a termination unit, a data recovery unit and a memory bank. The input data bus inversion unit determines whether or not to invert a plurality of input data based on an operation mode signal and the plurality of input data and generates a plurality of conversion data. The data input line transmits the plurality of conversion data. The termination unit terminates the data input line in response to the operation mode signal. The data recovery unit receives the plurality of conversion data and generates a plurality of storage data. The memory bank configured to store the plurality of storage data.
    Type: Application
    Filed: January 6, 2014
    Publication date: April 2, 2015
    Applicant: SK hynix Inc.
    Inventor: Seung Wook KWACK
  • Patent number: 8996742
    Abstract: Method and system for testing any type of video display, video monitor or other device that produces a video signal, and that is capable of providing information about the video and optionally audio specifications and/or capabilities of the output signal to an external device when coupled thereto. The external device obtains the information about the specifications and/or capabilities and based thereon, assembles one or more pre-defined tests from a test database/repository containing tests to enable testing of compliance of the video signal producing device to those specifications and/or capabilities. This compliance testing may entail generating video or audio content at a source generator, providing it to the video signal producing device, and determining the accuracy of the output of the video signal producing device to the input content. A determination of the results of this test may be provided to an operator of the testing apparatus.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: March 31, 2015
    Assignee: Advanced Testing Technologies, Inc.
    Inventors: Robert Spinner, Eli Levi