Abstract: One embodiment of the present invention is a technique to invalidate entries in a translation lookaside buffer (TLB). A TLB in a processor has a plurality of TLB entries. Each TLB entry is associated with a virtual machine extension (VMX) tag word indicating if the associated TLB entry is invalidated according to a processor mode when an invalidation operation is performed. The processor mode is one of execution in a virtual machine (VM) and execution not in a virtual machine.

Abstract: Processing within a computing environment that supports pageable guests is facilitated. Processing is facilitated in many ways, including, but not limited to, associating guest and host state information with guest blocks of storage; maintaining the state information in control blocks in host memory; enabling the changing of states; and using the state information in management decisions. In one particular example, the guest state includes an indication of usefulness and importance of memory contents to the guest, and the host state reflects the ease of access to memory contents. The host and guest state information is used in managing memory of the host and/or guests.

Abstract: In general, in one aspect, the invention relates to a method for managing virtual memory (VM). The method includes receiving, from an application, a first access request comprising a first VM address identifying a VM location, obtaining a current VM location version value for the VM location, obtaining a first submitted VM location version value from the first VM address, and in response to a determination that the current VM location version value and the first submitted VM location version value match: servicing the first access request using the first VM address.

Abstract: In a computer system supporting execution of virtualization software and at least one instance of virtual system hardware, an interface is provided into the virtualization software to allow a program to directly define the access characteristics of its program data stored in physical memory. The technique includes providing data identifying memory pages and their access characteristics to the virtualization software which then derives the memory access characteristics from the specified data. Optionally, the program may also specify a pre-defined function to be performed upon the occurrence of a fault associated with access to an identified memory page. In this manner, programs operating both internal and external to the virtualization software can protect his memory pages, without intermediation by the operating system software.

Abstract: A virtual machine (VM) migration from a source virtual machine monitor (VMM) to a destination VMM on a computer system. Each of the VMMs includes virtualization software, and one or more VMs are executed in each of the VMMs. The virtualization software allocates hardware resources in a form of virtual resources for the concurrent execution of one or more VMs and the virtualization software. A portion of a memory of the hardware resources includes hardware memory segments. A first portion of the memory segments is assigned to a source logical partition and a second portion is assigned to a destination logical partition. The source VMM operates in the source logical partition and the destination VMM operates in the destination logical partition. The first portion of the memory segments is mapped into a source VMM memory, and the second portion of the memory segments is mapped into a destination VMM memory.

Abstract: A virtual machine disk page detector running on a computing device detects guest disk cache usage. The detector detects a request from a virtual operating system to read an object into a virtual memory page from a virtual disk, maintains a record of a page identifier and a corresponding virtual disk address in a guest cache data structure, and modifies a protection identifier of the virtual memory page to indicate that the virtual memory page is protected.

Abstract: A method and system for managing a virtual computing system including a hypervisor managing a virtual machine (VM) configured to communicate with a thread executable by multiple host central processing units (CPUs), using memory monitoring instructions. The hypervisor provides the virtual machine with a first notification identifying a first designated memory range writeable by a virtual central processing unit (VCPU) associated with the virtual machine and a first instruction to write to the first designated memory range to communicate with the thread running on a first host CPU. The hypervisor further identifies movement of the thread from the first host CPU to a second host CPU and provides to the virtual machine a second notification identifying a second designated memory range and a second instruction to write to the second designated memory range to communicate with the thread running on the second host CPU.

Abstract: Machines, systems and methods for deploying one or more virtual machines on a host computing system, the method comprising: receiving mapping information from a data storage system, wherein the mapping information associates a first data chunk stored in the data storage system with a unique identifier; utilizing the mapping information to determine whether any copies of the first data chunk have already been loaded into a memory of the host computing system in association with deployment of a first virtual machine or a second virtual machine on the host computing system; and in response to determining that no copies of the first data chunk have already been loaded into the memory: retrieving the first data chunk from the data storage system; loading the first data chunk into the memory; and utilizing the first data chunk to deploy the first virtual machine on the host computing system.

Abstract: One embodiment is a storage device that has multiple physical ports receiving input/outputs (I/Os) from a host computer. Each of the ports presents plural virtual ports using N_Port ID Virtualization (NPIV) to prioritize the I/Os.

Abstract: The present disclosure includes methods for logical address translation, methods for operating memory systems, and memory systems. One such method includes receiving a command associated with a LA, wherein the LA is in a particular range of LAs and translating the LA to a physical location in memory using an offset corresponding to a number of physical locations skipped when writing data associated with a range of LAs other than the particular range.

Abstract: Described in detail herein is a method of copying data of one or more virtual machines being hosted by one or more non-virtual machines. The method includes receiving an indication that specifies how to perform a copy of data of one or more virtual machines hosted by one or more virtual machine hosts. The method may include determining whether the one or more virtual machines are managed by a virtual machine manager that manages or facilitates management of the virtual machines. If so, the virtual machine manager is dynamically queried to automatically determine the virtual machines that it manages or that it facilitates management of. If not, a virtual machine host is dynamically queried to automatically determine the virtual machines that it hosts. The data of each virtual machine is then copied according to the specifications of the received indication.

Abstract: A method, apparatus and computer program product for providing page-protection based memory access barrier traps is presented. A value for a user-mode bit (u-bit) is computed for each extant virtual page in an address space, the u-bit indicative that an object on the virtual page is being moved by a Garbage Collector process. An instruction is executed which causes an access protection fault. The state of the u-bit for the virtual page associated with the access protection fault is consulted when the access protection fault is encountered. Additionally, the access protection fault is translated into a user-trap (utrap) and the utrap is serviced when the u-bit is set.

Abstract: Methods and apparatus for implementing storage virtualization on a network device of a storage area network are disclosed. A frame or packet is received at a port of the network device. It is then determined that the frame or packet pertains to access of a virtual storage location of a virtual storage unit representing one or more physical storage locations on one or more physical storage units of the storage area network. A virtual-physical mapping between the one or more physical storage locations and the virtual storage location is then obtained. A new or modified frame or packet is then sent to an initiator or a target specified by the virtual-physical mapping.

Abstract: A system and method for reducing storage space requirements for an embedded hypervisor. The system and method includes installing an application context on a hypervisor while installing files needed by the applications to a shared storage device. Such a system and method provides a unique application context install. Additionally, such a system and method uniquely shares applications while reducing the space occupied on the embedded device. Also, such system and a method uniquely loads applications from remote storage without actually caching the applications on a local system.

Abstract: A computer system has a random access memory (RAM) that stores currently used memory pages and SWAP storage for storing memory page that is not in use. If the process requires memory page stored on the SWAP storage, a corresponding page is loaded to RAM. If the page in RAM is not currently in use, it is moved to the SWAP storage. The computer system has a number of Virtual Environments (i.e., Containers) that run their own processes, a VE/Container RAM and a virtual SWAP storage. The Container processes have access to a VE/Container RAM. When the Container process request OS for memory, the memory manager allocates memory pages in the RAM and also allocates memory pages for the Container process in the VE/Container RAM. If no free virtual RAM is available, the process data is moved to the virtual SWAP storage.

Abstract: The present system enables passing a pointer, associated with accessing data in a memory, to an input/output (I/O) device via an input/output memory management unit (IOMMU). The I/O device accesses the data in the memory via the IOMMU without copying the data into a local I/O device memory. The I/O device can perform an operation on the data in the memory based on the pointer, such that I/O device accesses the memory without expensive copies.

Abstract: A method (and structure) of mapping a memory addressing of a multiprocessing system when it is emulated using a virtual memory addressing of another multiprocessing system includes accessing a local lookaside table (LLT) on a target processor with a target virtual memory address. Whether there is a “miss” in the LLT is determined and, with the miss determined in the LLT, a lock for a global page table is obtained.

Abstract: A method for performing direct memory access includes obtaining, by a application executing on a host, a kernel address space identifier of a first driver kernel memory. The application sends the kernel address space identifier to a second device driver. The second device driver obtains, using the kernel address space identifier, a cookie structure binding the first driver kernel memory to a second device driver address space for the first driver kernel memory. The application sends a request for a direct memory access operation. The request includes a location identifier of a location storing a data object in the first driver kernel memory. Based on the cookie structure, the second device driver performs, using the location identifier, the direct memory access operation to transfer the data object from the first driver kernel memory to a second driver kernel memory.

Abstract: Provided are techniques for allocating logical memory corresponding to a logical partition in a computing system; generating, a S/W PET data structure corresponding to a first page of the logical memory, wherein the S/W PFT data structure comprises a field indicating that the corresponding first page of logical memory is a klock page; transmitting a request for a page of physical memory and the corresponding S/W PET data structure to hypervisor, allocating physical memory corresponding to the request; and, in response to a pageout request, paging out available logical memory corresponding to the logical partition that does not indicate that the corresponding page is a klock page prior to paging out the first page.

Abstract: A processor unit removes, responsive to obtaining a new address, an entry from a memory of a type of memory based on a comparison of a performance of the type of memory to different performances, each of the different performances associated with a number of other types of memory.

Abstract: Various embodiments disclosed herein including systems and methods for improving allocation of computing resources in a virtual machine (VM) environment. Embodiments maintain data relating to how VM image data is stored in storage devices and loaded into volatile memory such as random access memory (RAM). The data is then used to identify common content in the volatile memory that can be shared across VM instances. In some embodiments, multiple VM instances can share at least a portion of a single common VM image loaded into a shared volatile memory.

Abstract: Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests.

Abstract: A method and a computer system for memory management on a virtual machine system are provided. The memory management method includes the following steps. A least recently used (LRU) list is maintained by at least one processor according to a last access time, wherein the LRU list includes a plurality of memory pages. A first portion of the memory pages are stored in a virtual memory, a second portion of the memory pages are stored in a zram driver, and a third portion of the memory pages are stored in at least one swap disk. A space in the zram driver is set by the at least one processor. The space in the zram driver is adjusted by the processor according to a plurality of access probabilities of the memory pages in the zram driver, an overhead of a pseudo page fault, and an overhead of a true page fault.

Abstract: Some implementations may include a memory management system in a virtualized environment that includes a virtual address, a virtual machine exposed by a virtual machine monitor, a translation lookaside buffer to store virtual address to physical address translations, and a memory protection unit to verify whether a physical address obtained from the virtual address is within boundaries of one or more physical system memory regions assigned to a virtual machine.

Abstract: An address translation capability is provided in which translation structures of different types are used to translate memory addresses from one format to another format. Multiple translation structure formats (e.g., multiple page table formats, such as hash page tables and hierarchical page tables) are concurrently supported in a system configuration. This facilitates provision of guest access in virtualized operating systems, and/or the mixing of translation formats to better match the data access patterns being translated.

Abstract: A system configuration is provided with multiple partitions that supports different types of address translation structure formats. The configuration may include partitions that use a single level of translation and those that use a nested level of translation. Further, differing types of translation structures may be used. The different partitions are supported by a single hypervisor.

Abstract: An address translation capability is provided in which translation structures of different types are used to translate memory addresses from one format to another format. Multiple translation structure formats (e.g., multiple page table formats, such as hash page tables and hierarchical page tables) are concurrently supported in a system configuration. For a system configuration that includes partitions, the translation mechanism to be used for a partition or a portion thereof is selectable and may be different for different partitions or even portions within a partition.

Abstract: A system configuration is provided with a paravirtualizing hypervisor that supports different types of guests, including those that use a single level of translation and those that use a nested level of translation. When an address translation fault occurs during a nested level of translation, an indication of the fault is received by an adjunct component. The adjunct component addresses the address translation fault, at least in part, on behalf of the guest.

Abstract: An address translation capability is provided in which translation structures of different types are used to translate memory addresses from one format to another format. Multiple translation structure formats (e.g., multiple page table formats, such as hash page tables and hierarchical page tables) are concurrently supported in a system configuration. For a system configuration that includes partitions, the translation mechanism to be used for a partition or a portion thereof is selectable and may be different for different partitions or even portions within a partition.

Abstract: A system configuration is provided that includes multiple partitions that have differing translation mechanisms associated therewith. For instance, one partition has associated therewith a single level translation mechanism for translating guest virtual addresses to host physical addresses, and another partition has a nested level translation mechanism for translating guest virtual addresses to host physical addresses. The different translation mechanisms and partitions are supported by a single hypervisor. Although the hypervisor is a paravirtualized hypervisor, it provides full virtualization for those partitions using nested level translations.

Abstract: A system configuration is provided that includes multiple partitions that have differing translation mechanisms associated therewith. For instance, one partition has associated therewith a single level translation mechanism for translating guest virtual addresses to host physical addresses, and another partition has a nested level translation mechanism for translating guest virtual addresses to host physical addresses. The different translation mechanisms and partitions are supported by a single hypervisor. Although the hypervisor is a paravirtualized hypervisor, it provides full virtualization for those partitions using nested level translations.

Abstract: Various operations are disclosed for improving the operational efficiency of a virtual translation look-aside buffer (TLB) in a virtual machine environment. For example, operations are disclosed that allow for determination of whether present entries in shadow page tables (SPTs) are stale by comparing shadowed guest page table (GPT) entries against snapshots taken when the entries were cached. Other operations are disclosed that allow a virtual machine monitor (VMM) to access shadow page table trees (SPTTs) by walking trees in software or in hardware. Still other operations are disclosed allowing the VMM to use a hash table to relate GVA ranges to SPTs that map them, thus significantly reducing the cost of having to walk each SPTT in order to invalidate desired GVA(s). And, finally, operations are disclosed allowing the VMM to determine global GVA ranges by checking a bitmap, when invalidating global GVAs.

Abstract: The amount of virtual disk space available for use by software executing within a virtual machine (VM) may be dynamically adjusted while the VM is running in a virtual computer system. A method for reservation of disk space from a virtual machine is provided. A request is received at a first VM relating to reserving a portion of a virtual disk used by the first VM. In response, the first VM allocates additional storage in the virtual disk to a guest file stored in the virtual disk, wherein the guest file is not used to store meaningful data and then communicates sectors of the virtual disk corresponding to the additional storage to the virtualization layer. The virtualization layer provides to a second VM access to sectors of the physical storage space that correspond to the sectors of the virtual disk that were allocated as additional storage to the guest file.

Abstract: A system and method in one embodiment includes modules for detecting an access attempt to a critical address space (CAS) of a guest operating system (OS) that has implemented address space layout randomization in a hypervisor environment, identifying a process attempting the access, and taking an action if the process is not permitted to access the CAS. The action can be selected from: reporting the access to a management console of the hypervisor, providing a recommendation to the guest OS, and automatically taking an action within the guest OS. Other embodiments include identifying a machine address corresponding to the CAS by forcing a page fault in the guest OS, resolving a guest physical address from a guest virtual address corresponding to the CAS, and mapping the machine address to the guest physical address.

Abstract: A method for monitoring and managing virtual machine image storage in a virtualized computing environment is proposed, where the method for managing storage utilized by a virtual machine can include identifying one or more unused disk blocks in a guest virtual machine image, and removing the unused disk blocks from the guest virtual machine image.

Abstract: A memory system including a plurality of first blocks provided for storing user information therein, to which first physical addresses which are not duplicate are assigned, respectively, a plurality of second blocks provided for individually storing therein the first physical addresses of initial defective blocks out of the plurality of first blocks, and a plurality of third blocks provided for individually storing therein the first physical addresses of late defective blocks out of the plurality of first blocks. The memory system further includes a computing device for obtaining the first physical address corresponding to a logical address on the basis of the logical address, information stored in the second blocks, and information stored in the third blocks.

Abstract: Systems and methods for texture processing are presented. In one embodiment a texture method includes creating a sparse texture residency translation map; performing a probe process utilizing the sparse texture residency translation map information to return a finest LOD that contains the texels for a texture lookup operation; and performing the texture lookup operation utilizing the finest LOD. In one exemplary implementation, the finest LOD is utilized as a minimum LOD clamp during the texture lookup operation. A finest LOD number indicates a minimum resident LOD and a sparse texture residency translation map includes one finest LOD number per tile of a sparse texture. The sparse texture residency translation can indicate a minimum resident LOD.

Abstract: Embodiments disclosed herein provide systems and method for storing metadata to unused portions of a virtual disk file. In a particular embodiment, a method provides selecting a virtual disk file stored on a data storage volume and identifying unused portions of the virtual disk file. The method further provides writing metadata for the virtual disk file in the unused portions of the virtual disk file.

Abstract: Embodiments of techniques and systems for execution of code with multiple page tables are described. In embodiments, a heterogenous system utilizing multiple processors may use multiple page tables to selectively execute appropriate ones of different versions of executable code. The system may be configured to support use of function pointers to virtual memory addresses. In embodiments, a virtual memory address may be mapped, such as during a code fetch. In embodiments, when a processor seeks to perform a code fetch using the function pointer, a page table associated with the processor may be used to translate the virtual memory address to a physical memory address where code executable by the processor may be found. Usage of multiple page tables may allow the system to support function pointers while utilizing only one virtual memory address for each function that is pointed to. Other embodiments may be described and claimed.

Abstract: A method for transferring guest physical memory from a source host to a destination host during live migration of a virtual machine (VM) involves creating a file on a shared datastore, the file on the shared datastore being accessible to both the source host and the destination host. Pages of the guest physical memory are transferred from the source host to the destination host over a network connection and pages of the guest physical memory are written to the file so that the destination host can retrieve the written guest physical pages from the file.

Abstract: A method includes assigning unique guest identifications to different guests, specifying an address region and permissions for the different guests and controlling a guest jump from one physical memory segment to a second physical memory segment through operational permissions defined in a root memory management unit that supports guest isolation and protection.

Abstract: A virtual input/output memory management unit (IOMMU) is configured to provide a firewall around memory requests associated with an input/output (I/O) device. The virtual IOMMU uses data structures including a guest page table, a host page table and a general control register (i.e., GCR3) table. The guest page table is implemented in hardware to support the speed requirements of the virtual IOMMU. The GCR3 table is indexed using a virtual DeviceID parameter stored in a device table.

Abstract: Described are methods and systems for dynamically reallocating memory amongst virtual machines executing within a virtualization environment. A computer can execute a virtualization environment that can include one or more virtual machines and that can include a memory manager. The memory manager can dynamically reallocate memory by identifying a maximum and minimum memory value for each virtual machine, determining a target memory value for each virtual machine using the maximum and minimum memory value, and identifying one or more virtual machines that have an actual memory usage value that is less than the target memory value calculated for those virtual machines. To re-allocate the memory, the memory manager can allocate additional memory to the identified virtual machines by inflating a balloon driver, then de-allocate the additional memory, and reallocate the de-allocated, additional memory to other virtual machines within the virtualization environment.

Abstract: A virtualization platform provides fault tolerance for a primary virtual machine by continuously transmitting checkpoint information of the primary virtual machine to a collector process, such as a backup virtual machine. When implemented on a hardware platform comprising a multi-processor that supports nested page tables, the virtualization platform leverages the nested page table support to quickly identify memory pages that have been modified between checkpoints. The backup virtual machine provides feedback information to assist the virtualization platform in identifying candidate memory pages for transmitting actual modifications to the memory pages rather than the entire memory page as part of the checkpoint information. The virtualization platform further maintains a modification history data structure to identify memory pages that can be transmitted simultaneous with the execution of the primary virtual machine rather than while the primary virtual machine has been stunned.

Abstract: The present invention relates to a memory management system in a virtualized environment. The system comprises a virtual address, a buffer storage such as a translation lookaside buffer provided to store virtual address to physical address translations, a buffer storage such as a page table provided to store virtual address to real address translations and memory protection unit provided to verify whether a physical address obtained from the virtual address is within boundaries of one or more physical system memory regions assigned to a virtual machine.

Abstract: A method includes determining a capacity model that configures computing resource capacity for a capacity container. The computing resource capacity includes a first storage attribute for an amount of storage in a storage component. A load model is determined that configures load for the capacity container. The load includes a second storage attribute for a storage requirement for a virtual machine. A profile of a virtual machine unit is determined for estimating available capacity in a capacity container. The profile is determined using virtual machine attributes for a set of virtual machines, wherein the virtual machine unit includes a storage requirement based on storage requirements for the set of virtual machines. The profile of the virtual machine unit is fit into available capacity. A number of virtual machine units is determined based on the fitting, the number of virtual machine units being a measure of available capacity.

Abstract: In a computer system that can configure a virtual machine being able to transit to a hibernation state, data of a main memory of the virtual machine stored in an auxiliary storage device is reduced. At a point in time when the virtual machine has transitioned to a hibernation state, from consideration as to whether the data of the main memory of the virtual machine stored in the auxiliary storage device is unnecessary, data stored in the auxiliary storage device is rewritten in order to reduce the data.

Abstract: A method includes selectively routing a physical address to an originating device instead of to a shared memory at controller that manages conversion of device virtual addresses to physical addresses. The physical address corresponds to a data access from a virtual device. The method may provide local coherency at a computing system that implements virtualized input/output.

Abstract: In the computer system, a storage system provides a storage level virtual volume based on thin provisioning technology, to a physical server on which a virtual machine is defined. The storage system releases the area of the logical volume corresponding to the storage level virtual volume accessed by a virtual machine which is specified to be deleted, on the basis of storage level virtual volume conversion information which is managed by the storage system.

Abstract: According to one embodiment, a computer program product includes a computer readable storage medium having computer readable program code embodied therewith, the computer readable program code comprising: computer readable program code configured to receive a mount request to access at least one host data record on a virtual tape storage (VTS) system; computer readable program code configured to determine a number of host compressed data records per physical block on a magnetic tape medium; computer readable program code configured to determine a physical block ID (PBID) that corresponds to the requested at least one host data record; computer readable program code configured to access a physical block on the magnetic tape medium corresponding to the PBID; and computer readable program code configured to output the physical block without outputting an entire logical volume from the magnetic tape medium that the physical block is stored to. Other systems and computer program products are also described.