Abstract: A map updating system includes: an update processing unit for performing update processing by reading data required in the update processing from a cache area of a memory when the data are stored in the cache area and from a map database when the data are not stored in the cache area; a cache storage unit for storing the data read by the update processing unit in the cache area; a processing memory capacity determination unit for determining a processing memory capacity, which is a capacity of the memory required as an update processing area, on the basis of the content of map data to be subjected to the update processing; and a cache capacity determination unit for determining a cache capacity, which is a capacity of the memory allocated to the cache area, on the basis of the processing memory capacity.

Abstract: In an embodiment, a plurality of stack depths of a stack are sampled from all stack depths of the stack. An average of the plurality of stack depths is calculated. If a number of the plurality of stack depths is greater than a maximum sample threshold and the average of the plurality of stack depths is greater than or equal to a current depth of the stack, then pages are deallocated from the stack that are above the average of the plurality of stack depths. If the number of the plurality of stack depths is greater than the maximum sample threshold and the average of the plurality of stack depths is less than the current depth of the stack, then pages are deallocated from the stack that are above the current depth of the stack.

Abstract: Incoming data frames are parsed by a hardware component. Headers are extracted and stored in a first location along with a pointer to the associated payload. Payloads are stored in a single, contiguous memory location.

Abstract: An apparatus, system, and method are disclosed for managing data with an empty data segment directive at the storage device. The apparatus, system, and method for managing data include a write request receiver module and a data segment token storage module. The write request receiver module receives a storage request from a requesting device. The storage request includes a request to store a data segment in a storage device. The data segment includes a series of repeated, identical characters or a series of repeated, identical character strings. The data segment token storage module stores a data segment token in the storage device. The data segment token includes at least a data segment identifier and a data segment length. The data segment token is substantially free of data from the data segment.

Abstract: According to one embodiment, a multicore processor system includes: a memory region, and a multicore processor that includes plural cores, a first cache, and a second cache shared between the plural cores. The memory region permits first state in which exclusive use by using the first and second cache is granted to one core, second state in which exclusive use by using the second cache is granted to one core group, and third state in which use by using neither the first cache nor the second cache is granted to all core groups. A kernel unit writes back a first cache to the second cache when a transition of the memory region from the first state to the second state is made, and writes back a second cache to the memory region when a transition of the memory region from the second state to the third state is made.

Abstract: This invention is intended for the purpose of providing the storage system, the storage apparatus, and the storage system by which, even if the storage areas allocated to the virtual volume are managed in management units set by the RAID group, overhead for parity calculation does not become excessive. This invention, by releasing a specific management unit not fully utilized for page allocation from allocation to the virtual volume and migrating the allocated pages belonging to this specific management unit to the other management unit, makes the storage areas of the specific management unit available for the write accesses for the other virtual volumes from the host computer.

Abstract: A method, apparatus, and system of a priority command queues for low latency solid state drives are disclosed. In one embodiment, a system of a storage system includes a command sorter to determine a target storage device for at least one of a solid state drive (SSD) command and a hard disk drive (HDD) command and to place the command in a SSD ready queue if the SSD command is targeted to a SSD storage device of the storage system and to place the HDD command to a HDD ready queue if the HDD command is targeted to an HDD storage device of the storage system, a SSD ready queue to queue the SSD command targeted to the SSD storage device, and a HDD ready queue to queue the HDD command targeted to the HDD storage device.

Abstract: Provided is a storage system capable of saving actually used physical storage areas and of achieving a high speed in write processing. There is disclosed a computer system including a server and a storage system, in which physical storage areas of a disk drive are managed for each one or more physical blocks of predetermined sizes, and allocation of one or more physical blocks to a plurality of logical blocks of predetermined sizes is managed, and the storage system stores data written in a first logical block in a first physical block allocated to the first logical block and allocates the first physical block to a second logical block where the same data as the data stored in the first physical block is to be written.

Abstract: Embodiments of the present invention provide a method, system and computer program product for dynamic main memory reconfiguration in virtual memory management. In an embodiment of the invention, a method for dynamic main memory reconfiguration in virtual memory management can include receiving a memory access directive in a host computer, determining a low free space condition in a memory allocation to satisfy the memory access directive, augmenting the memory allocation with a mapping to additional memory in the host computer in lieu of page swapping in response to the low free space condition, and satisfying the memory access directive. Additionally, the method can include determining an excess free space condition in the memory allocation and removing from the memory allocation a selection of allocated memory in the host computer.

Abstract: In a distributed computing system that includes compute nodes that include computer memory, globally accessible memory space is administered by: for each compute node: mapping a memory region of a predefined size beginning at a predefined address; executing one or more memory management operations within the memory region, including, for each memory management operation executed within the memory region: executing the operation collectively by all compute nodes, where the operation includes a specification of one or more parameters and the parameters are the same across all compute nodes; receiving, by each compute node from a deterministic memory management module in response to the memory management operation, a return value, where the return value is the same across all compute nodes; entering, by each compute node after local completion of the memory management operation, a barrier; and when all compute nodes have entered the barrier, resuming execution.

Abstract: A memory system having a memory controller and several separate memory devices connected to the controller by a system bus. The memory devices each included an array of memory cells, addressing circuitry used to address the cells and an address storage circuit which stores a local address unique to each of the memory devices. The local addresses are sequentially assigned to the memory devices by selecting a first one of the devices and forwarding an address assign command to the selected device. A command decoder, having detected the address assign command, will permit a local address placed on the bus by the controller to be loaded into the selected memory device. This sequence will continue until all of the memory devices have been assigned local addresses at which time the memory devices can be accessed to perform memory read, program, erase and other operations.

Abstract: A detection module selects logically adjacent first and second control areas of a cluster. The detection module further determines that the first and second control areas satisfy a migration test wherein the first control area has free space exceeding a free threshold, the free space is at least equal to a space requirement for each second control area control interval, and the second control area has fewer control intervals than a control interval threshold. In addition, a copy module copies each second control area control interval to the first control area in response to determining that the first and second control areas satisfy the migration test.

Abstract: The invention relates to a method for selecting an available memory size of a circuit including at least a CPU and a total memory, the method includes a stage for the selection of an available memory size that is smaller than or equal to that of the total memory. The selection stage is implemented by the manufacturer of the product incorporating the said circuit, different from the circuit manufacturer, and includes a stage for the generation of a configuration signature intended for the circuit manufacturer, which information is representative of the size of available memory size selected in this way by the product manufacturer.

Abstract: A memory system is provided. The system includes an operating system kernel that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the kernel to regulate read and write access to the one or more FLASH devices.

Abstract: In a computer system that includes multiple nodes and multiple logical partitions, a dynamic partition manager computes current memory affinity and potential memory affinity to help determine whether a reallocation of resources between nodes may improve memory affinity for a logical partition or for the computer system. If so, the reallocation of resources is performed so memory affinity for the logical partition or computer system is improved. Memory affinity is computed relative to the physical layout of the resources according to a hardware domain hierarchy that includes a plurality of primary domains and a plurality of secondary domains.

Abstract: The present invention extends to methods, systems, and computer program products for asynchronously binding data from a data source to a data target. A user interface thread and a separate thread are used to enable the user interface thread to continue execution rather than blocking to obtain updated data, to which elements of a user interface that the user interface thread is managing, are bound. The separate thread obtains updated data from a data source, stores the updated data in a local cache, and notifies the user interface thread of the updated data's presence in the local cache. The user interface thread, upon detecting the notification, accesses the updated data in the local cache and populates the updated data into the user interface.

Abstract: A storage system for storage of data written from a computer, and when a write request of data to a first logical volume is received, the data on request is stored into the first logical volume. When a first-generation snapshot creation request is received, the data stored in the first logical volume at the time of receiving the first-generation snapshot creation request is written into a pool region as data corresponding to a first-generation snapshot, and when a second-generation snapshot creation request is received, any portion of the data updated after the first-generation snapshot creation request is received but before the second-generation snapshot creation request is issued is read from the first logical volume for writing into the pool region. Such a storage system favorably implements snapshot backup with no dependency with a positive volume in terms of performance and failure, and with high capacity efficiency.

Abstract: Systems and methods are disclosed for pre-fetching data into a cache memory system. These systems and methods comprise retrieving a portion of data from a system memory and storing a copy of the retrieved portion of data in a cache memory. These systems and methods further comprise monitoring data that has been placed into pre-fetch memory.

Abstract: Described in detail herein is a method of copying data of one or more virtual machines being hosted by one or more non-virtual machines. The method includes receiving an indication that specifies how to perform a copy of data of one or more virtual machines hosted by one or more virtual machine hosts. The method may include determining whether the one or more virtual machines are managed by a virtual machine manager that manages or facilitates management of the virtual machines. If so, the virtual machine manager is dynamically queried to automatically determine the virtual machines that it manages or that it facilitates management of. If not, a virtual machine host is dynamically queried to automatically determine the virtual machines that it hosts. The data of each virtual machine is then copied according to the specifications of the received indication.

Abstract: A programming and debugging system identifies one or more statically-allocated symbols in a symbol table for an inferior process. The statically-allocated symbols pertain to one or more structures for the inferior process. The inferior process has dynamic memory allocations in an inferior process memory space. The symbol table comprises data used to categorize the statically-allocated area of memory. The system locates the structures in the inferior process memory space and determines whether an address of the structures in the inferior process memory space matches an address of a block of the dynamically allocated area of memory. The system categorizes the block of dynamically allocated memory based on the determination of whether an address of the structures matches an address of a block of the dynamically allocated area of memory.

Abstract: According to one embodiment, a method for a compiler to produce an executable module to be executed by a computer system including a main processor and active memory devices includes dividing source code into code sections, identifying a first code section to be executed by the active memory devices, wherein the first code section is one of the code sections and identifying data structures that are used by the first code section. The method also includes classifying the data structures based on pre-defined attributes, formulating, by the compiler, a storage mapping plan for the data structures based on the classifying and generating, by the compiler, mapping code that implements the storage mapping plan, wherein the mapping code is part of the executable module and wherein the mapping code maps storing of the data structures to storage locations in the active memory devices.

Abstract: Memories having internal processors and methods of data communication within such memories are provided. One such memory may include a fetch unit configured to substantially control performing commands on a memory array based on the availability of banks to be accessed. The fetch unit may receive instructions including commands indicating whether data is to be read from or written to a bank, and the address of the data to be read from or written to the bank. The fetch unit may perform the commands based on the availability of the bank. In one embodiment, control logic communicates with the fetch unit when an activated bank is available. In another implementation, the fetch unit may wait for a bank to become available based on timers set to when a previous command in the activated bank has been performed.

Abstract: A solid-state storage system is described with a method for adjusting the frequency of data retention operations. The data retention operation frequency can be increased or decreased according to a variety of environmental factors such as error code frequency, system temperature, altitude, and other operating conditions. These factors can indicate an increased or decreased risk of failure and accordingly provide increased or decreased rates of data retention operations.

Abstract: A programming and debugging system determines a block of dynamically allocated memory in an inferior process memory space corresponds to a structure and casts the block of memory as an instance of the structure. The programming and debugging system determines a field type of a field in the instance of the structure and determines whether memory data pertaining to the block of dynamically allocated memory satisfies one or more criteria in heuristics data associated with the field type. The programming and debugging system categorizes the block of dynamically allocated memory based on the determination of whether the memory data satisfies the one or more criteria of the field type.

Abstract: Embodiments of the invention relate to storage allocation in a storage system. One embodiment includes generating a request for storage space allocation in a particular storage device by a first node. An owner node associated with the particular storage device is determined by a first allocation client associated with the first node. The request is sent by the first allocation client to a second allocation client associated with the owner node. A storage device allocation region of the particular storage device is created, the allocation region comprising a height proportional to storage devices the owner node and the second allocation client are coupled with, and a width that is inversely proportional to a number of nodes sharing the particular storage device.

Abstract: A device includes a memory including ways and a processor in communication with the memory. The processor is configured to execute logic. The logic can monitor a parameter of the processor or a device connected with the processor. The logic can allocate, based on the parameter, a number a ways and a size of ways of the memory for use by the processor. The logic can power down an unallocated number of ways and unused portions of the ways of the memory.

Abstract: A memory access monitoring method and a memory access monitoring method device are disclosed, The method comprises: performing coarse grain monitoring on local memory pages, if a hot page with coarse grain monitoring exists in the local memory pages, requesting an operating system to perform an optimized migration for the content of the hot page, and if a half hot page with coarse grain monitoring exists in the local memory pages, initiating fine grain monitoring to the half hot page; and performing fine grain monitoring on the half hot page, if a hot area with fine grain monitoring exists in the half hot page, requesting the operating system to perform an optimized migration for the content of the hot area.

Abstract: Techniques, methods, systems, and computer-readable media for allocating and managing dynamically obfuscated heap memory allocations are described. In one embodiment a memory manager in a data processing system contains an addressor, to determine a first address of a program object in a first memory address space, and one or more encoders, to abstract memory access to the program object using the first address such that layout of the object data in the first address space differs from the layout of the object in a second address space. In one embodiment, a runtime system modifies object code of an executable file to include encoder routines to abstract memory accesses to data in an obfuscated heap. In one embodiment, a compiler system using an intermediate representation of a high level program generates an intermediate representation of a high level program capable of performing memory writes and memory reads using obfuscation encoder routines.

Abstract: In accordance with the present disclosure, an information handling system for migrating digital assets may include a storage medium and a processor. The storage medium may be configured to store information regarding digital assets to be migrated from a source system to a target system. The processor may be configured to, for each of one or more digital assets of the source system, determine if the digital asset is a candidate for migration to a cloud storage provider. The processor may also be configured to, for each digital asset determined to be a candidate for migration to the cloud storage provider, determine if a user desires to migrate the digital asset to the cloud storage provider. The processor may further be configured to, for each digital asset the user desires to migrate to the cloud storage provider, transfer the digital asset from the source system to the cloud storage provider.

Abstract: Described are techniques for performing data migration for a source logical volume and a target. The target is configured as storage for another mirror of the source logical volume prior to copying data from the source logical volume to the target, and if the target is configured storage of another logical volume of the data storage system, the configured storage is remapped as storage for another mirror of the source logical volume prior to copying data from the source logical volume to the target. One or more invalid bits are set indicating that the target does not contain a valid copy of data from the source logical volume. Data is copied from the first mirror of the source logical volume to the target. Invalid bits are cleared as data portions of the first mirror of the source logical volume are copied to the target.

Abstract: In one embodiment, a tape drive system includes a file system adapted for enabling sequential access to data on a tape medium, a file access controller adapted for managing the data, the file access controller including logic adapted for writing a file on the tape medium, logic adapted for writing a pointer of the written file in an index of the tape medium, wherein the pointer is managed by the file access controller, logic adapted for creating a high resolution tape directory (HRTD) including detailed location information of data on the tape medium, and logic adapted for storing the HRTD as part of end of data (EOD) of the index when a tape cartridge housing the tape medium is unloaded. Other systems, methods, and computer program products are described according to more embodiments.

Abstract: A method for performing a static wear leveling on a flash memory is disclosed. Accordingly, a static wear leveling unit is disposed with a block reclamation unit of either a flash translation layer or a native file system in the flash memory, and utilizes less memory space to trace a distribution status of block leveling cycles of each physical block of the flash memory. Based on the distribution record of the block leveling cycles, the number of the leveling cycles less than a premeditated threshold would be found while the system idles. Then the static wear leveling unit requests the block reclamation unit to level the found blocks. Before leveling the found block, the rarely updated data is compelled to move from one block to another block which is leveled frequently, whereby accurate wear leveling cycles for the blocks can be averaged extremely.

Abstract: An integrated data center combines a storage controller and appliances onto a computer platform. Storage controller component executes on the computer platform with exclusive access to a first storage controller host bus adapter coupled to a storage shelf A virtualized instance of the hardware from the computer platform is provisioned to deliver application services from an appliance component which may share the processing resources from the computer platform through different virtual machines. An appliance host bus adapter from the computer platform is exclusively associated to the appliance component. This provides the appliance component exclusive control of the appliance host bus adapter passing through the virtualized instance of the hardware. To access the storage devices, appliance host bus adapter and corresponding appliance component are coupled with a second storage controller host bus adapter associated with the storage controller component.

Abstract: One or more techniques and/or systems are provided for generating a macroscopic cluster view of storage devices, as opposed to merely an isolated view from an individual node. For example, nodes within a node cluster may be queried for storage device reports comprising storage device information regarding storage devices with which the nodes are respectively connected (e.g., I/O performance statistics, path connections, storage device attributes, status, error history, etc.). The storage device reports may be aggregated together to define one or more storage device data structures (e.g., a storage device data structure comprising one or more tables that may be populated with storage device information). In this way, the cluster view may be generated based upon querying one or more storage device data structures (e.g., an error cluster view, a storage device cluster view, a node summary cluster view, etc.).

Abstract: A system configuration is provided with multiple partitions that supports different types of address translation structure formats. The configuration may include partitions that use a single level of translation and those that use a nested level of translation. Further, differing types of translation structures may be used. The different partitions are supported by a single hypervisor.

Abstract: A method begins by a processing module determining an imbalance between inode utilization and data storage utilization. When the imbalance compares unfavorably to an imbalance threshold, the method continues with the processing module determining whether utilization of another inode memory and utilization of another corresponding data storage memory are not imbalanced. When the utilization of the other inode memory and the utilization of the other corresponding data storage memory are not imbalanced, determining whether the inode utilization is out of balance with respect to the data storage utilization. When the inode utilization is out of balance, the method continues with the processing module transferring data objects from a data storage memory to the other corresponding data storage memory and transferring mapping information of data objects from a inode memory to the other inode memory.

Abstract: An object of the present invention is to allocate a volume to an appropriate tier in a pool in accordance with the performance of the volume. Multiple tiers 1K are created in a pool 1B. A pool volume that matches the performance required by a tier is allocated to each tier. An information acquisition part 1D acquires information related to respective storage apparatuses 1, 2, and information related to the performance of each volume. A tier control part 1E allocates a pool volume to any tier of the respective tiers, based on the performance information.

Abstract: A datastore for a virtual machine that can be executed on a host computer networked to a physical storage system is allocated by a server. The server generates a unique identifier to associate with the datastore, wherein the unique identifier mimics a form of identifier that is generated by the physical storage system to identify volumes of physical storage in the physical storage system that are accessible to the host computer. At least one volume of physical storage in the physical storage system having physical storage available to satisfy the request to allocate the datastore is identified and the server maintains a mapping of the unique identifier to the at least one volume of physical storage and provides the mapping to the host computer upon running the virtual machine, thereby enabling the host computer to store data for the datastore in the at least one volume of physical storage.

Abstract: In one embodiment, a system wide static global stack pool in a contiguous range of random access memory is generated, a block of memory in the system global pool is assigned to a thread of a running process, and the thread stores local variable information in static global stack pool, such that the local variable is hidden from a stack frame back-trace. In one embodiment, a dynamically allocated data structure in system heap memory is generated, the data structure is locked to ensure atomic access, a block of memory in the data structure is assigned to a thread of a process, the data structure is unlocked, and the thread stores local variable information in static global stack pool, such that the local variable is hidden from a stack frame back-trace.

Abstract: A virtualized computer system employs a virtual disk. Multiple snapshots of the virtual disk can be created. After a snapshot is created, writes to the virtual disk are captured in delta disks. Two snapshots are consolidated by updating block references in snapshot meta data. Block reference update takes advantage of the fact that blocks for the two snapshot are managed within the same storage container and, therefore, can be moved in the snapshot logical space without incurring data copy operations. Consolidation of delta disks also gracefully handles failures during the consolidation operation and can be restarted anew after the system has recovered from failure.

Abstract: A method and system is disclosed for storage optimization of thin provisioning. Non-zero data units within data portions are re-allocated to specifically designated one or more areas in the physical storage space and the physical address of the non-zero data unit within the designated area is associated with the logical address of the non-zero data unit. In case the data portion is allocated to the physical storage, the physical storage space initially allocated to the data portion is returned to the pool of available physical storage space, thereby freeing the storage space for storing other data.

Abstract: A method begins by a processing module determining an imbalance between inode memory utilization and data storage memory utilization. When the imbalance compares unfavorably to an imbalance threshold, the method continues with the processing module determining whether the inode memory utilization is out of balance with respect to the data storage memory utilization or whether the data storage memory utilization is out of balance with respect to the inode memory utilization. When the inode memory utilization is out of balance with respect to the data storage memory utilization, the method continues with the processing module transferring a set of data objects from a data object section to a data block section and transferring object mapping information of the set of data objects into block mapping information for the set of data objects.

Abstract: A method for handling a request of storage on a serial fabric comprising formatting an address for communication on a serial fabric into a plurality of fields including a field comprising at least one set selection bit and a field comprising at least one tag bit. The address is communicated on the serial fabric with the field comprising the at least one set selection bit communicated first.

Abstract: Effects of a physical memory fault are mitigated. In one example, to facilitate mitigation, memory is allocated to processing entities of a computing environment, such as applications, operating systems, or virtual machines, in a manner that minimizes impact to the computing environment in the event of a memory failure. Allocation includes using memory structure information, including, information regarding fault containment zones, to allocate memory to the processing entities. By allocating memory based on fault containment zones, a fault only affects a minimum number of processing entities.

Abstract: Various embodiments are presented herein that reallocate partitions of a shared physical memory between processing units. An apparatus and a computer-implemented method may determine an amount of memory space in the physical memory allocated to a first processing unit during system initialization. The determined amount of the memory space may be consolidated. The consolidated memory space may be allocated to the second processing unit during runtime. Other embodiments are described and claimed.

Abstract: A second memory allocator receives a request to allocate memory from a second process of the second memory allocator executing on a computer, and determines that memory for allocation to the second process is not available from a memory hoard of the second memory allocator. The second memory allocator determines that memory for allocation to the second process is not available from an operating system of the computer, and transmits the request to release memory to a first memory allocator. The first memory allocator of a first process executing on the computer receives the request from the second memory allocator executing on the computer to release memory. Responsive to the request from the second memory allocator to release memory, the first memory allocator releases hoarded memory previously hoarded for allocation to the first process.

Abstract: A bitmask array is implemented as a two dimensional bit array where each bit represents an allocated/free cell of the heap. Groups of bits of the bitmask array are assigned to implement commonly sized memory cell allocation requests. The heap manager keeps track of allocations by keeping separate lists of which groups are being used to implement commonly sized memory cell allocations requests by maintaining linked lists according to the number of cells allocated per request. Each list contains a list of the bit groups that have been used to provide allocations for particularly sized requests. By maintaining lists based on allocation size, the heap manager is able to cause new allocation requests to be matched up with previously retired allocations of the same size. Memory may be dynamically allocated between lists of differently sized memory requests.

Abstract: A packed command can be received at a storage device. The packed command can include an indicator of a source data location in the storage device and an indicator of a destination data location in the storage device. In response to receiving the packed command, a storage map table in the storage device can be updated. Also, a storage processing guide can be sent to a storage device. The processing guide can include a stream indicator associating the processing guide with a storage command stream. A set of storage commands can also be sent to the storage device. One or more of the commands in the set can each include a stream indicator that matches the stream indicator in the processing guide and identifies the command with the stream.

Abstract: Embodiments relate to methods, systems and computer program products for defragmenting storage class memory by comparing a utilization rate of the storage class memory to a threshold value. If the utilization rate of the storage class memory is greater than the threshold value, the potentially wasted storage space is then compared to the combined storage capacity of the unclaimed extents of the storage class memory. If the potentially wasted storage space is greater than the combined storage capacity of the unclaimed extents of the storage class memory, a determination is made whether a defragmentation was recently performed. Based on determining that the defragmentation was not recently performed, or that it was recently performed and was productive, performing a defragmentation of the storage class memory.

Abstract: A method for allocating resources of a storage system including at least a first and second group of storage devices. The method identifies a first set of resources to be reserved for use by the first group of storage devices, identifies a second set of resources to be reserved for use by the second group of storage devices, and identifies a third set of resources The method then allocates resources from the third set of resources to the first group of storage devices or the second group of storage device according to an allocation algorithm, and restricts use of the first set of resources to the first group of devices and use of the second set of resources to the second group of devices.