By Masking Or Reconfiguration Patents (Class 714/3)
  • Patent number: 9442811
    Abstract: Exemplary methods, apparatuses, and systems include receiving a command from a recovery manager running on a management server within a first or second datacenter. In response to the command, device identifiers for one or more logical storage devices within the first datacenter are requested. In response to the request, a first device identifier for a first logical storage device within the first datacenter and a peer device identifier for a second logical storage device within the second datacenter are received. Data is replicated from the first logical storage device to the second logical storage device. The first and second logical storage devices are in an active-passive configuration, the first logical storage device storing the replicated data being active and the second logical storage device storing the replicated data being passive. The command with the peer device identifier is sent to the underlying storage.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: September 13, 2016
    Assignee: VMware, Inc.
    Inventors: Aleksey Pershin, Sriram Krishnan, Giridharan Sugabrahmam
  • Patent number: 9430391
    Abstract: Existing multiprocessor computing systems often have insufficient memory coherency and, consequently, are unable to efficiently utilize separate memory systems. Specifically, a CPU cannot effectively write to a block of memory and then have a GPU access that memory unless there is explicit synchronization. In addition, because the GPU is forced to statically split memory locations between itself and the CPU, existing multiprocessor computing systems are unable to efficiently utilize the separate memory systems. Embodiments described herein overcome these deficiencies by receiving a notification within the GPU that the CPU has finished processing data that is stored in coherent memory, and invalidating data in the CPU caches that the GPU has finished processing from the coherent memory. Embodiments described herein also include dynamically partitioning a GPU memory into coherent memory and local memory through use of a probe filter.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: August 30, 2016
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Anthony Asaro, Kevin Normoyle, Mark Hummel
  • Patent number: 9417950
    Abstract: A computer hardware-implemented method, system, and/or computer program product prevents a cascading failure in a complex stream computer system causing an untrustworthy output from the complex stream computer system. Multiple upstream subcomponents in a complex stream computer system generate multiple outputs, which are used as inputs to a downstream subcomponent, wherein the multiple upstream subcomponents execute upstream computational processes. Each upstream computational process is examined to determine an accuracy of each identified output. An accuracy value is assigned to each of the multiple outputs from the upstream subcomponents, and weighting values are assigned to each of the inputs to the downstream subcomponent. If using the accuracy values and weighting values fails to adjust the downstream subcomponent to meet a predefined trustworthiness level for making a first type of prediction, then a new downstream computational process that produces a different second type of prediction is executed.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: August 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Robert R. Friedlander, James R. Kraemer, Justyna M. Nowak, Elizabeth V. Woodward
  • Patent number: 9411605
    Abstract: Loading and executing a device-less and system agnostic Unified Extensible Firmware Interface (UEFI) driver configured to filter inputs/outputs (I/O) to storage devices without requiring dependency on a Peripheral Component Interconnect (PCI) type device and/or modifying a system UEFI Basic Input/Output System (BIOS), thereby enabling a software only product supporting booting of an Operating System (OS).
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: August 9, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Pradeep Bisht
  • Patent number: 9405553
    Abstract: Stream applications may inefficiently use the hardware resources that execute the processing elements of the data stream. For example, a compute node may host four processing elements and execute each using a CPU. However, other CPUs on the compute node may sit idle. To take advantage of these available hardware resources, a stream programmer may identify one or more processing elements that may be cloned. The cloned processing elements may be used to generate a different execution path that is parallel to the execution path that includes the original processing elements. Because the cloned processing elements contain the same operators as the original processing elements, the data stream that was previously flowing through only the original processing element may be split and sent through both the original and cloned processing elements. In this manner, the parallel execution path may use underutilized hardware resources to increase the throughput of the data stream.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: August 2, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael J. Branson, Ryan K. Cradick, John M. Santosuosso, Brandon W. Schulz
  • Patent number: 9407447
    Abstract: A multicast message replication method and apparatus are provided. The method includes: step 1. storing a received message in a message cache module, and an inter-port replication module acquiring a cache address of the message, inter-port replication information of the message, and inner-port replication information of the message, replicating the cache address according to the inter-port replication information, and transmitting the replicated cache address and the corresponding inner-port replication information to a port queue module to be stored; step 2. a port scheduling module scheduling the cache address of the port queue module, and under the scheduling by the port scheduling module, the port queue module outputting a cache address for which message replication needs to be performed according to the stored corresponding inner-port replication information; step 3. the message cache module reading a corresponding message according to the cache address output by the port queue module and outputting.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: August 2, 2016
    Assignee: ZTE Corporation
    Inventors: Fan Ouyang, Changsheng Chen, Jianli Liu, Bian Wu, Hengqi Liu, Fengbo Wu
  • Patent number: 9372786
    Abstract: Disclosed are various embodiments for a state monitoring application. A state monitoring application initiates the execution of test operations on a client device. States of the client device are monitored to determine when the client device is at risk of entering an unresponsive state. When the client device is at risk, the state monitoring application initiates the execution of remedy operations to prevent the client device from becoming unresponsive.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: June 21, 2016
    Assignee: Amazon Technologies, Inc.
    Inventors: Zahur A. Peracha, Calvin Y. Kuo
  • Patent number: 9361045
    Abstract: Techniques for constructing virtual storage networks for tenants with quality-of-service delivery. In one example, a method comprises the following steps. One or more virtual storage networks are constructed respectively for one or more tenants of a data storage system. Each of the one or more virtual storage networks is tenant-managed and is configured such that logical resources of the tenant-managed virtual storage network are isolated from physical resources used to implement the logical resources.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: June 7, 2016
    Assignee: EMC Corporation
    Inventors: Ziye Yang, Chenhui Fan, Stephen Todd
  • Patent number: 9329939
    Abstract: Provided is a two-way RAID controlled storage device of a serial attached small computer system interface/serial advanced technology attachment (SAS/SATA) type, which provides data storage/reading services through a PCI-Express interface. The RAID controller typically includes a plurality of disk mounts coupled disk connect controller, which itself is coupled to a set (e.g., at least one) of PCI-Express SSD memory disk units. In a typical embodiment, the plurality of PCI-Express SSD memory disk units comprising a plurality of volatile semiconductor memories. The RAID controller further comprises a plurality of disk monitoring units coupled to the plurality of disk mounts for monitoring the plurality of PCI-Express memory disk units; a plurality of disk plug and play controllers coupled to the plurality of disk monitoring units. A plurality of high-speed host interfaces are coupled to: the plurality of disk mounts, the plurality of disk monitoring units, and to a plurality of disk controllers.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: May 3, 2016
    Assignee: TAEJIN INFO TECH CO., LTD
    Inventor: Byungcheol Cho
  • Patent number: 9311176
    Abstract: A technique evaluates a set of storage devices (e.g., magnetic disk drives, solid state drives, etc.). The technique involves receiving, by processing circuitry (e.g., a storage processor, a standalone computer, etc.), storage device evaluation factors which (i) map possible storage device error events to individual weights and (ii) map cumulative weights to recommended activities. The technique further involves receiving, by the processing circuitry, a storage device error log containing storage device error entries identifying actual storage device error events which were encountered by the set of storage devices while performing data storage operations over a period of time. The technique further involves analyzing, by the processing circuitry, the storage device error entries based on the storage device evaluation factors to produce a set of evaluation results identifying a set of recommended activities to be performed on the set of storage devices.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: April 12, 2016
    Assignee: EMC Corporation
    Inventor: Muzhar S. Khokhar
  • Patent number: 9304879
    Abstract: Movement of storage access is orchestrated between systems by dynamically reconfiguring zoning of a storage fabric. A failover system can detect a failure of a first initiator system that is assigned to a target storage system using a zone table of one or more network switches that are communicatively coupled to the target storage system. Further, the failover system can reassign the target storage system to a second initiator system using the zone table in response to a detection of the failure of the first initiator system, wherein the second initiator system is determined to be communicatively coupled to the one or more network switches. Furthermore, the failover system can initiate an access, via the one or more network switches based on the zone table, of the target storage system by the second initiator system.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: April 5, 2016
    Assignee: OS NEXUS, INC.
    Inventor: Steven Michael Umbehocker
  • Patent number: 9274901
    Abstract: Clustered storage systems and methods are presented herein. One clustered storage system includes a logical volume comprising first and second pluralities of storage devices. The first plurality of storage devices is different from the second plurality of storage devices and includes at least the same data as the second plurality of devices. The storage system also includes a first storage node operable to process first I/O requests to the first plurality of storage devices and a second storage node communicatively coupled to the first storage node and operable to process second I/O requests to the second plurality of storage devices. An I/O request of the first I/O requests initiates a redirection condition that the first storage node detects. Then, based on the redirection condition, the first storage node directs the second storage node to process data of the I/O request.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: March 1, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Sridhar Rao Veerla, Naveen Krishnamurthy
  • Patent number: 9274150
    Abstract: A system includes a Synchrophasor Data Management System (SDMS), in which the SDMS includes a Synchrophasor Processor System (SPS). The SPS includes a Phasor Data Concentrator (PDC) configured to receive a first plurality of inputs from a first Phasor Measurement Unit (PMU), transform at least one of the first plurality of inputs into a first time aligned output by time aligning the at least one of the first plurality of inputs. The SPS further includes a virtual PMU configured to aggregate the first time aligned output into a PMU dataset, in which the SPS is configured to transmit the PMU dataset to a second PMU, an external PDC, a super PDC, or a combination thereof.
    Type: Grant
    Filed: December 9, 2012
    Date of Patent: March 1, 2016
    Assignee: General Electric Company
    Inventors: Mitalkumar Gulabrai Kanabar, Oscar Lopez Aguirre, Rodrigo Gutierrez Argandona, Jason Antonio Rodrigues, Mark Gerard Adamiak
  • Patent number: 9244826
    Abstract: Profile properties in a partition profile are user-configurable through a management entity such as a management console. A partition manager calculates a secondary processing unit entitlement for a logical partition based in part on a secondary processing unit mode property in the partition profile. The secondary processing unit entitlement may be smaller than a primary processing unit entitlement for the logical partition. The partition manager reserves processing units from a secondary shared processor pool equal to the logical partition's secondary entitlement for the logical partition. The primary and secondary processing unit entitlements may be stored in primary and secondary configuration data structures associated with the logical partition. The partition manager may relocate the logical partition to the secondary shared processor pool in response to a predetermined condition.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 26, 2016
    Assignee: International Business Machines Corporation
    Inventors: Naresh Nayar, Geraint North, Bryan M. Logan
  • Patent number: 9244825
    Abstract: Profile properties in a partition profile are user-configurable through a management entity such as a management console. A partition manager calculates a secondary processing unit entitlement for a logical partition based in part on a secondary processing unit mode property in the partition profile. The secondary processing unit entitlement may be smaller than a primary processing unit entitlement for the logical partition. The partition manager reserves processing units from a secondary shared processor pool equal to the logical partition's secondary entitlement for the logical partition. The primary and secondary processing unit entitlements may be stored in primary and secondary configuration data structures associated with the logical partition. The partition manager may relocate the logical partition to the secondary shared processor pool in response to a predetermined condition.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 26, 2016
    Assignee: International Business Machines Corporation
    Inventors: Naresh Nayar, Geraint North, Bryan M. Logan
  • Patent number: 9244773
    Abstract: An information processing apparatus that performs a startup control of redundantly configured modules includes a memory to retain abnormality information regarding an abnormality that occurs at time of startup control of the modules, and a startup controller section executing a startup process by sequentially executing the process, generating the abnormality information, determining whether a reduced operation is possible or not when the module in which an abnormality occurs at the time of startup control is detected, completing an execution of the process block in progress when it is determined that the reduced operation is possible, executing a restart process on a module selected from all the modules in which abnormalities occur at the time of startup control based on the abnormality information and completing an execution of the process block in progress after completing the restart process when determined that the reduced operation is not possible.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: January 26, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Hidefumi Kobayashi, Tatsuya Yanagisawa
  • Patent number: 9239870
    Abstract: A database is automatically configured for recovery. Operating system compatibility, system recovery compatibility, and database server compatibility is verified. If the system recovery configuration is not compatible, then the system recovery configuration is updated. If the database server configuration is not compatible, then the database server configuration is updated.
    Type: Grant
    Filed: May 8, 2013
    Date of Patent: January 19, 2016
    Assignee: CA, Inc.
    Inventors: Guoxian Shang, Guodong Li, Haiyang Zhang
  • Patent number: 9235486
    Abstract: Techniques for spare storage pool management are disclosed. In one particular embodiment, the techniques may be realized as a method for spare storage pool management comprising receiving spare storage configuration information for a storage drive pool comprising a plurality of storage drives, maintaining spare storage mapping information to spare storage within the storage drive pool based at least in part on the spare storage configuration information, monitoring spare storage within the storage drive pool for detecting block failures within the storage drive pool, detecting a failure of a block in a first storage drive of the plurality of storage drives, and updating the spare storage mapping information associated with the failed block in the first storage drive to map to a spare block in a second storage drive of the plurality of storage drives.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: January 12, 2016
    Assignee: Symantec Corporation
    Inventors: Jim Casaburi, William Allen
  • Patent number: 9219562
    Abstract: Systems, methods, apparatuses, and computer program products for dynamically redistributing timing and synchronization in a packet switched network are provided. One method includes creating, by a slave node, a peer list comprising an identifier of at least one peer slave node that shares a same master node as the slave node or that has a certain predefined affinity with the slave node. The method may also include announcing a holdover time of the slave node to the at least one peer slave node, and, when a predefined event occurs, announcing to the at least one peer slave node that the slave node is taking on a mini-master role for at least the announced holdover time.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: December 22, 2015
    Assignee: NOKIA SOLUTIONS AND NETWORKS OY
    Inventor: David Chen
  • Patent number: 9128841
    Abstract: A system and method provide vital shutdown of a remote slave unit linked by a fiber optic connection to a local, checked redundant master unit with two paired computers. Each computer sends a life signal to an associated local vital supervision card (VSC) and copper to fiber converter (C/F converter) for transmission via fiber to a corresponding fiber to copper converter (F/C converter) on the slave unit, then to a corresponding remote VSC. Each local VSC controls power to a corresponding second local VSC-associated C/F converter, and each remote VSC controls power to a corresponding second remote VSC F/C converter. A VSC detecting an incorrect life signal signature removes power to the corresponding controlled converter and, optionally, to a respective local or remote I/O rack, thereby shutting down the slave unit.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: September 8, 2015
    Assignee: Thales Canada Inc.
    Inventors: Cameron Fraser, Abe Kanner, Serge Kniazev
  • Patent number: 9088299
    Abstract: An approach for encoding a physical layer (PL) header of a PL data frame is provided. The PL header comprises sixteen information bits ui, (i=0, 1, 2, . . . , 15), and the encoding is based on a convolutional code, whereby, for each information bit, five associated parity bits pi,k, (k=0, 1, 2, 3, 4) are generated, resulting in 80 codebits. The resulting 80 codebits are punctured to form a (16,77) codeword (c0, c1, c2, . . . , c76). The codebits of the (16,77) codeword are repeated to generate a (16,154) physical layer signaling codeword (c0, c0, c1, c1, c2, c2, . . . , c76, c76) for transmission of the PL data frame over a channel of a communications network.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: July 21, 2015
    Assignee: Hughes Network Systems, LLC
    Inventors: Mustafa Eroz, Yezdi Antia, Lin-Nan Lee
  • Patent number: 9043575
    Abstract: A partition manager relocates a logical partition from a primary shared processor pool to a secondary shared processor pool in response to a predetermined condition, such as a hardware failure. The relocated logical partition is allocated a smaller quantity of processing units from the secondary pool than it was allocated from the primary pool. A quantity of processing units reserved for a second logical partition is identified in the secondary shared processor pool, and a portion of those reserved processing units are allocated to the relocated logical partition. The reserved processing units may be redistributed among multiple relocated logical partitions.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 26, 2015
    Assignee: International Business Machines Corporation
    Inventors: Naresh Nayar, Geraint North, Bryan M. Logan
  • Patent number: 9032180
    Abstract: A primary processing unit entitlement is determined for a logical partition. A smaller secondary processing unit entitlement is also determined. A partition manager allocates primary processing units to the logical partition from a primary shared processor pool, and the logical partition is activated. The secondary processing units are reserved for the logical partition from a secondary shared processor pool, and the logical partition can be relocated to the secondary shared processor pool in response to a condition such as a hardware failure. The logical partition can continue to process its workload with the fewer processor resources, and can be restored to the primary processing unit entitlement.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 12, 2015
    Assignee: International Business Machines Corporation
    Inventors: Naresh Nayar, Geraint North, Bryan M. Logan
  • Publication number: 20150121121
    Abstract: Embodiments of the present invention disclose an apparatus and method for recovering a data signal in a digital transmission. A computer processor receives a data signal from a data signal input wire. The computer processor receives an external clock signal. The computer processor samples a binary bit of the data signal multiple times per clock cycle. The computer processor determines, for each sampling group, a sample and a quality measurement. The computer processor stores, for each sampling group, the sample and the quality measurement into a set of memory elements. The computer processor stores the sample from each sampling group into a first and a second delay chain. The computer processor determines a current sampling point. The computer processor transmits output corresponding to a content of the current sampling point to a data signal output wire.
    Type: Application
    Filed: January 22, 2014
    Publication date: April 30, 2015
    Applicant: International Business Machines Corporation
    Inventors: Markus Cebulla, Rolf Fritz, Cedric Lichtenau
  • Publication number: 20150113311
    Abstract: A storage control apparatus includes an uncorrectable error generation flag management section configured to manage an uncorrectable error generation flag in a memory configured to store a first error detection and correction code corresponding to a first data unit, and a second error detection and correction code corresponding to a second data unit including first data units, the uncorrectable error generation flag representing whether or not an uncorrectable error with the first code has occurred, the uncorrectable error generation flag being managed for each second data unit, a controller configured to prohibit access to the second data unit representing that the uncorrectable error has occurred when a command for the access with data change is issued, and a correction section configured to use the second code to correct the second data unit when the second data unit representing that the uncorrectable error has occurred is restored.
    Type: Application
    Filed: September 16, 2014
    Publication date: April 23, 2015
    Inventor: Kenichi Nakanishi
  • Patent number: 9015519
    Abstract: A method and system for load balancing. The method includes determining that connectivity between a first host and a primary array controller of a storage system has failed. The first host is configured to send input/output messages (I/Os) to a storage system through a storage network fabric. An available host is discovered at a multi-pathing driver of the first host. The available host is capable of delivering I/Os to the primary array controller. An I/O is redirected from said first host to the available host over a secondary communication network for delivery to the storage system.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: April 21, 2015
    Assignee: Symantec Corporation
    Inventors: Frederick Bosco Anthonisamy, Suhas Ashok Dantkale
  • Patent number: 9009528
    Abstract: The described embodiments include a processor that handles faults. The processor first receives an input vector, a control vector, and a predicate vector, each vector comprising a plurality of elements. Then, for a first element of the input vector for which corresponding elements of the control vector and the predicate vector are active, the processor performs a scalar read operation using an address from the element of the input vector. When a fault condition is encountered while performing the read operation, the processor determines if the element is a first element where a corresponding element of the control vector is active. If so (i.e., if the element is a first element where a corresponding element of the control vector is active), the processor processes the fault. Otherwise, the processor masks the fault for the element.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: April 14, 2015
    Assignee: Apple Inc.
    Inventor: Jeffry E. Gonion
  • Publication number: 20150100817
    Abstract: Anticipatory protection of critical jobs in a computing system, including: identifying, by a system management module, a problem computing component in the computing system; identifying, by the system management modules, all proximate computing components in the computing system, wherein each proximate computing component is within a predetermined physical proximity of the problem computing component; determining, by the system management module, whether the proximate computing components are executing one or more critical jobs; and responsive to determining that the proximate computing components are executing one or more critical jobs migrating, by the system management module, the one or more critical jobs to distant computing components in the computing system, wherein each distant computing component is not within the predetermined physical proximity of the problem computing component.
    Type: Application
    Filed: October 10, 2013
    Publication date: April 9, 2015
    Applicant: International Business Machines Corporation
    Inventors: Shareef F. Alshinnawi, Gary D. Cudak, Edward S. Suffern, J. Mark Weber
  • Publication number: 20150100816
    Abstract: Anticipatory protection of critical jobs in a computing system, including: identifying, by a system management module, a problem computing component in the computing system; identifying, by the system management modules, all proximate computing components in the computing system, wherein each proximate computing component is within a predetermined physical proximity of the problem computing component; determining, by the system management module, whether the proximate computing components are executing one or more critical jobs; and responsive to determining that the proximate computing components are executing one or more critical jobs migrating, by the system management module, the one or more critical jobs to distant computing components in the computing system, wherein each distant computing component is not within the predetermined physical proximity of the problem computing component.
    Type: Application
    Filed: October 8, 2013
    Publication date: April 9, 2015
    Applicant: International Business Machines Corporation
    Inventors: SHAREEF F. ALSHINNAWI, GARY D. CUDAK, EDWARD S. SUFFERN, J. MARK WEBER
  • Patent number: 9003222
    Abstract: Methods and arrangements for fault localization. Structural clusters for an environment are received, and configuration parameters and dependencies for components in the structural clusters are identified. A configuration map is built, and a configuration fault occurrence is ascertained.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: April 7, 2015
    Assignee: International Business Machines Corporation
    Inventors: Anuradha Bhamidipaty, Kalapriya Kannan
  • Patent number: 9003007
    Abstract: Administration of virtual machine affinity in a data center, where the data center includes a plurality of virtual machines (‘VMs’), each VM being a module of automated computing machinery installed upon a computer in the data center and characterized by a Universally Unique Identifier (‘UUID’), at least two of the VMs having an affinity requirement to be installed on separate computers, the data center further including a data center administration server operably coupled to the VMs, including communicating, by at least one of the VMs having an affinity requirement to the data center administration server, the UUIDs of the VMs having an affinity requirement; and moving by the data center administration server the VMs having an affinity requirement to separate computers in the data center.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: April 7, 2015
    Assignee: International Business Machines Corporation
    Inventor: Eric R. Kern
  • Publication number: 20150089270
    Abstract: A method, system, and computer program product for performing user-initiated logging and auto-correction in hardware/software systems. Embodiments commence upon identifying a set of test points and respective instrumentation components, then determining logging capabilities of the instrumentation components. The nature and extent of the capabilities and configuration of the components aid in generating labels to describe the various logging capabilities. The labels are then used in a user interface so as to obtain user-configurable settings which are also used in determining auto-correction actions. A measurement taken at a testpoint may result in detection of an occurrence of a certain condition, and auto-correction steps can be taken by retrieving a rulebase comprising a set of conditions corresponding to one or more measurements, and corrective actions corresponding to the one or more conditions.
    Type: Application
    Filed: September 19, 2014
    Publication date: March 26, 2015
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Chae Hun JEONG, Christopher Bartlett PAPINEAU, Pradip Kumar PANDEY, Gurbinder Singh BALI
  • Patent number: 8990608
    Abstract: An application is failed-over between containers on a single operating system instance. A container is associated with the application, and the application runs therein. An identifier of the container currently associated with the application is maintained as a member of the application group. A listing of a current state of each container is maintained, for example in a file. If the current container goes offline or faults, a separate container currently in an available state is identified, and the identifier of the current container in the application group is updated. The application is subsequently started-up in the separate, container, thereby failing-over the application between containers on the single operating system instance.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: March 24, 2015
    Assignee: Symantec Corporation
    Inventors: Setu Gupta, Sumit A. Mulewar
  • Patent number: 8990609
    Abstract: Disclosed are a cipher control method which supports to maintain a cipher mode between a network system and a terminal. The method of controlling an encryption includes: attempting a connection for operating a communication channel between a terminal and a network system; providing cipher information about a cipher algorithm operation of the terminal to the network system; determining whether the terminal is a problematic terminal operating an abnormal cipher algorithm by the networking system; and when the terminal is determined to be operating abnormal, instructing the terminal to perform a communication channel operation based on a normally operable cipher algorithm by the network system.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sanghyun Lee, Nohsun Kim
  • Patent number: 8984327
    Abstract: A computer readable storage medium with executable instructions specifies the execution of a state machine operating across a set of computing nodes in a distributed computing system. The executable instructions execute a set of operators, where the execution of each operator is under the control of a state machine that periodically invokes pause control states to pause the execution of an operator in response to a violation of a service level agreement specifying an operating condition threshold within the distributed computing system. Partitions of input data are formed that are worked on independently within the distributed computing system. A set of data batches associated with the input data is processed. Data partition control states to process the partitions associated with the set of data batches are specified. Key control states to process a set of keys associated with a data partition of the partitions are defined.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: March 17, 2015
    Assignee: Joviandata, Inc.
    Inventors: Parveen Jain, Satya Ramachandran, Sushil Thomas, Anupam Singh
  • Publication number: 20150074448
    Abstract: The present invention provides a cluster system that promptly stops access to a shared disk upon occurrence of abnormality. The cluster system is a cluster system where an active system server and a standby system server operate utilizing a shared disk. Each server includes: a disk input/output unit that accesses the shared disk by using data that is input and output via a predetermined bus; a fault detecting unit that, when a fault occurs in the active system server, detects the fault; and a bus closing unit that, when the fault detecting unit detects the fault, closes the bus by issuing an uncorrectable fault generation request to cause generation of an uncorrectable fault on the bus.
    Type: Application
    Filed: September 10, 2014
    Publication date: March 12, 2015
    Inventor: DAISUKE AGEISHI
  • Patent number: 8964527
    Abstract: Provided are a method, system, computer storage device, and storage area network for maintaining a communication path from a host to a storage subsystem in a network. A storage subsystem controls data transfer and access to a storage devices in a network including a switch and a host. A topological storage stores topological coupling relationship between the host and the switch and a topological coupling relationship between the switch and the storage subsystem. In response to determining a failed path, the storage subsystem determines a first port on the storage subsystem in the failed path. The storage subsystem determines from the topology storage the topological coupling relationships between the host and the switch and the switch and the storage subsystem. The storage subsystem redirects, based on the topological coupling relationships, a message sent to the first port of the storage subsystem to an operational second port in the storage subsystem.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: February 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Lei Chen, Shu Yang, Dong Hai Yu
  • Patent number: 8959375
    Abstract: A system and method for power management of storage resources are disclosed. A method may include detecting an occurrence of an event associated with a storage resource disposed in an array of storage resources. The method may further include transitioning the storage resource into a specified power state in response to the detection of the occurrence of the event. A system may include a storage resource and a power management module communicatively coupled to the storage resource. The storage resource may be disposed in an array of storage resources. The power management module may be operable to detect an occurrence of an event associated with the storage resource, and may be operable to transition the storage resource into a specified power state in response to the detection of the occurrence of the event.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: February 17, 2015
    Assignee: Dell Products L.P.
    Inventors: Christiaan Wenzel, Radhakrishna Dasari, Vishwanath Jayaraman, Jianwen Yin
  • Patent number: 8949659
    Abstract: Scheduling workloads based on detected hardware errors is provided. In response to determining that a hardware error is detected, it is determined whether the hardware error is a cache error. In response to determining that the hardware error is a cache error, it is determined whether execution of a workload on a processor is changing contents of a cache associated with the cache error more than a threshold value. In response to determining that the execution of the workload on the processor is changing the contents of the cache associated with the cache error more than the threshold value, it is determined whether the cache associated with the cache error is private to a core in the processor. In response to determining that the cache associated with the cache error is private to a core, the execution of the workload is scheduled on a different core of the processor.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: February 3, 2015
    Assignee: International Business Machines Corporation
    Inventor: Venkatesh Sainath
  • Publication number: 20150026506
    Abstract: Exemplary embodiments of present invention relate to an error detecting apparatus for a gate driver improving a reliability of a display apparatus, a display apparatus having the error detecting apparatus, and a method of detecting an error of the gate driver using the error detecting apparatus. An exemplary embodiment discloses an error detecting apparatus including an error detecting part configured to receive a gate signal of a gate driver and determine whether a status of the gate driver is in a normal status or an error status based on the gate signal, a memory configured to store the status of the gate driver, and a signal outputting part configured to selectively output a clock signal and an error signal based on the status of the gate driver stored in the memory.
    Type: Application
    Filed: July 15, 2014
    Publication date: January 22, 2015
    Inventors: Jong-Jae LEE, Eui-Dong HWANG, Bon-Sung KOO, Jun-Dal KIM, Seung-Hwan MOON, Dong-Won PARK
  • Patent number: 8938642
    Abstract: The described embodiments include a processor with a fault status register (FSR) that executes a Confirm instruction. In these embodiments, when executing the Confirm instruction, the processor receives a predicate vector that includes N elements. For a first set of bit positions in the FSR for which corresponding elements of the predicate vector are active, the processor determines if at least one of the first set of bit positions in the FSR holds a predetermined value. When at least one of the first set of bit positions in the FSR holds the predetermined value, the processor causes a fault in the processor.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: January 20, 2015
    Assignee: Apple Inc.
    Inventor: Jeffry E. Gonion
  • Patent number: 8930743
    Abstract: A computer hardware-implemented method, system, and/or computer program product prevents a cascading failure in a complex stream computer system causing an untrustworthy output from the complex stream computer system. Multiple upstream subcomponents in a complex stream computer system generate multiple outputs, which are used as inputs to a downstream subcomponent. An accuracy value is assigned to each of the multiple outputs from the upstream subcomponents, and weighting values are assigned to each of the inputs to the downstream subcomponent. The accuracy values and weighting values are utilized to dynamically adjust inputs to the downstream subcomponent until an output from the downstream subcomponent meets a predefined trustworthiness level.
    Type: Grant
    Filed: May 21, 2012
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Robert R. Friedlander, James R. Kraemer, Justyna M. Nowak, Elizabeth V. Woodward
  • Patent number: 8924498
    Abstract: A method includes disconnecting a first component from a first network. The first component is redundant to a second component and operates in a secondary or passive redundancy mode. The second component operates in a primary or active redundancy mode and is coupled to the first network. The method also includes updating at least one of hardware and software on the first component to allow the first component to communicate on a second network. The method further includes connecting the updated first component to the second network and synchronizing data between the updated first component on the second network and the second component on the first network. In addition, the method includes switching the updated first component from the secondary redundancy mode to the primary redundancy mode.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: December 30, 2014
    Assignee: Honeywell International Inc.
    Inventor: Paul F. McLaughlin
  • Publication number: 20140380085
    Abstract: A technology for implementing a method for a machine check architecture environment. A method of the disclosure includes obtaining an occurrence of an error. The occurrence of the error causes a non-microcoded processing device to enter an error monitoring state. The method further processes the error using a dedicated memory portion for the error monitoring state while the non-microcoded processing device is in the error monitoring state. The error monitoring state is dedicated to error processing. The method further determines information associated with the error. The information associated with the error is in a predefined format.
    Type: Application
    Filed: June 23, 2013
    Publication date: December 25, 2014
    Inventors: Willam C. Rash, Scott D. Hanh, Glenn J. Hinton
  • Publication number: 20140380086
    Abstract: A load driving device including a converter, an output circuit and a timer circuit is provided. The converter receives a communication frame including a data signal through a serial communication and performs parallel conversion on the data signal to output an instruction signal instructing the output circuit to transition to a first state when the data signal includes first serial data and output an instruction signal instructing the output circuit to transition to a second state when the data signal includes second serial data. A timer circuit measures a duration time during which the converter receives the first serial data. When the measuring duration time arrives at an abnormality determination time, the timer circuit forces the output circuit to transition to the second state when the measuring duration time arrives at an abnormality determination time.
    Type: Application
    Filed: June 17, 2014
    Publication date: December 25, 2014
    Inventor: Ryotaro KUNO
  • Patent number: 8917793
    Abstract: The present invention provides a communication circuit, a communication network, and a connecting apparatus that can realize communication with very high reliability using a simple wiring system, that includes a communication line 2 comprising three or more signal lines 2a,2b,2c, a signal distributing section 4, that is connected to one end of the communication line 2, for distributing and transmitting a signal input into an input terminal 3i to respective signal lines 2a,2b,2c, and a majority selection receiving circuit 5, that is connected to the other end of the communication line 2, for comparing a plurality of reception signals received via the signal lines 2a,2b,2c and selecting reception signals which are most matched with one another as true so as to output them to an output terminal 30.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: December 23, 2014
    Assignees: RIB Laboratory, Inc., Honda Motor Co., Ltd.
    Inventor: Setsuro Mori
  • Patent number: 8898505
    Abstract: A stream application may allocate processing elements to one or more compute nodes (or hosts) to achieve a desired optimization goal. Each optimization mode may define processing element selection criteria and/or host selection criteria. When allocating a processing element to a host, a scheduler may place each processing element individually. Accordingly, the scheduler may use the processing element selection criteria for selecting which processing element in the stream application to allocate next. The scheduler may then determine, based on one or more constraints, which host the processing element can be placed on. If the scheduler determines that multiple hosts are suitable candidates for the processing element, it may use the host selection criteria to pick one of the candidate hosts that further optimize the stream application to meet the desired goal.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: November 25, 2014
    Assignee: International Business Machines Corporation
    Inventor: Bradley W. Fawcett
  • Patent number: 8892230
    Abstract: A multicore system 2 includes a main system program 610 that operates on a first processor core 61 and stores synthesized audio data, which is mixed audio data, to a buffer for DMA transfer 63, a standby program 620 that operates on a second processor 62, and an audio output unit 64 that sequentially stores the synthesized audio data transferred from the buffer for DMA transfer 63 and plays the stored synthesized audio data. When an amount of storage of the synthesized audio data stored to the buffer for DMA transfer 63 has not reached a predetermined amount of data determined according to the amount of storage of the synthesized audio data stored to the audio output unit 64, the standby system program 620 takes over and executes the mixing and the storage of the synthesized audio data that is executed by the main system program 610.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: November 18, 2014
    Assignee: NEC Corporation
    Inventor: Kentaro Sasagawa
  • Patent number: 8887006
    Abstract: Embodiments are directed to predicting the health of a computer node using health report data and to proactively handling failures in database services. In an embodiment, a computer system monitors various health indicators for multiple nodes in a database cluster. The computer system accesses stored health indicators that provide a health history for the database cluster nodes. The computer system then generates a health status based on the monitored health factors and the health history. The generated health status indicates the likelihood that the node will be healthy within a specified future time period. The computer system then leverages the generated health status to handle current or predicted failures. The computer system also presents the generated health status to a user or other entity.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: November 11, 2014
    Assignee: Microsoft Corporation
    Inventors: Hao Xia, Todd F. Pfleiger, Mark C. Benvenuto, Ajay Kalhan
  • Publication number: 20140331076
    Abstract: An encoder (1) having a body to be measured (30) and a measuring body (10) includes an analog-digital converter (21) converting, to a digital signal, a sinusoidal analog signal generated by a detection unit (11) and has different phases, a storage unit (22) storing correction data for aperiodic error components among periodic and aperiodic error components included in errors of position data, an aperiodic error correction unit (23) correcting the aperiodic error components among errors in the position data by using the correction data, and a periodic error correction unit (24) correcting the periodic error components among the errors in the position data.
    Type: Application
    Filed: April 29, 2014
    Publication date: November 6, 2014
    Applicant: FANUC CORPORATION
    Inventor: Hirosato Yoshida