Plurality Of Memory Devices (e.g., Array, Etc.) Patents (Class 714/6.2)
  • Patent number: 8874957
    Abstract: A technique is provided for a cache. A cache controller accesses a set in a congruence class and determines that the set contains corrupted data based on an error being found. The cache controller determines that a delete parameter for taking the set offline is met and determines that a number of currently offline sets in the congruence class is higher than an allowable offline number threshold. The cache controller determines not to take the set in which the error was found offline based on determining that the number of currently offline sets in the congruence class is higher than the allowable offline number threshold.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: October 28, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ekaterina M. Ambroladze, Michael A. Blake, Timothy C. Bronson, Hieu T. Huynh
  • Patent number: 8874995
    Abstract: Embodiments of the invention relate to storing data in a storage array. An aspect of the invention includes receiving and arranging read data in array that includes m rows and n columns of entries, with each entry including at least one sector. In the array, mr+s locations are assigned to parity entries, such that each row has at least r parity entries. The parity entries correspond to a partial-maximum distance separable (PMDS) code that allows recovery from up to r erasures in each of the m rows as well as s additional erasures in any locations in the data array, where s is an integer greater than zero. The write data and the associated parity entries are written to the set of storage devices.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: October 28, 2014
    Assignee: International Business Machines Corporation
    Inventors: Mario Blaum, James L. Hafner, Steven R. Hetzler
  • Patent number: 8868830
    Abstract: Methods and apparatus, including computer program products, are provided for providing value help. In one aspect, there is provided a computer-implemented method. The method may include receiving, at a code list provider, a request from a user interface for code list value help; determining, based on the request, whether to access at least one of a cache and a secondary storage; accessing, by the code list provider, a cache including at least a first code list, the cache implemented in memory, when the determination results in access to the cache; accessing a secondary storage including at least a second code list, when the determination results in access to the secondary storage; and sending, by the code list provider, at least one of the first code list and the second code list to a user interface to enable the user interface to provide code list value help. Related apparatus, systems, methods, and articles are also described.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: October 21, 2014
    Assignee: SAP AG
    Inventors: Olaf Duevel, Udo Klein, Friedhelm Krebs, Steffen Riemann, Bernhard Thimmel
  • Patent number: 8869006
    Abstract: Embodiments of the invention relate to correcting erasures in a storage array. A read stripe is received from a plurality of n storage devices. The read stripe includes an array of entries arranged in m rows and n columns with each column corresponding to one of the storage devices. The entries include data entries and mr+s parity entries. Each row contains at least r parity entries generated from the data entries according to a partial maximum distance separable (PMDS) code. It is determined that the read stripe includes at least one erased entry, at most mr+s erased entries and that no row has more than r+s erased entries. The erased entries are reconstructed from the non-erased entries, resulting in a recovered read stripe.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: October 21, 2014
    Assignee: International Business machines Corporation
    Inventors: Mario Blaum, James L. Hafner, Steven R. Hetzler
  • Patent number: 8862847
    Abstract: A distributed data storage method, apparatus, and system for reducing a data loss that may result from a single-point failure. The method includes: splitting a data file to generate K data slices, splitting each data slice of the K data slices to generate M data blocks for each data slice, and performing check coding on the M data blocks by using a redundancy algorithm to generate N check blocks; determining, by using a random algorithm, a first physical storage node corresponding to one block of the M data blocks and the N check blocks, and determining at least M+1 different physical storage nodes based on the determined first physical storage node and according to a first rule-based sorting manner; and storing at least M+1 blocks of the M data blocks and the N check blocks onto the at least M+1 different storage nodes, where K, M, and N are integers.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: October 14, 2014
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Bin Feng, Cheng Huang, Xuewen Gong
  • Patent number: 8856619
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for storing data reliably across groups of storage nodes. In one aspect, a method includes receiving (n?f) data chunks for storage across n groups of storage nodes and generating (f?1) error-correcting code chunks using an error-correcting code and the (n?f) data chunks. The (n?f) data chunks are stored at a first group of storage nodes. Each data chunk of the (n?f) data chunks is stored at a respective second group of storage nodes. Each code chunk of the (f?1) code chunks is stored at a respective third group of storage nodes. Each second group of storage nodes and each third group of storage nodes is distinct from each other and from the first group of storage nodes.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: October 7, 2014
    Assignee: Google Inc.
    Inventor: Robert Cypher
  • Patent number: 8856587
    Abstract: A data processing device includes a cache having a plurality of cache lines. Each cache line has a lockout state that indicates whether an error has been detected for data accessed at the cache line. The lockout state of a cache line is indicated by a set of one or more lockout bits associate with the cache line. When a cache line is in a locked-out state, the cache line is not used by the cache. Accordingly, a locked-out cache line is not employed by the cache to satisfy a cache accesses, and is not used to store data retrieved from memory in response to a cache miss. In response to determining the detected error likely did not result from a hardware failure or other persistent condition, memory error management software can reset the lockout state of the cache line.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: October 7, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventor: William C. Moyer
  • Publication number: 20140298085
    Abstract: A method begins with a processing module within a dispersed storage network (DSN) determining to perform a rebuild scanning function for a virtual memory vault, where the virtual memory vault has a DSN address range that is divided into multiple DSN address sub-ranges. The method continues with a first rebuild scanning agent module initiating a rebuilding scanning function for a first group of DSN address sub-ranges and processing first rebuild responses to produce a first list of encoded data slices for rebuilding. The method continues with a second rebuild scanning agent module initiating the rebuilding scanning function for a second group of DSN address sub-ranges and processing second rebuild responses to produce a second list of encoded data slices for rebuilding. The method continues with the processing module queuing the first and second lists of encoded data slices for rebuilding.
    Type: Application
    Filed: June 12, 2014
    Publication date: October 2, 2014
    Applicant: CLEVERSAFE, INC.
    Inventors: Andrew Baptist, Greg Dhuse
  • Publication number: 20140298084
    Abstract: A virtual tape device connected to an upper device and a tape library device, and storing a tape volume includes: a storage unit to store the tape volume including a plurality of blocks; an identifier control unit to add to each block of the tape volume a first identification number which is incremented for each block, and a second identification number which is incremented only in a block subsequent to a leading block, a tape mark indicating a delimiter of a file, and a block subsequent to the tape mark; a first control unit to control a read and a write of the tape volume stored in the storage unit using the second identification number; and a second control unit to write the tape volume and the first identification number to the tape library device, and control the tape library device using the first identification number.
    Type: Application
    Filed: March 12, 2014
    Publication date: October 2, 2014
    Applicant: FUJITSU LIMITED
    Inventor: Yukio Taniyama
  • Patent number: 8850108
    Abstract: A plurality of storage nodes in a single chassis is provided. The plurality of storage nodes in the single chassis is configured to communicate together as a storage cluster. Each of the plurality of storage nodes includes nonvolatile solid-state memory for user data storage. The plurality of storage nodes is configured to distribute the user data and metadata associated with the user data throughout the plurality of storage nodes such that the plurality of storage nodes maintain the ability to read the user data, using erasure coding, despite a loss of two of the plurality of storage nodes. The chassis includes power distribution, a high speed communication bus and the ability to install one or more storage nodes which may use the power distribution and communication bus. A method for accessing user data in a plurality of storage nodes having nonvolatile solid-state memory is also provided.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: September 30, 2014
    Assignee: Pure Storage, Inc.
    Inventors: John Hayes, John Colgrove, Robert Lee, Peter Vajgel, Par Botes
  • Publication number: 20140281316
    Abstract: In response to a first copy command, a first copying unit writes a first dataset read out of a volatile storage device into a first continuous area and a fourth continuous area, as well as a second dataset read out of the volatile storage device into a second continuous area and a third continuous area. In response to a second copy command, a second copying unit reads the first dataset out of the first continuous area by making sequential access thereto, in parallel with the second dataset out of the third continuous area by making sequential access thereto. The second copying unit writes the first dataset and second dataset back into the volatile storage device.
    Type: Application
    Filed: May 20, 2014
    Publication date: September 18, 2014
    Applicant: FUJITSU LIMITED
    Inventor: Koji SANO
  • Publication number: 20140281227
    Abstract: The provisioning of a volume that has multiple tiers corresponding to different trait sets. The volume to be provisioned is identified along with multiple tiers that are to be in the volume. For each of the tiers that are to be provisioned within the volume, a corresponding trait set is identified as to be applied to each tier. This corresponding trait set may be based on underlying storage systems that are available at the time of provisioning, or which are anticipated to be available. The volume is then caused to be provisioned with the corresponding tiers having the corresponding trait sets. Also, the provisioning of a file, which is determined to have one or more storage traits. Based on these storage traits, the file is then caused to be assigned to an appropriate tier.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: MICROSOFT CORPORATION
    Inventors: Andrew Herron, Sarosh Cyrus Havewala, Karan Mehra, Ankur Kasturiya, Shiv Rajpal
  • Patent number: 8839026
    Abstract: According to the presently disclosed subject matter there is provided, inter alia, a system and method which enable to identify, in a storage-system, malfunctioning disks, and in response, to activate a power-cycle process only for the specific failing disks, in order to bring these disks into proper operational mode. During the power-cycle process of a failing disk, other disks, which are not failing, remain operative and available.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: September 16, 2014
    Assignee: Infinidat Ltd.
    Inventor: Haim Kopylovitz
  • Patent number: 8832399
    Abstract: In one aspect, a method includes forming a virtualized grid consistency group to replicate a logical unit, running a first grid copy on a first data protection appliance (DPA) replicating a first portion of the logical unit, running a second grid copy on a second DPA replicating a second portion of the logical unit, sending IOs to the first DPA if the IOs are to a first set of offsets and sending IOs to the second DPA if the IOs are to a second set of offsets.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: September 9, 2014
    Assignee: EMC International Company
    Inventors: Assaf Natanzon, Yuval Aharoni
  • Patent number: 8817280
    Abstract: A printing device includes a plurality of data transfer control units which store image data transferred from an upper level device in a storage unit; a plurality of output control units which are provided correspondingly to the data transfer control units and each of which controls printing of the image data stored by a specified one of the data transfer control units; and a print control unit that, when abnormality has occurred in any of the data transfer control units, transmits a transfer instruction on the image data that is to be transferred originally by the data transfer control unit being at fault, to an alternate data transfer control unit among the data transfer control units in which no abnormality has occurred, and instructs an output control unit corresponding to the data transfer control unit being at fault to print image data stored by the alternate data transfer control unit.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: August 26, 2014
    Assignee: Ricoh Company, Limited
    Inventor: Shigeru Toyazaki
  • Patent number: 8812915
    Abstract: Examples disclosed herein relate to determining whether a right to use memory modules in a reliability mode has been acquired. Examples include determining whether the right to use a plurality of memory modules in a reliability mode has been acquired, if a performance mode is selected for operation of the plurality of memory modules.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: August 19, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Lidia Warnes, Russ W. Herrell, Blaine D. Gaither
  • Patent number: 8812901
    Abstract: Methods and apparatus for improved building of a hot spare storage device in a RAID storage system while avoiding reading of stale data from a failed storage device. In the recovery mode of the failed device, all data is write protected on the failed device. A RAID storage controller may copy as much readable data as possible from the failed device to the hot spare storage device. Unreadable data may be rebuilt using redundant information of the logical volume. Write requests directed to the failed device cause the addressed logical block address (LBA) to be marked as storing stale data. When a read request is directed to such a marked LBA, the read request returns an error status from the failed device to indicate that the data is stale. The RAID controller then rebuilds the now stale data for that LBA from redundant information of the logical volume.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: August 19, 2014
    Assignee: LSI Corporation
    Inventor: Robert L. Sheffield, Jr.
  • Publication number: 20140229760
    Abstract: A file directory system comprises a directory file, a directory address for the directory file, and a directory address failsafe mechanism. The directory file includes one or more directory entries and one or more corresponding addresses for the one or more directory entries. The directory address failsafe mechanism functions to dispersed storage error encode the directory address to produce a plurality of encoded components of the directory address and transmit the plurality of encoded components of the directory address to a plurality of agent modules.
    Type: Application
    Filed: April 21, 2014
    Publication date: August 14, 2014
    Applicant: CLEVERSAFE, INC.
    Inventors: S. Christopher Gladwin, Gary W. Grube, Jason K. Resch, Timothy W. Markison
  • Patent number: 8806268
    Abstract: A primary storage controller is maintained in a copy relationship with a secondary storage controller, wherein the primary and secondary storage controllers are coupled to a host that is configurable to use the secondary storage controller instead of the primary storage controller. The primary storage controller determines occurrence of at least one condition in the primary storage controller, wherein the at least one condition occurs prior to a failure of the host to perform an Input/Output (I/O) operation with respect to at least one storage volume of the primary storage controller. The primary storage controller communicates the occurrence of the at least one condition to the host, wherein in response to the communicating the host is configured to determine whether to use the secondary storage controller instead of the primary storage controller based on the occurrence of the at least one condition.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: August 12, 2014
    Assignee: International Business Machines Corporation
    Inventors: David B. Petersen, Gail A. Spear
  • Patent number: 8806267
    Abstract: The method includes receiving a command at a first storage system of a block storage cluster. The command is transmitted by the initiator system to the first storage system via a network and includes a request for data. The method further includes transferring the stored data from the first storage system to the initiator system via the network when data requested in the data request is stored by the first storage system. The method further includes transmitting a referral response from the first storage system to the initiator system when a portion of the data requested in the data request is not stored by the first storage system, but is stored by a second storage. system of the block storage cluster.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: August 12, 2014
    Assignee: Netapp, Inc.
    Inventors: Gerald J. Fredin, Andrew J. Spry, Kenneth J. Gibson, Ross E. Zwisler
  • Patent number: 8799705
    Abstract: A disk array memory system comprises: a plurality of disks in a disk array for storage of content data and parity data in stripes, content data in a same stripe sharing parity bits of said parity data, each disk having a spare disk capacity including at least some of a predefined array spare capacity, said array spare capacity providing a dynamic space reserve over said array to permit data recovery following a disk failure event; a cache for caching content data prior to writing to said disk array; and a controller configured to select a stripe currently having a largest spare stripe capacity, for a current write operation of data from said cache, thereby to write all said data of said current write operation on a same stripe, thereby to maximize sharing of parity bits per write operation and minimize separate parity write operations.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: August 5, 2014
    Assignee: EMC Corporation
    Inventors: Renen Hallak, Tal Ben Moshe, Niko Farhi, Erez Webman
  • Patent number: 8788876
    Abstract: The present disclosure includes methods and devices for stripe-based memory operation. One method embodiment includes writing data in a first stripe across a storage volume of a plurality of memory devices. A portion of the first stripe is updated by writing updated data in a portion of a second stripe across the storage volume of the plurality of memory devices. The portion of the first stripe is invalidated. The invalid portion of the first stripe and a remainder of the first stripe are maintained until the first stripe is reclaimed. Other methods and devices are also disclosed.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: July 22, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Joseph M. Jeddeloh
  • Publication number: 20140201565
    Abstract: A system and method for using failure casting to manage failures in computer system. In accordance with an embodiment, the system uses a failure casting hierarchy to cast failures of one type into failures of another type. In doing this, the system allows incidents, problems, or failures to be cast into a (typically smaller) set of failures, which the system knows how to handle. In accordance with a particular embodiment, failures can be cast into a category that is considered reboot-curable. If a failure is reboot-curable then rebooting the system will likely cure the problem. Examples include hardware failures, and reboot-specific methods that can be applied to disk failures and to failures within clusters of databases. The system can even be used to handle failures that were hitherto unforeseen failures can be cast into known failures based on the failure symptoms, rather than any underlying cause.
    Type: Application
    Filed: January 11, 2013
    Publication date: July 17, 2014
    Applicant: Teradata Corporation
    Inventors: George Candea, Mayank Bawa, Anastasios Argyros
  • Patent number: 8782798
    Abstract: The present invention relates to a method and apparatus for protecting data using a virtual environment, which creates a safe virtual environment that supports the execution of application programs being operated on a computer and which enables important data to be inputted or outputted only within the virtual environment, such that access to the important data is prevented in a general local environment. According to the present invention, data leakage is initially prevented to protect data, and convenience is provided in that a user may use the computer in a general manner while performing desired work.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: July 15, 2014
    Assignee: Ahnlab, Inc.
    Inventors: Kyung Wan Kang, Kwang Tae Kim, Heean Park
  • Patent number: 8782492
    Abstract: A method begins by a dispersed storage (DS) processing module receiving a modified data object, wherein the modified data object is a modified version of a data object and the data object is divided into a plurality of data segments and stored in the DSN. The method continues with the DS processing module mapping portions of the modified data object to the plurality of data segments that includes creating a middle data segment of a second plurality of data segments based on a corresponding middle data segment of the plurality of data segments when a portion of the portions corresponds to middle data of the modified data object. The method continues with the DS processing module encoding the middle data segment using a dispersed storage error coding function to produce an encoded data segment and overwriting the corresponding middle data segment with the encoded data segment in the DSN.
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: July 15, 2014
    Assignee: Cleversafe, Inc.
    Inventors: Jason K. Resch, Wesley Leggette
  • Patent number: 8782491
    Abstract: A method begins by a dispersed storage (DS) processing module of a DS unit selecting a data slice for corruption analysis and requesting integrity information for the data slice from one or more other DS units of a dispersed storage network. When the one or more requested integrity information is received, the method continues with the DS processing module analyzing the one or more received integrity information and local integrity information of the data slice stored in the DS unit. When the analysis of the one or more received integrity information and the local integrity information of the data slice is unfavorable, the method continues with the DS processing module identifying the data slice as being corrupted.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: July 15, 2014
    Assignee: Cleversafe, Inc.
    Inventors: Jason K. Resch, Greg Dhuse, Wesley Leggette, Andrew Baptist
  • Patent number: 8775881
    Abstract: Electronic apparatus, systems, and methods of operating and constructing the electronic apparatus and/or systems include an embedded processor disposed in a logic chip to direct, among other functions, self-testing of an electronic device structure in conjunction with a pattern buffer disposed in the logic chip, when the electronic device structure is coupled to the logic chip. Additional apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: July 8, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Joe M. Jeddeloh
  • Patent number: 8769197
    Abstract: A method of operating a storage system includes: configuring the address space so that each LBA is assigned to at least two servers among a plurality of at least three servers in a control grid: to a primary server with a primary responsibility for handling requests corresponding to said LBA, and to a secondary server with a secondary responsibility for handling requests corresponding to said LBA. In response to a request corresponding to a certain LBA range, generating by a data server having primary responsibility over the certain LBA range, a primary cache object; identifying a data server configured as a secondary data server with regard to the certain LBA range; and generating a redundancy cache object corresponding to the primary cache object only at the identified secondary data server, the redundancy cache object to be used by the identified secondary data server when taking the primary responsibility.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: July 1, 2014
    Assignee: Infinidat Ltd.
    Inventors: Yechiel Yochai, Leo Corry, Haim Kopylovitz
  • Publication number: 20140181574
    Abstract: Electronic apparatus, systems, and methods to construct and operate the electronic apparatus and/or systems include a memory unit configured to receive data flow from two directions. The memory unit can be configured serially in a chain with other memory units. The chain can include an error check and correcting unit (ECC). Additional apparatus, systems, and methods are disclosed.
    Type: Application
    Filed: February 26, 2014
    Publication date: June 26, 2014
    Applicant: Micron Technology, Inc.
    Inventor: David R. Resnick
  • Patent number: 8762773
    Abstract: By providing a unit storage area usage information calculation unit that calculates, during copy of data by a data copy control unit, usage information of a unit storage area in a storage unit that stores the data transferred from a migration source apparatus, as unit storage area usage information, and a comparison unit that compares data stored in the storage unit related to a unit storage area to be verified, selected based on the unit storage area usage information calculated, with data in the migration source apparatus related to the area to be verified, efficient and reliable data compare can be performed.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: June 24, 2014
    Assignee: Fujitsu Limited
    Inventors: Shigeru Akiyama, Yasuhiro Ogasawara, Tatsuya Yanagisawa, Kosuke Ota, Hitoshi Kosokabe
  • Patent number: 8762770
    Abstract: A method begins by a dispersed storage (DS) processing module receiving an access request for a customized preview of multi-media content from an accessing device that possesses first sub-sets of encoded data slices, wherein the multi-media content is segmented into data segments, wherein each data segment is encoded to produce a plurality of sets of encoded data slices and wherein the plurality of sets of encoded data slices includes the plurality of first sub-sets of encoded data slices and a plurality of second sub-sets of encoded data. The method continues with the DS processing module identifying a set of data segments corresponding to the customized preview of the multi-media content. The method continues with the DS processing module sending, to the accessing device, at least one encoded data slice of a second sub-set of encoded data slices that corresponds to a data segment of the set of data segments.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: June 24, 2014
    Assignee: Cleversafe, Inc.
    Inventors: Gary W. Grube, S. Christopher Gladwin, Timothy W. Markison
  • Patent number: 8751860
    Abstract: The present disclosure includes methods, devices, and systems for object oriented memory in solid state devices. One embodiment of a method for object oriented memory in solid state devices includes accessing a defined set of data as a single object in an atomic operation manner, where the accessing is from a source other than a host. The embodiment also includes storing the defined set of data as the single object in a number of solid state memory blocks as formatted by a control component of a solid state device that includes the number of solid state memory blocks.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: June 10, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Peter Feeley, Neal A. Galbo, James Cooke, Victor Y. Tsai, Robert N. Leibowitz, William H. Radke
  • Publication number: 20140157043
    Abstract: Use of hybrid error correcting code (ECC) techniques. A memory access request having an associated address is received. A memory controller determines whether the address corresponds to a first region of a memory for which ECC techniques are applied or a second region of the memory for which ECC techniques are not applied. The memory access is processed utilizing ECC techniques if the address corresponds to the first region of the memory and processed without utilizing the ECC techniques if the address corresponds to the second region of the memory.
    Type: Application
    Filed: March 30, 2012
    Publication date: June 5, 2014
    Inventor: Joshua D. Ruggiero
  • Patent number: 8745308
    Abstract: In a computer system supporting execution of virtualization software and at least one instance of virtual system hardware, an interface is provided into the virtualization software to allow a program to directly define the access characteristics of its program data stored in physical memory. The technique includes providing data identifying memory pages and their access characteristics to the virtualization software which then derives the memory access characteristics from the specified data. Optionally, the program may also specify a pre-defined function to be performed upon the occurrence of a fault associated with access to an identified memory page. In this manner, programs operating both internal and external to the virtualization software can protect his memory pages, without intermediation by the operating system software.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: June 3, 2014
    Assignee: VMware, Inc.
    Inventors: Xiaoxin Chen, Pratap Subrahmanyam
  • Publication number: 20140149785
    Abstract: A distributed management system comprises a backplane and a plurality drive assemblies communicatively coupled to the backplane via a communication channel. Each of the plurality of drive assemblies includes a computing device, and each of the computing devices is to provide drive environmental data and control a light source.
    Type: Application
    Filed: October 25, 2011
    Publication date: May 29, 2014
    Inventors: M. Scott Bunker, Michael White, Timothy A. McCree
  • Patent number: 8738582
    Abstract: A distributed object storage system includes several performance optimizations with respect to storing very small data objects, very large data objects and CRC calculations.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: May 27, 2014
    Assignee: Amplidata NV
    Inventors: Frederik De Schrijver, Romain Raymond Agnes Slootmaekers, Bastiaan Stougie, Joost Yervante Damad, Wim De Wispelaere, Wouter Van Eetvelde, Bart De Vylder
  • Patent number: 8738963
    Abstract: A system comprising a plurality of storage systems, which uses storage devices of multiple levels of reliability. The reliability as a whole system is increased by keeping the error code for the relatively low reliability storage disks in the relatively high reliability storage system. The error code is calculated using hash functions and the value is used to compare with the hash value of the data read from the relatively low reliability storage disks.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: May 27, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Tomohiro Kawaguchi, Akira Yamamoto
  • Patent number: 8726127
    Abstract: A method begins by a computing device determining that dispersed storage network (DSN) memory is to be accessed regarding data. The method continues when the computing device is paired with a DSN access token module with the DSN access token module retrieving a plurality of sets of at least a threshold number of dispersed storage (DS) error coding function slices from the DSN memory via the computing device. The method continues with at least one of the computing device and the DSN access token module decoding the plurality of sets of the at least a threshold number of DS error coding function slices using a default DS error coding function to recapture a DS error coding function and executing, by one or more of the computing device and the DSN access token module, the DS error coding function to access the DSN memory regarding the data.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: May 13, 2014
    Assignee: Cleversafe, Inc.
    Inventors: Gary W. Grube, Timothy W. Markison, Greg Dhuse, Jason K. Resch, Ilya Volvovski, Wesley Leggette
  • Patent number: 8726120
    Abstract: A method begins with a processing module receiving an access request for the data object. The method continues by ascertaining that the data object is divided into a plurality of data segments and that plurality of data segments are dispersed storage error encoded to produce a plurality of sets of encoded data slices. The method continues by ascertaining batching of the plurality of sets of encoded data slices, wherein the plurality of sets of encoded data slices are arranged into a set of batched encoded data slices. The method continues by outputting a set of access requests for the set of batched encoded data slices to storage units of the DSN.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: May 13, 2014
    Assignee: Cleversafe, Inc.
    Inventors: Andrew Baptist, Ilya Volvovski, Wesley Leggette, Greg Dhuse, Jason K. Resch
  • Patent number: 8719621
    Abstract: A system includes a write module, a read module, and a parity module. The write module is configured to modify first user data stored on a first member of a redundant array of independent disks (RAID) using second user data. The read module is configured to read the first user data and first parity data corresponding to the first user data from a solid-state disk associated with the RAID if at least one of the first user data and the first parity data are stored on the solid-state disk, or from the RAID if the at least one of the first user data and the first parity data are not stored on the solid-state disk. The parity module is configured to generate second parity data based on the first user data, the second user data, and the first parity data.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: May 6, 2014
    Assignee: Marvell International Ltd.
    Inventor: Sandeep Karmarkar
  • Patent number: 8719620
    Abstract: The present invention reduces the amount of rebuild processing and executes a rebuild process efficiently. Multiple storage devices configure a parity group. Of the multiple storage devices, a prescribed storage device in which a failure has occurred is blocked. Each storage device stores management information. The management information manages from among the storage areas of the storage device a prescribed area having data from a higher-level apparatus. A controller determines whether a storage area of the prescribed storage device is the prescribed area based on the management information, and executes a rebuild process with respect to the area determined to be the prescribed area.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: May 6, 2014
    Assignee: Hitachi, Ltd.
    Inventor: Toshiya Seki
  • Publication number: 20140122921
    Abstract: Embodiments relate to a computer implemented information processing system, method and program product for data access. The information processing system includes a data store having a top tier store and at least another tier store with the top tier store including a counter for each entry of a symbol and another tier store including a representative frequency value defined for the another tier store. A sorter is also provided configured to sort the symbol in the top tier store and the another tier stores according to a value generated in the counter for the assessed symbol. The said sorter is also configured to restore entry of the symbol in the top tier store, in response to a symbol having moved from said top tier store to another tier store, by using the representative frequency value defined for said another store to which said symbol was moved.
    Type: Application
    Filed: October 26, 2012
    Publication date: May 1, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: International Business Machines Corporation
  • Patent number: 8713359
    Abstract: Server supervisor processes in the segment nodes of a database cluster afford transparent reset mechanisms to a fault tolerant service (FTS). FTS probes only primary segments as to their status unless a primary segment does not respond, in which case FTS will probe the mirror of that primary-mirror pair, and change the state of the mirror to primary if the primary is faulty. Only a primary segment to initiate a reset of its mirror segment and then resets itself. If a mirror segment fails, it shuts down and its corresponding primary segment will report the failure to FTS. Transient communication failures are addressed by retry logic on FTS probing, and not reported to FTS. Reset is not initiated by FTS and preserves the segment state in the absence of errors.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: April 29, 2014
    Assignee: EMC Corporation
    Inventors: Konstantinos Krikellas, Florian Michael Waas, Milena Bergant
  • Patent number: 8707091
    Abstract: A file directory system comprises a directory file, a directory address for the directory file, and a directory address failsafe mechanism. The directory file includes one or more directory entries and one or more corresponding addresses for the one or more directory entries. The directory address failsafe mechanism functions to dispersed storage error encode the directory address to produce a plurality of encoded components of the directory address and transmit the plurality of encoded components of the directory address to a plurality of agent modules.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: April 22, 2014
    Assignee: Cleversafe, Inc.
    Inventors: S. Christopher Gladwin, Gary W. Grube, Jason K. Resch, Timothy W. Markison
  • Patent number: 8707092
    Abstract: Memory devices and methods are described that include serially chained memory devices. In one or more of the configurations shown, a serial chain of memory devices includes a number of memory devices, and an error recovery device at an end of the chain. In one configuration shown, the serial chain of memory devices includes a chain of devices where each device is a stacked die memory device. Methods are described that show using the error recovery device in write operations and data recovery operations.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: April 22, 2014
    Assignee: Micron Technology, Inc.
    Inventor: David R. Resnick
  • Patent number: 8707076
    Abstract: A system and method for power management of storage resources are disclosed. A method may include detecting an occurrence of an event associated with a storage resource disposed in an array of storage resources. The method may further include transitioning the storage resource into a specified power state in response to the detection of the occurrence of the event. A system may include a storage resource and a power management module communicatively coupled to the storage resource. The storage resource may be disposed in an array of storage resources. The power management module may be operable to detect an occurrence of an event associated with the storage resource, and may be operable to transition the storage resource into a specified power state in response to the detection of the occurrence of the event.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: April 22, 2014
    Assignee: Dell Products L.P.
    Inventors: Christiaan Wenzel, Radhakrishna Dasari, Vishwanath Jayaraman, Jianwen Yin
  • Patent number: 8707088
    Abstract: A method begins by a processing module determining access performance to copies of dispersed storage encoded data, wherein the copies of the dispersed storage encoded data are stored in a set of a plurality of dispersed storage networks (DSNs). The method continues with the processing module modifying the set of the plurality of DSNs based on the access performance and the desired access performance level to produce a modified set of the plurality of DSNs when the access performance is not at a desired access performance level. The method continues with the processing module, for a new DSN of the modified set of the plurality of DSNs, determining error coding dispersal storage parameters based on local data retrieval accesses allocated to the new DSN and facilitating the new DSN storing another copy of the dispersed storage encoded data.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: April 22, 2014
    Assignee: Cleversafe, Inc.
    Inventors: Jason K. Resch, Gary W. Grube, Timothy W. Markison
  • Publication number: 20140108855
    Abstract: A method for reducing an amount of time required for performing consistency checking in a redundant storage system includes steps of: providing an information repository associated with each of a primary drive and at least one redundant drive; storing, in the information repository, information relating to input/output failures on the primary drive and redundant drive; determining a likelihood that one or more regions of the primary drive and/or redundant drive contains inconsistent data as a function of the information stored in the information repository; and performing consistency checking on the one or more regions of the primary drive and the redundant drive determined to have at least a prescribed likelihood of containing inconsistent data to thereby reduce the amount of time required for performing consistency checking.
    Type: Application
    Filed: October 17, 2012
    Publication date: April 17, 2014
    Applicant: LSI CORPORATION
    Inventors: Manjusha Gopakumar, Ankit Goel
  • Patent number: 8700950
    Abstract: Systems and methods are disclosed for recovering from a data access error encountered in data stripes implemented in a data redundancy scheme (e.g., RAID) in a solid state storage device. In one embodiment, the storage device holds parity data in a temporary, volatile memory such as a RAM and writes the parity data to the non-volatile memory when a full stripe's worth of new write data has been written to the non-volatile memory. In one embodiment, upon detecting that a data access error has occurred in a partially written stripe, the storage device initiates a write of the parity data for the partially written stripe to the non-volatile memory and executes a RAID recovery procedure using the newly written parity data to attempt to recover from the detected error. This approach allows for a recovery from the data access error without waiting for the full stripe to be written.
    Type: Grant
    Filed: February 11, 2011
    Date of Patent: April 15, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventor: Mei-Man L. Syu
  • Patent number: 8700949
    Abstract: In one embodiment, a method of storing data includes storing a first copy of data in a solid state memory and storing a second copy of the data in a hard disk drive memory substantially simultaneously with the storing the first copy. In another embodiment, a system for storing data includes a solid state memory, at least one hard disk drive memory, and a controller for controlling storage of data in the solid state memory and the hard disk drive memory. Other methods, systems, and computer program products are also described according to various embodiments.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: April 15, 2014
    Assignee: International Business Machines Corporation
    Inventors: Evangelos S. Eleftheriou, Robert Haas, Xiaoyu Hu, Roman A. Pletka