Forward Correction By Block Code Patents (Class 714/752)
  • Patent number: 11075649
    Abstract: Disclosed are a communication scheme and a system thereof for converging IoT technology and a 5G communication system for supporting a high data transmission rate beyond that of a 4G system. The disclosure can be applied to intelligent services (for example, services related to a smart home, smart building, smart city, smart car, connected car, health care, digital education, retail business, security, and safety) based on the 5G communication technology and the IoT-related technology. A decoding method includes: performing decoding through an inner code; detecting an error through an outer code; determining a re-encoding method; and performing re-encoding. A method for processing a signal includes decoding a first layer signal to determine first LDPC information bits, encoding the first LDPC information bits and a first parity bits to determine second parity bits; identifying a part of the first LDPC information bits, and decoding a second layer signal.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: July 27, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seho Myung, Min Jang, Yangsoo Kwon, Hoondong Noh
  • Patent number: 11075650
    Abstract: A decoder circuit includes an input to receive a first codeword encoded based on a quasi-cyclic low-density parity-check (QC LDPC) code. The first codeword includes a sequence of data arranged according to an order of columns in a first parity-check matrix associated with the QC LDPC code. A codeword reordering stage generates a reordered codeword by changing the sequence of the data in the first codeword based at least in part on a size of one or more circulant submatrices in the first parity-check matrix. An LDPC decoder generates a decoded codeword by decoding the reordered codeword based on a second parity-check matrix associated with the QC LDPC code. In some implementations, the second parity-check matrix may comprise a plurality of second circulant submatrices of a different size than the first circulant submatrices.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: July 27, 2021
    Assignee: Xilinx, Inc.
    Inventors: Andrew Dow, Richard L. Walke
  • Patent number: 11070233
    Abstract: The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 12/15, 6/15, or 8/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: July 20, 2021
    Assignee: Saturn Licensing LLC
    Inventors: Ryoji Ikegaya, Makiko Yamamoto, Yuji Shinohara
  • Patent number: 11070313
    Abstract: Provided are a staircase code decoding method and a staircase code decoding apparatus. The method includes: step 1, obtaining the length L of a sliding window, and continuously obtaining, starting from a P-th subcode block, L subcode blocks as first to-be-decoded subcode blocks in the sliding window; step 2, dividing the first to-be-decoded subcode blocks into a plurality of first to-be-decoded groups, respectively decoding the plurality of to-be-decoded groups to be decoded, and updating the plurality of first to-be-decoded groups according to a decoding result to obtain first updated subcode blocks; step 3, sliding the sliding window forwards by a length of N subcode blocks; step 4, dividing second to-be-decoded subcode blocks into a plurality of second to-be-decoded groups, decoding the plurality of second to-be-decoded groups, obtaining second updated subcode blocks, and outputting first M subcode blocks among the second updated subcode blocks; and step 5, sliding the sliding window backwards by S.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: July 20, 2021
    Assignee: ZTE CORPORATION
    Inventors: Junjie Yin, Yi Cai, Weiming Wang, Erkun Sun
  • Patent number: 11063878
    Abstract: A network and a communication method are described. The network comprises: source nodes, receiver nodes, and coding nodes. The coding nodes are connected with input links for communication of input signals to the coding nodes and output links for communication of output signals from the coding nodes. The output signals are a linear combination of the input signals. The coefficients of the linear combination are deterministically chosen based on local information available locally at the coding node.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: July 13, 2021
    Assignee: CODE ON NETWORK CODING, LLC
    Inventors: Tracey C. Ho, Michelle Effros
  • Patent number: 11063614
    Abstract: In some examples, a polar decoder for implementing polar decoding of a codeword can be configured to implement alogarithmic likelihood ratio (LLR), an even bit, and an odd bit buffer, respectively. The polar decoder can be configured to employ a list-to-buffer mapping state register for the LLR buffer for loading LLR values for each path at a given stage of a decoding graph. The polar decoder can be configured to update and store LLR values for each path at the given stage. The polar decoder can be configured to employ a list-to-buffer mapping state register for the even bit buffer for loading even bit values from the even bit buffer and loading odd bit values from the odd bit buffer, and updating even or odd bit values for each path at the given stage of the decoding graph.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: July 13, 2021
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Rong Chen, Poojan Rajeshbhai Shah, Dan Nicolaescu
  • Patent number: 11057164
    Abstract: A communication system includes a processor and a memory that stores recovery bits of a previous message and instructions. The instructions cause the processor to, in response to receiving a new message, obtain the recovery bits of the previous message and selectively generate a candidate message by attempting recovery of the previous message from the new message and the recovery bits of the previous message. The instructions include, in response to an indicator indicating that the recovery was successful, computing a delta between the new message and the candidate message and generating a delivery message based on (i) the computed delta or, in response to the indicator indicating that the recovery was unsuccessful, (ii) the new message. The instructions include calculating new recovery bits from the new message, replacing the stored recovery bits of the previous message with the new recovery bits, and transmitting the delivery message to a destination.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: July 6, 2021
    Assignee: TD Ameritrade IP Company, Inc.
    Inventor: Sanjay John Cherian
  • Patent number: 11057448
    Abstract: A method for receiving a streaming service is disclosed. The method for receiving a streaming service may be a method performed at a terminal for receiving a streaming service for a video content coded in a layered manner and may include the steps of: (a) sequentially requesting a transmission of at least one video data for a basic layer to be stored in the idle space of a buffer; and (b) sequentially requesting a transmission of video data for a layer of an increased level if the buffer does not have idle space, performed during the decoding of video data corresponding to a single video chunk, where step (b) may be repeated with the level of the layer increased during the decoding of video corresponding to a single video chunk.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: July 6, 2021
    Assignee: Korea University Research and Business Foundation
    Inventors: Jung Hwan Lee, Jea-Min Lim, Jae Hyun Hwang, Nakjung Choi, Hyuck Yoo
  • Patent number: 11057054
    Abstract: Embodiments of this application provide a method for transmitting encoded information. A communication device obtains K bits of information, and generates a to-be-encoded sequence u1N, wherein N is a length of the sequence. The device encodes the sequence u1N in an encoding process, to obtain an output sequence, and transmits the output sequence. In the sequence u1N, each of the N bits corresponds to a subchannel, and each subchannel has a reliability. The K information bits, a quantity J of first-type auxiliary bits, and a quantity J? of second-type auxiliary bits are placed in K?=K+J+J? bit positions of the sequence u1N according to reliabilities of the subchannels. Since the positions of the information bits and the auxiliary bits are pre-determined and not affected by subsequent encoding and rate-matching, overheads of real-time reliability calculation are effectively reduced, time is saved, and delay is reduced.
    Type: Grant
    Filed: February 23, 2020
    Date of Patent: July 6, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Huazi Zhang, Rong Li, Yue Zhou, Hejia Luo, Gongzheng Zhang, Yunfei Qiao
  • Patent number: 11043968
    Abstract: The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 12/15, 6/15, or 8/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: June 22, 2021
    Assignee: Saturn Licensing LLC
    Inventors: Ryoji Ikegaya, Makiko Yamamoto, Yuji Shinohara
  • Patent number: 11043973
    Abstract: A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver is formed of a plurality of columns each including a plurality of rows and includes a block interleaver configured to divide each of the plurality of columns into a first part and a second part and interleave the LDPC codeword, the number of rows constituting each column divided into the first part is determined differently depending upon the modulation method, wherein the number of rows constituting each column divided into the second part is determined depending upon the number of rows constituting each column divided into the first part.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: June 22, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-ho Myung, Hong-sil Jeong, Kyung-joong Kim
  • Patent number: 11044049
    Abstract: A method and system are discussed for providing Unequal Error Protection (UEP) for heterogeneous multi-service provisioning. A transmitter in a network may determine a current status of the network. The transmitter may adaptively adjust a current asymmetric signal constellation and a current channel Forward Error Correction (FEC) coding rate based on the determined current status of the network, and initiate transmission of multi-service data, using the adaptively adjusted asymmetric signal constellation and the adaptively adjusted FEC coding rate for transmission of the multi-service data, based on hybrid Unequal Error Protection (UEP) transmission.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: June 22, 2021
    Assignee: United States of America as represented by the Secretary of the Navy
    Inventors: Justin O. James, Michael P. Daly
  • Patent number: 11038739
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a wireless communication device may receive a wireless communication signal. The wireless communication device may process the wireless communication signal using a digital post distortion receiver based at least in part on performing a multi-level coding (MLC) set partitioning operation, wherein performing the MLC set partitioning operation comprises partitioning a quadrature amplitude modulation constellation set by bounding a maximum Euclidean distance of an error associated with decoding one or more least significant bits. Numerous other aspects are provided.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: June 15, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Shay Landis, Amit Bar-Or Tillinger, Assaf Touboul
  • Patent number: 11031952
    Abstract: Provided herein may be an error correction decoder based on an iterative decoding scheme using NB-LDPC codes and a memory system having the same. The error correction decoder may include a symbol generator for assigning an initial symbol to a variable node, a reliability value manager for setting and updating reliability values of candidate symbols of the variable node in current iteration, a flipping function value calculator for calculating a flipping function value by subtracting a function value, related to the updated reliability values of remaining candidate symbols other than a target candidate symbol, from another function value, related to the updated reliability value of the target candidate symbol, in the current iteration, and a symbol corrector for changing the hard decision value to the target candidate symbol when the flipping function value is equal to or greater than a first threshold value in the current iteration.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: June 8, 2021
    Assignee: SK hynix Inc.
    Inventor: Dae Sung Kim
  • Patent number: 11023158
    Abstract: Embodiments of the present disclosure provide a method, apparatus, and computer program product for storing data. A method for storing data comprises: dividing data to be stored into a first number of data segments; generating a second number of coding segments based on the first number of data segments, such that at least a part of data segments from the first number of data segments can be derived from the second number of coding segments and remaining data segments in the first number of data segments; generating, for each of the first number of data segments, a replication data segment identical to the data segment; and storing the first number of data segments, the first number of replication data segments and the second number of coding segments into a plurality of storage devices. Embodiments of the present disclosure can reduce extra overhead for protecting data while ensuring high data availability.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: June 1, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Ao Sun, Gary Jialei Wu, Lu Lei
  • Patent number: 11025279
    Abstract: Aspects of the subject disclosure may include, for example, obtaining a received channel-encoded data block having information bits, a transmitted error-check value, and redundant code bits. The redundant code bits correspond to a channel code applied to the received channel-encoded data block prior to transmission via a communication channel. A channel code type is identified and responsive to it being systematic, the information bits and the transmitted error-check value are obtained without decoding according to the channel code. The received channel-encoded data block is checked according to the transmitted error-check value to obtain a result. Responsive to the result not indicating an error, extracting the information bits without decoding the received channel-encoded data block according to the channel code. Responsive to the result indicating an error, decoding the received channel-encoded data block according to the channel code to obtain decoded information bits. Other embodiments are disclosed.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: June 1, 2021
    Assignee: AT&T Intellectual Property 1, L.P.
    Inventors: Sairamesh Nammi, Arunabha Ghosh, Aditya Chopra, Saeed Ghassemzadeh
  • Patent number: 11018835
    Abstract: Provided are a method, apparatus and system for processing feedback information. The method includes: the first transmission node receiving a signal of a data shared channel, and determining data transmission level indication information of a transport block according to the signal; and the first transmission node transmitting the data transmission level indication information corresponding to the transport block to a second transmission node.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: May 25, 2021
    Assignee: ZTE Corporation
    Inventors: Jun Xu, Yu Ngok Li, Bo Dai, Yuxin Wang, Jin Xu
  • Patent number: 11012098
    Abstract: The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 10/15 or 12/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: May 18, 2021
    Assignee: Saturn Licensing LLC
    Inventors: Ryoji Ikegaya, Makiko Yamamoto, Yuji Shinohara
  • Patent number: 11003375
    Abstract: Methods, systems, and devices for code word formats and structures are described. A code word format and structure may include various fields that facilitate a reliable transaction of user data during an access operation associated with a memory medium. For example, the bit fields may include information directed to an error control operation for a port manager to perform on a code word configured in accordance with the code word format and structure. Additionally, the code word format and structure may be configured for low latency operation and reliable transaction of the user data during the access operation. For example, the port manager may receive a first portion of the code word and parse the first portion of the code word concurrently with receiving an additional portion of the code word.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: May 11, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Joseph Thomas Pawlowski
  • Patent number: 10999011
    Abstract: An apparatus and a method for transmitting and receiving a signal in a communication system are provided. The method includes checking a type of the signal to be transmitted; determining a number of puncture bits according to the type of the signal; and puncturing an encoded signal to be transmitted according to the number of puncture bits.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: May 4, 2021
    Inventors: Hong-Sil Jeong, Sung-Ryul Yun, Hyun-Koo Yang, Se-Ho Myung, Alain Mourad, Ismael Gutierrez
  • Patent number: 10999004
    Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword. The second memory is initialized to 0. The processor generates the LDPC codeword by performing accumulation with respect to the second memory using information bits. The accumulation is performed at parity bit addresses that are updated using a sequence corresponding to a parity check matrix (PCM).
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: May 4, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Heung-Mook Kim, Sun-Hyoung Kwon, Nam-Ho Hur
  • Patent number: 10992321
    Abstract: The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rater is 10/15 or 12/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: April 27, 2021
    Assignee: Saturn Licensing LLC
    Inventors: Ryoji Ikegaya, Makiko Yamamoto, Yuji Shinohara
  • Patent number: 10983858
    Abstract: A data writing method, a memory control circuit unit, and a memory storage device are provided. The method includes: receiving a first sub-data of a plurality of sub-data of a first data and generating a first error detecting code corresponding to the first sub-data; receiving a second sub-data of the plurality of sub-data of the first data and generating a second error detecting code corresponding to the second sub-data; combining the first error detecting code and the second error detecting code to obtain a third error detecting code, wherein the third error detecting code is used to check whether a second data formed by combining the first sub-data and the second sub-data has an error; and storing the second data and the third error detecting code into a rewritable non-volatile memory module.
    Type: Grant
    Filed: September 28, 2019
    Date of Patent: April 20, 2021
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Li-Chun Liang
  • Patent number: 10985780
    Abstract: Provided herein may be an error correction circuit, and a memory controller and a memory system. The error correction circuit may include an encoder configured to generate a codeword comprising a message part, a first parity part, and a second parity part, and a decoder configured to perform error correction decoding using read values corresponding to at least a portion of the codeword, wherein, the decoder is configured to perform error correction decoding based on a first or a second error correction ability such that error correction decoding using the first error correction ability is performed using partial read values corresponding to a partial codeword including the message part and the first parity part, and error correction decoding using the second error correction ability is performed using read values corresponding to the entire codeword, and wherein the second error correction ability is greater than the first error correction ability.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: April 20, 2021
    Assignee: SK hynix Inc.
    Inventors: Dae Sung Kim, Kwang Hyun Kim
  • Patent number: 10977125
    Abstract: A data storage system performs operations including receiving a data write command specifying data to be written; selecting an irregular LDPC encoding scheme of a plurality of available irregular LDPC encoding schemes available to the encoder in accordance with (i) a working mode of the data storage system, (ii) device-specific criteria and/or (iii) a data type of the specified data; and encoding the specified data to be written using the selected irregular LDPC encoding scheme.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: April 13, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Evgeny Mekhanik, Ran Zamir, Eran Sharon
  • Patent number: 10979175
    Abstract: Encoded information corresponding to the encoded source frames and the one or more previous frames is unpackaged from each data packet. Each data packet in the plurality contains encoded information corresponding to a source frame in a sequence encoded at a first bitrate and one or more previous frames in the sequence encoded as forward error correction (FEC) frames at a second bitrate that is equal to or lower than the first bitrate. The encoded source frames are decoded to generate corresponding decoded source frames. Encoded FEC frames that correspond to a given source frame for which encoded information is missing are decoded to generate corresponding decoded FEC frames. A reconstructed frame is generated corresponding to the given source frame using the one or more decoded FEC frames. The decoded source to frames and the reconstructed missing frame are stored in a memory and/or presented with a display.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: April 13, 2021
    Assignee: SONY INTERACTIVE ENTERTAINMENT LLC
    Inventors: Kim-Huei Low, Kelvin Yong
  • Patent number: 10979210
    Abstract: Techniques for handling synchronization headers for serial data transmission with multi-level signaling are described. In an example, a transmitter includes a multiplexer circuit configured to serialize an input signal to generate an output bit sequence having a plurality of bits between pairs of synchronization header bits. The transmitter includes a re-ordering circuit, coupled to the multiplexer circuit to receive the output bit sequence, configured to re-order the output bit sequence by moving at least one of the plurality of bits between the synchronization header bits in each of the pairs of synchronization header bits. The transmitter includes an output driver circuit configured to drive the re-ordered output bit sequence onto a transmission medium.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: April 13, 2021
    Assignee: XILINX, INC.
    Inventor: Ben J. Jones
  • Patent number: 10970363
    Abstract: Examples are disclosed that relate to reading stored data. The method comprises obtaining a representation of a measurement performed on a data-storage medium, the representation being based on a previously recorded pattern of data encoded in the data-storage medium in a layout that defines a plurality of data locations. The method further comprises inputting the representation into a data decoder comprising a trained machine-learning function, and obtaining from the data decoder, for each data location of the layout, a plurality of probability values, wherein each probability value is associated with a corresponding data value and represents the probability that the corresponding data value matches the actual data value in the previously recorded pattern of data at a same location in the layout.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: April 6, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ioan Alexandru Stefanovici, Benn Charles Thomsen, Alexander Lloyd Gaunt, Antony Ian Taylor Rowstron, Reinhard Sebastian Bernhard Nowozin
  • Patent number: 10965398
    Abstract: A transmitter and receiver of a broadcasting signal and a method of processing the broadcasting signal are provided. The transmitter includes: a segmenter configured to segment an L1 signaling of a frame into a plurality of segmented L1 signalings such that each of the segmented L1 signalings has bits a number of which is equal to or smaller than a predetermined number; and an encoder configured to perform a Bose, Chaudhuri, Hocquenghem (BCH) and a low density parity check (LDPC) encoding, or the LDPC encoding without the BCH encoding, with respect to the segmented L1 signalings.
    Type: Grant
    Filed: June 17, 2019
    Date of Patent: March 30, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-sil Jeong, Se-ho Myung, Kyung-joong Kim
  • Patent number: 10965399
    Abstract: Method and apparatus for transmission and reception with polar codes are provided to support up to 16 permutations or transformation mappings. For example, 16 versions of copies able to be soft-combined for PBCH or any other data channel or control channel are suggested if the mother code length is 256 or 512 or 1024. With the new design, up to 16 different versions can be used to soft combined to improve the performance. Some sequences are provided as examples to support 16 different permutation patterns. The inverse of these sequences also have the feature to support 16 different permutation patterns.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: March 30, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Vladimir Gritsenko, Aleksei Eduardovich Maevskii, Hejia Luo, Rong Li, Jun Wang
  • Patent number: 10951408
    Abstract: A method for securing a blockchain and incentivizing the storage of blockchain data using a publicly verifiable proof of retrievability (PoR) includes receiving a PoR transaction having a PoR proof; determining whether the PoR proof is a verified PoR proof; and based upon determining that the PoR proof is a verified PoR proof, incorporating, by a block creator node, the PoR transaction into a new block of the blockchain.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: March 16, 2021
    Assignee: NEC CORPORATION
    Inventors: Wenting Li, Ghassan Karame
  • Patent number: 10951241
    Abstract: A transmitting device for generating a digital television broadcast signal incudes circuitry configured to receive data to be transmitted in a digital television broadcast signal and perform LDPC (low density parity check) encoding on input bits of the received data according to a parity check matrix initial value table of an LDPC code having a code length of 16200 bits and a code rate of 10/15 to generate an LDPC code word. The LDPC code enables error correction processing to correct errors generated in a transmission path of the digital television broadcast signal. The LDPC code word includes information bits and parity bits, the parity bits being processed by the receiving device to recover information bits corrupted by transmission path errors.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: March 16, 2021
    Assignee: Saturn Licensing LLC
    Inventors: Yuji Shinohara, Makiko Yamamoto
  • Patent number: 10944508
    Abstract: This application provides a data processing method and a communications device. The data processing method includes: determining, by a first communications device, NCB, based on a size of the circular buffer of the communications device and an information processing capability of a second communications device; and obtaining, by the first communications device, a second encoded bit segment from a first encoded bit segment having a length of NCB. According to the data processing method and the communications device provided in this application, decoding complexity of the communications device can be reduced and communication reliability can be improved.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: March 9, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Chen Zheng, Liang Ma, Xin Zeng, Xiaojian Liu, Yuejun Wei
  • Patent number: 10944476
    Abstract: The present invention is directed to data communication system and methods. More specifically, various embodiments of the present invention provide a communication interface that is configured to transfer data at high bandwidth using nDSQ format(s) over optical communication networks. In certain embodiments, the communication interface is used by various devices, such as spine switches and leaf switches, within a spine-leaf network architecture, which allows large amount of data to be shared among servers.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: March 9, 2021
    Assignee: INPHI CORPORATION
    Inventors: Jamal Riani, Sudeep Bhoja
  • Patent number: 10944425
    Abstract: Devices and methods are disclosed for generating on the basis of a first protograph matrix P1 of size m×n, wherein the first protograph matrix P1 defines a first code H1, a second protograph matrix P2 of size (m+d)×(n+d), wherein the second protograph matrix P2 defines a second code H2. The device comprises a processor configured to: generate an auxiliary protograph matrix P? of size (m+d1)×(n+d1) on the basis of the first protograph matrix P1 using row splitting; generate d2 random integer numbers, wherein d2=d?d1; generate a binary matrix M of size d2×(n?m), wherein rows of the binary matrix M are generated on the basis of the d2 random integer numbers; generate a matrix M? by lifting the binary matrix M; Other operation steps are also included.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: March 9, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Vasily Stanislavovich Usatyuk, Nikita Andreevich Polianskii, Ilya Viktorovich Vorobyev
  • Patent number: 10944429
    Abstract: A data accessing method using data protection with aid of a parity check matrix having partial sequential information, and associated apparatus such as memory device, memory controller, and decoding circuit thereof are provided. The data accessing method may include: in response to a read request, starting receiving protected data corresponding to the read request from predetermined storage space; generating the parity check matrix; performing syndrome calculation based on the parity check matrix according to a codeword to generate and output a syndrome for the codeword; performing error detection according to the syndrome to generate and output a decoding result signal, and performing error location decoding according to the syndrome to generate and output an error location; performing error correction of the codeword, to correct an error at the error location of the codeword; and performing further processing according to the one or more codewords obtained from the protected data.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: March 9, 2021
    Assignee: Silicon Motion, Inc.
    Inventor: Tsung-Chieh Yang
  • Patent number: 10938514
    Abstract: A data transmission method, a data sending device, and a data receiving device are provided. The method includes: encoding, by a data sending device, information data by using a low-density parity-check (LDPC) code matrix, to obtain a bit sequence, where the bit sequence includes a first bit sequence, and the first bit sequence includes at least one information bit in the bit sequence; interleaving, the first bit sequence to obtain a first interleaved bit sequence; performing, modulation based on the first interleaved bit sequence to obtain a sending signal, and sending the sending signal. The method also includes: demodulating, by a data receiving device, a receiving signal to obtain a soft value sequence; and de-interleaving, the soft value sequence, to obtain a soft value sequence of a first bit sequence. This can improve a capability of an LDPC code resisting burst interference.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: March 2, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Xiaojian Liu, Yuejun Wei, Xin Zeng
  • Patent number: 10931397
    Abstract: This application provides a method for communicating a modulation and coding scheme (MCS). A terminal device obtains a modulation order, a code rate, or a spectral efficiency, determines an index of a reference MCS from a mapping table based on the obtained modulation order, code rate, or spectral efficiency, and reports the index of the reference MCS to a network device. The mapping table includes one or more mapping relationships between an MCS index and a modulation order, a code rate, or a spectral efficiency. The terminal device may process uplink or downlink data based on the determined MCS, thereby improving data transmission reliability.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: February 23, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jian Wang, Lingchen Huang, Yunfei Qiao, Rong Li, Jun Wang, Yinggang Du, Yiqun Ge
  • Patent number: 10931307
    Abstract: Devices and techniques for variable read throughput control in a storage device are described herein. Bits from can be received for a read that is one of several types assigned to reads. A low-density parity-check (LDPC) iteration maximum can be set based on the type. LDPC iterations can be performed up to the LDPC iteration maximum and a read failure signaled in response to the LDPC iterations reaching the LDPC iteration maximum.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: February 23, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Xiangang Luo, Ting Luo
  • Patent number: 10931400
    Abstract: The present disclosure relates to a 5G or pre-5G communication system for supporting a higher data transmission rate beyond the 4G communication system such as LTE. A decoding method using a polar code according to an embodiment of the present disclosure comprises the steps of: determining a first function for decoding input bits and a second function, which is independent from a log likelihood ratio (LLR) value of a previous input bit by the first function; and decoding the input bits in parallel using the first function and the second function. Also, the method comprises the steps of: determining an internal frozen bit using at least one input frozen bit which has a predetermined value of a predetermined position from among the input bits; and determining LLR values for layer bits sequentially from the higher layers of N layers.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: February 23, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Jang, Woo-Myoung Park, Jae-Yoel Kim, Seok-Ki Ahn, Chi-Woo Lim
  • Patent number: 10924210
    Abstract: Embodiments provide a polar code encoding and decoding method in a communications system. Under the method, a basic quantized sequence can be obtained. The basic quantized sequence includes a quantized value used to represent reliability corresponding to a polarized subchannel. A target quantized sequence based on the basic quantized sequence can also be obtained. A relative magnitude relationship between elements in the target quantized sequence is nested with a relative magnitude relationship between elements in the basic quantized sequence. K largest quantized values in the target quantized sequence can be determined based on a non-fixed bit length K and polarized subchannels corresponding to the K largest quantized values can be used as a non-fixed bit position set. Polar code encoding or decoding can be performed based on the non-fixed bit position set.
    Type: Grant
    Filed: September 2, 2019
    Date of Patent: February 16, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Ying Chen, Rong Li, Huazi Zhang, Hejia Luo, Gongzheng Zhang
  • Patent number: 10922964
    Abstract: A method is disclosed, performed by at least one apparatus, the method comprising: obtaining probe data comprising a plurality of probe samples of a multi-dimensional probe sample space, the probe data being representative of a potentially multi-modal traffic scenario; performing a cluster analysis for at least a part of the probe samples of the probe data, said cluster analysis comprising: associating at least a part of the probe samples with respective clusters, each cluster being representative of a mode of the potentially multi-modal traffic scenario.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: February 16, 2021
    Assignee: HERE GLOBAL B.V.
    Inventor: James Fowe
  • Patent number: 10924135
    Abstract: In a multi-antenna communication system using LDPC codes, a simple method is used to effectively improve the received quality by performing a retransmittal of less data without restricting applicable LDPC codes. In a case of a non-retransmittal, a multi-antenna transmitting apparatus transmits, from two antennas, LDPC encoded data formed by LDPC encoding blocks. In a case of a retransmittal, the multi-antenna transmitting apparatus uses a transmission method, in which the diversity gain is higher than in the previous transmission, to transmit only a part of the LDPC encoded data as previously transmitted. For example, the only the part of the LDPC encoded data to be re-transmitted is transmitted from the single antenna.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: February 16, 2021
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Yutaka Murakami, Kiyotaka Kobayashi, Choo Eng Yap
  • Patent number: 10924136
    Abstract: The present technology relates to a transmission device, a transmission method, a reception device, and a reception method for securing good communication quality in data transmission using an LDPC code. LDPC coding for information bits with an information length K=N×r is performed on the basis of an extended parity check matrix having rows and columns each extended by a predetermined puncture length L with respect to a parity check matrix of an LDPC code with a code length N of 69120 bits and a coding rate r of 14/16, so that an extended LDPC code having parity bits with a parity length M=N+L?K is generated. Then, a head of the information bits of the extended LDPC code is punctured by a puncture length L, so that a punctured LDPC code with the code length N of 69120 bits and the coding rate r is generated. The extended parity check matrix includes an information matrix portion corresponding to the information bits and a parity matrix portion corresponding to the parity bits.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: February 16, 2021
    Assignee: SONY CORPORATION
    Inventors: Makiko Yamamoto, Yuji Shinohara
  • Patent number: 10911069
    Abstract: Disclosed herein are memory devices, systems, and methods of content-aware decoding of encoded data. In one aspect, an encoded data chunk is received and one or more characteristics, such as source statistics, are determined. A similar data chunk (that may, e.g., contain data of a similar type) with comparable statistics may be sought. The similar data chunk may, for example, have source statistics that are positively correlated to the source statistics of the encoded data chunk to be decoded. Decoder parameters for the encoded data may be set to correspond with decoder parameters suited to the similar data chunk. The encoded data chunk is decoded using the new decoder parameters. Decoding encoded data based on content can enhance performance, reducing decoding latency and/or power consumption.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: February 2, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Stella Achtenberg, Omer Fainzilber, Dudy David Avraham
  • Patent number: 10908987
    Abstract: An error handling technique for a computing device includes detecting a memory error during execution of the program instructions to generate a computational result, and generating an error message containing information about the memory error. The error message can be stored in a notification memory space, and be made available for access, for example, by a host system. The execution of the program instructions is allowed to continue to generate the computational result despite detecting the memory error. When the computation result becomes available, a confidence level of the computational result can be determined based on which program instruction or which computational stage resulted in the memory error. The confidence level can be used to assess whether the computational result is acceptable.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: February 2, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Amit Pandey, Ron Diamant
  • Patent number: 10911068
    Abstract: There are provided an error correction circuit and a method of operating the same. The circuit may performs error correction decoding within a maximum global iteration number G, and may include a mapper configured to generate read values quantized into g+1 levels to be used in a g-th global iteration by using read values corresponding to g number of read voltages, a node processing component configured to perform error correction decoding, during the g-th global iteration, by using the read values quantized into g+1 levels, a syndrome information management component configured to manage syndrome information corresponding to the g-th global iteration, and a global iteration control component configured to, when error correction decoding fails in the g-th global iteration, determine whether the syndrome information corresponding to the g-th global iteration satisfies a condition defined in a global iteration skip policy, and decide whether to skip (g+1)th to (G?1)th global iterations.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: February 2, 2021
    Assignee: SK hynix Inc.
    Inventor: Kyung Bum Kim
  • Patent number: 10892776
    Abstract: A memory controller for use in a data storage device is provided. A low-density parity check (LDPC) process performed by the memory controller includes an initial phase, a decoding phase, and an output phase. The memory controller includes a variable-node circuit and a check-node circuit. During each LDPC decoding iterative operation in the decoding phase: the check-node circuit obtains a codeword difference from the variable-node circuit, and calculates a syndrome according to the codeword difference. The variable-node circuit is configured to: determine a syndrome weight according to the syndrome from the check-node circuit; obtain a previous codeword from a variable-node memory without obtaining a channel value from a channel-value memory; perform bit-flipping on one or more codeword bits in the previous codeword according to the calculated syndrome weight to generate an updated codeword; and subtract the previous codeword from the updated codeword to obtain the codeword difference.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: January 12, 2021
    Assignee: SILICON MOTION, INC.
    Inventor: Shiuan-Hao Kuo
  • Patent number: 10892874
    Abstract: A first channel for carrying Layer 2 messages carries data that will not be retransmitted and for which decoding-related information need not be retained by the receiving node in the event of an unsuccessful decoding of the data, while a second channel carries data that will be retransmitted in the event that a negative acknowledgement is received by the transmitting node. In an example method, first and second subsets of Layer 2 messages are received on first and second physical data channels, respectively. Decoding-related information for unsuccessfully decoded messages in the first subset is retained for use with subsequent retransmissions, while decoding-related information for unsuccessfully decoded messages in the second subset is discarded without waiting for retransmissions. Acknowledgements or negative acknowledgements are sent for messages in the first subset, but may or may not be sent for messages in the second subset, in various embodiments.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: January 12, 2021
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Jonas Fröberg Olsson, Erik Eriksson, Pål Frenger, Martin Hessler
  • Patent number: 10892784
    Abstract: Disclosed herein are memory devices, systems, and methods of encoding and decoding data. In one aspect, an encoded data chunk is received and segmented into data segments with similar features. Each segment can be decoded based on its features. Data can also be rearranged and partitioned so as to minimize an entropy score that is based on the size and entropy of the data partitions. The approach is capable of enhancing performance, reducing decoding latency, and reducing power consumption.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: January 12, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dudy Avraham, Omer Fainzilber, Tommer Kuper Lotan, Eran Sharon, Ofir Pele, Stella Achtenberg, Ran Zamir