Disk Array Patents (Class 714/770)
  • Patent number: 8489916
    Abstract: A multi-disk fault-tolerant system, a method for generating a check block, and a method for recovering a data block are provided. The multi-disk fault-tolerant system includes a disk array and a calculation module connected through a system bus, the disk array is formed by p disks, and a fault-tolerant disk amount of the disk array is q; data in the disk array is arranged according to a form of a matrix M of (m+q)×p, where m is a prime number smaller than or equal to p?q; in the matrix M, a 0th row is virtual data blocks being virtual and having values being 0, a 1st row to an (m?1)th row are data blocks, an mth row to an (m+q?1)th row are check blocks. Therefore, during a procedure of generating the check block and recovering the data block in the multi-disk fault-tolerant system, calculation complexity is lowered.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: July 16, 2013
    Assignees: Chengdu Huawei Symantec Technologies Co., Ltd., University of Electronic Science and Technology of China
    Inventors: Yulin Wang, Jianye Yao
  • Patent number: 8484537
    Abstract: A system including a first buffer module, a first encoder module, a control module, and a second buffer module. The first buffer module receives (i) a first block and (ii) a first logical block address (LBA) for the first block from a host, where the first block includes first data. The first encoder module generates a first checksum based on (i) the first data and (ii) the first LBA. The control module generates a second block, where the second block includes (i) the first data, (ii) the first LBA, and (iii) the first checksum. The second buffer module receives a third block from the first buffer module, where the third block includes a second LBA. The second buffer module determines whether the third block is different than the first block depending on whether the second LBA in the third block is different than the first LBA in the second block.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: July 9, 2013
    Assignee: Marvell International Ltd.
    Inventors: Tang Heng, Gregory Burd, Soichi Isono, Son Hong Ho, Vincent Wong, Zining Wu
  • Publication number: 20130173996
    Abstract: An accelerated erasure coding system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The processing core, storage medium, and computer instructions are configured to implement an erasure coding system, which includes: a data matrix for holding original data in the main memory; a check matrix for holding check data in the main memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the check data; and a thread for executing on the processing core. The thread includes: a parallel multiplier for concurrently multiplying multiple entries of the data matrix by a single entry of the encoding matrix; and a first sequencer for ordering operations through the data matrix and the encoding matrix using the parallel multiplier to generate the check data.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 4, 2013
    Inventors: Michael H. Anderson, Sarah Mann
  • Patent number: 8458515
    Abstract: A system and method for supporting asynchronous write operations within data storage systems and repairing a failed component within data storage subsystems without interruption of service. A data storage cluster is coupled to a client. The cluster comprises a plurality of data storage locations addressable as rows and columns in an array. Each column of the array comprises a separate computer of a plurality of computers interconnected to each other via a network. A coordinating column corresponding to a particular row receives data from the client for storage in the row and sends an indication of storage completion to the client, in response to forwarding the received data to data storage locations within the row. Although the client receives a write complete status before the data is actually written in corresponding computers, the cluster has sufficient information to complete the write operation even in the event of a column being temporarily offline.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: June 4, 2013
    Assignee: Symantec Corporation
    Inventor: Tariq Saeed
  • Publication number: 20130132801
    Abstract: Provided are a method, system, and article of manufacture for error checking addressable blocks in storage. Addressable blocks of data are stored in a storage in stripes, wherein each stripe includes a plurality of data blocks for one of the addressable blocks and at least one checksum block including checksum data for the addressable block. A write request is received to modify data in one of the addressable blocks. The write and updating the checksum are performed in the stripe having the modified addressable block. An indication is made to perform an error checking operation on the stripe for the modified addressable block in response to the write request, wherein the error checking operation reads the data blocks and the checksum in the stripe to determine if the checksum data is accurate. An error handling operation is initiated in response to determining that the checksum data is not accurate.
    Type: Application
    Filed: January 15, 2013
    Publication date: May 23, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: International Business Machines Corporation
  • Patent number: 8448256
    Abstract: According to an embodiment, a programmable logic device includes a plurality of logic blocks, memory and a logic unit. The logic blocks are grouped into one or more partitions. The memory stores authentication and partition information uploaded to the programmable logic device prior to partition programming. The logic unit authenticates programming access to the one or more partitions based on the authentication information and controls programming of the one or more partitions based on the partition information.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: May 21, 2013
    Assignee: Infineon Technologies AG
    Inventors: Joerg Borchert, Jurijus Cizas, Shrinath Eswarahally, Mark Stafford, Rajagopalan Krishnamurthy
  • Patent number: 8448018
    Abstract: The present disclosure includes methods and devices for stripe-based memory operation. One method embodiment includes writing data in a first stripe across a storage volume of a plurality of memory devices. A portion of the first stripe is updated by writing updated data in a portion of a second stripe across the storage volume of the plurality of memory devices. The portion of the first stripe is invalidated. The invalid portion of the first stripe and a remainder of the first stripe are maintained until the first stripe is reclaimed. Other methods and devices are also disclosed.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: May 21, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Joseph M. Jeddeloh
  • Patent number: 8448044
    Abstract: A method begins by a processing module determining a retrieval threshold for retrieving a set of encoded data slices from a dispersed storage network (DSN), wherein the set of encoded data slices represents data encoded using a dispersed storage error encoding function having a pillar width of “n”, a decode threshold of “k”, and an encoding ratio of n?k>k and wherein the retrieval threshold is in accordance with the encoding ratio. The method continues with the processing module issuing data retrieval requests to the DSN for the set of encoded data slices and receiving encoded data slices of the set of encoded data slices to produce received encoded data slices. The method continues with the processing module decoding the received encoded data slices to recapture the data when a number of received encoded data slices compares favorably to the retrieval threshold.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: May 21, 2013
    Assignee: Cleversafe, Inc.
    Inventors: Greg Dhuse, Ilya Volvovski, Andrew Baptist, Sebastien Vas, Zachary J. Mark
  • Patent number: 8448047
    Abstract: A storage device is for restoring the data saved in a nonvolatile memory to a cache memory, even if there is not a read response from the nonvolatile memory. In a data saving operation, parity data of to-be-saved data is generated, and the to-be-saved data and the parity data having CRCs and AIDs added thereto are written into a flash memory. In a data restoring operation, if an operation to read data from the flash memory is not completed within a predetermined period of time, the data reading operation is suspended, and additional data is set. The to-be-saved data having a data error corrected with the parity data is then written into the cache memory.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: May 21, 2013
    Assignee: Fujitsu Limited
    Inventors: Nina Tsukamoto, Sadayuki Ohyama, Yuji Hanaoka
  • Patent number: 8443264
    Abstract: A disk array apparatus includes a plurality of magnetic disks, and a RAID controller that generates redundancy data for host data received from a host apparatus by a primitive polynomial of Galois extension field, generates a redundancy code for the host data and the redundancy data, the redundancy code is a cyclic code calculated by a generating polynomial identical to the primitive polynomial, and writes the host data and the redundancy data to the plurality of magnetic disks.
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: May 14, 2013
    Assignee: NEC Corporation
    Inventor: Shigeru Suganuma
  • Publication number: 20130117634
    Abstract: A memory system comprises a nonvolatile memory device comprising a memory cell array comprising first and second memory blocks, and a memory controller configured to control the nonvolatile memory device to read data from the first memory block, selectively determine an error correction operation to be performed on the data after it is read from the first memory block based on a state of at least one of the first and second memory blocks, and then store the data in the second memory block.
    Type: Application
    Filed: September 6, 2012
    Publication date: May 9, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Hyun JOO, Kitae PARK, Sangyong YOON, Jaeyong JEONG
  • Patent number: 8438456
    Abstract: A method begins by a processing module receiving streaming data and dispersed storage resource configuration information. The method continues with the processing module allocating a plurality of sets of dispersed storage resources, obtaining error coding dispersed storage function parameters, and partitioning the streaming data into a plurality of data streams in accordance with the dispersed storage resource configuration information when the dispersed storage resource configuration information requires a plurality of sets of dispersed storage resources. In addition, the method continues with the processing module converting, via the plurality of sets of dispersed storage resources, the plurality of data streams into pluralities of sets of error coded data slices in accordance with the error coding dispersed storage function parameters.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: May 7, 2013
    Assignee: Cleversafe, Inc.
    Inventors: Gary W. Grube, Timothy W. Markison
  • Patent number: 8433976
    Abstract: Interleaver designs and interleaving methods that perform block-wise interleaving by reading blocks into and out of memories, where a block can be written to the memory before another block has finished being read out of the memory, without data clashes, are provided. Corresponding deinterleavers and deinterleaving methods are disclosed.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: April 30, 2013
    Assignee: Altera Corporation
    Inventor: Suleyman Sirri Demirsoy
  • Patent number: 8433978
    Abstract: A method begins by a processing module receiving a plurality of requests to record a broadcast of data. The method continues with the processing module encoding the data using an error coding dispersal storage function to produce a plurality of sets of encoded data slices when the data is broadcast and in response to a request of the plurality of requests. The method continues with the processing module generating a unique retrieval matrix for each of the plurality of requests based on an identity of a requesting device and the error coding dispersal storage function to produce a plurality of unique retrieval matrixes. The method continues with the processing module storing the plurality of sets of encoded data slices and the plurality of unique retrieval matrixes in a dispersed storage network memory as a plurality of unique copies of the data.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: April 30, 2013
    Assignee: Cleversafe, Inc.
    Inventors: Gary W. Grube, Timothy W. Markison
  • Patent number: 8433979
    Abstract: Embodiments of the invention relate to storing data in a storage array. An aspect of the invention includes receiving write data. The write data is arranged into “r” rows and “n” columns of pages, with each page including a plurality of sectors. The write data is encoded using a plurality of horizontal and vertical erasure correcting codes on the pages. The encoding allows recovery from up to tr erasures in any one of the r rows, up to tr?1 erasures in any one of the remaining r?1 rows, up to tr?2 erasures in any one of the remaining r?2 rows, and so on, such that the encoding allows recovery from up to t1 erasures in the last remaining row. Encoded write data is output from the encoding. The encoded write data is written as a write stripe across n storage devices in a storage array.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: April 30, 2013
    Assignee: International Business Machines Corporation
    Inventors: Mario Blaum, James L. Hafner, Steven R. Hetzler
  • Patent number: 8433977
    Abstract: A storage device is disclosed comprising control circuitry. A write command is received from a host, wherein the write command comprises a host block and corresponding host block address. The host block is partitioned into a plurality of sub blocks, and a plurality of sub block addresses are generated in response to the host block address, wherein each sub block address corresponds to one of the sub blocks. Error detection code (EDC) data is generated for each sub block in response to the sub block and corresponding sub block address. Each sub block and corresponding EDC data are combined to generate a plurality of partial codewords that are written to one or more data sectors corresponding to the sub block addresses.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: April 30, 2013
    Assignee: Western Digital Technologies, Inc.
    Inventors: Steven R. Vasquez, Patrick J. Lee
  • Patent number: 8413029
    Abstract: Methods and structure described herein provide for adjusting an error correction capability of an LDPC error correction code. For example, the system of one embodiment includes a decoder adapted to decode data that has been encoded with a LDPC error correction code. The system also includes a detector communicatively coupled to the decoder and adapted to estimate bit values in the data prior to decoding by the decoder. The detector is further adapted to change bit values based on bit value estimations to reduce the error correction capability of the LDPC error correction code. The reduction in error correction capability is adjustable such that sector failure rates of storage devices may be incrementally analyzed.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: April 2, 2013
    Assignee: LSI Corporation
    Inventors: Richard Rauschmayer, Hongwei Song
  • Patent number: 8402346
    Abstract: An n-way parity protection technique enables recovery of up to n storage device (e.g., disk) failures in a parity group of a storage array encoded to protect against n-way disk failures. The storage array is created by first configuring the array with m data disks, where m=p?1 and p is a prime number and a row parity disk. n?1 diagonal parity disks are then added to the array. Each diagonal parity set (i.e., diagonal) is associated with a slope that defines the data and row parity blocks of the array that are included in the diagonal. All diagonals having a common slope within a parity group are organized as a diagonal parity class. For each diagonal parity class, a diagonal parity storage disk is provided to store the diagonal parity.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: March 19, 2013
    Assignee: NetApp, Inc.
    Inventors: Atul Goel, Peter F. Corbett
  • Patent number: 8397107
    Abstract: A data storage device is disclosed comprising a non-volatile memory including a plurality of memory segments. A write command is received comprising a logical block address (LBA) and user data. The LBA is mapped to a physical block address (PBA) for addressing one of the memory segments. First error code redundancy is generated in response to the LBA, and second error code redundancy in response to the PBA. User data and the first and second error code redundancy are written to the memory segment addressed by the PBA.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: March 12, 2013
    Assignee: Western Digital Technologies, Inc.
    Inventors: Mei-Man L. Syu, William B. Boyle
  • Patent number: 8392805
    Abstract: Erasure-encoded data is stored across a plurality of storage devices in a data storage system. The erasure-encoded data includes k data elements to store on k data storage devices and m parity elements to store on m parity storage devices, wherein for a given minimum Hamming distance d of the data storage system and m?(d?1), data elements are assigned only to corresponding unique combinations of parity elements of size (d?1).
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: March 5, 2013
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: John Johnson Wylie, Xiaozhou Li
  • Patent number: 8386889
    Abstract: A control module includes an encoder module, which generates a first code word for multiple drives. A detector module, in response to detecting an error in a first drive subsequent to generation of the first code word, initiates replacement of the first drive with a second drive. The encoder module generates a second code word for the second drive. A mapping module maps physical locations of data in the drives to logical locations of the first code word, assigns a predetermined value to one of the logical locations corresponding to the first drive to identify an unused logical location, and assigns the unused logical location to the second drive based on the predetermined value. A difference module generates a third code word based on the first and second code words. The encoder module generates an updated code word for the multiple drives based on the first and third code words.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: February 26, 2013
    Assignee: Marvell International Ltd.
    Inventors: Heng Tang, Zining Wu, Gregory Burd, Pantas Sutardja
  • Publication number: 20130047052
    Abstract: The subject disclosure describes a method for performing error code correction, the method comprising, loading a code word comprising a plurality of encoded bits into a memory array, initializing, into one or more of a plurality of memory units, a plurality of bits associated with each of the encoded bits, wherein the plurality of bits initialized for each of the encoded bits is based on a value of the associated encoded bit and wherein the plurality of encoded bits and the plurality of bits initialized for each of the encoded bits comprises soft information. In certain aspects, the method further comprises decoding the code word using the soft information and outputting the decoded code word from the memory array. A decoder and flash storage device are also provided.
    Type: Application
    Filed: June 15, 2012
    Publication date: February 21, 2013
    Applicant: STEC, Inc.
    Inventors: Levente Peter Jakab, Dillip K. Dash
  • Patent number: 8375274
    Abstract: A disk drive is disclosed comprising a disk and a head actuated over the disk. The disk comprises a plurality of tracks, wherein each track comprises a plurality of data sectors including a parity sector, the parity sector comprising at least a P0 parity codeword and a P1 parity codeword. A plurality of data sectors are read from the disk (including the parity sector) to generate a plurality of data codewords CW0-CWn. The data sectors are decoded using an error correction code (ECC) decoder. When a single data codeword in CW0-CWn is unrecoverable using the ECC decoder, the single data codeword is recovered using the P0 parity codeword. When two data codewords in CW0-CWn are unrecoverable using the ECC decoder, the two data codewords are recovered using the P0 and P1 parity codewords.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: February 12, 2013
    Assignee: Western Digital Technologies, Inc.
    Inventor: Carl E. Bonke
  • Publication number: 20130036340
    Abstract: A method for computing and storing parity information in a RAID system includes dividing each segment in a stripe into a data block and a parity block, and storing in each parity block, parity information for a limited number of other data blocks in the stripe. A method for rebuilding data in a RAID system includes rebuilding the data from parity information and storing the rebuilt data on reserve portions of the remaining disks in the system.
    Type: Application
    Filed: August 4, 2011
    Publication date: February 7, 2013
    Applicant: LSI CORPORATION
    Inventors: Kevin Kidney, Kenneth Day
  • Patent number: 8370717
    Abstract: A method and apparatus uses a flexible buffering scheme in an XOR engine to generate checksums, allowing a user to recover data when a disk drive partly or completely fails. An XOR engine may include three or more arithmetic units and three or more local result buffers, which may be used to generate a combination of any of a “P” checksum, a “Q” checksum, and an unmodified copy of the user data, in a single read. The local result buffers and arithmetic units allow the use of multiple Galois field Multiply coefficients so that multiple distinct “Q” checksums may be generated with only one read of the user data.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: February 5, 2013
    Assignee: Marvell International Ltd.
    Inventors: David Geddes, Xinhai Kang
  • Patent number: 8370715
    Abstract: Provided are a method, system, and article of manufacture for error checking addressable blocks in storage. Addressable blocks of data are stored in a storage in stripes, wherein each stripe includes a plurality of data blocks for one of the addressable blocks and at least one checksum block including checksum data derived from the data blocks for the addressable block. A write request is received to modify data in one of the addressable blocks. The write and updating the checksum are performed in the stripe having the modified addressable block. An indication is made to perform an error checking operation on the stripe for the modified addressable block in response to the write request, wherein the error checking operation reads the data blocks and the checksum in the stripe to determine if the checksum data is accurate. An error handling operation is initiated in response to determining that the checksum data is not accurate.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: February 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: James Lee Hafner, David Ray Kahler, Robert Akira Kubo, David Frank Mannenbach, Karl Allen Nielsen, James A. O'Connor, Krishnakumar Rao Surugucchi, Richard B. Stelmach
  • Patent number: 8365043
    Abstract: A method of storing data is disclosed. A set of data blocks, including a plurality of proper subsets of data blocks, is stored. A plurality of first-level parity blocks is generated, wherein each first-level parity block is generated from a corresponding proper subset of data blocks within the plurality of proper subsets of data blocks without reference to other data blocks not in the corresponding proper subset. A second-level parity block is generated, wherein the second level parity block is generated from a plurality of data blocks included in at least two of the plurality of proper subsets of data blocks, and wherein recovery of a lost block in a given proper subset of data blocks is possible without reference to any data blocks not in the given proper subset.
    Type: Grant
    Filed: March 4, 2012
    Date of Patent: January 29, 2013
    Assignee: EMC Corporation
    Inventors: Christopher R. Lumb, R. Hugo Patterson
  • Patent number: 8352831
    Abstract: A method begins by a processing module determining whether to error encode broadcast data. The method continues with the processing module encoding a portion of the broadcast data using an error coding storage dispersal function to produce a set of encoded broadcast data slices, determining whether to compress the set of encoded broadcast data slices for the set of encoded broadcast data slices, and when the set of encoded broadcast data slices is to be compressed, selecting a subset of encoded broadcast data slices of the set of encoded broadcast data slices, when the broadcast data is to be error encoded.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: January 8, 2013
    Assignee: Cleversafe, Inc.
    Inventors: S. Christopher Gladwin, Kumar Abhijeet, Greg Dhuse, Jason K. Resch, Gary W. Grube, Timothy W. Markison
  • Patent number: 8347184
    Abstract: A cloud storage data access method, apparatus and system are provided to enhance data availability and fault tolerance of cloud storage. In accordance with the present application, data redundancy at a cloud storage data center level is created by creating parity values of original data to be stored through parity calculation on a data transmitting end and placing the original data, its parity values and the data used to create the original data parity values in different cloud storage data centers, according to a predetermined data redundant storing rule.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: January 1, 2013
    Assignee: Beijing Z & W Technology Consulting Co. Ltd.
    Inventor: Hui Liu
  • Patent number: 8347182
    Abstract: Mechanisms for ensuring data consistency in a data store are provided. The mechanisms access a parity scrub factor f and perform a check on a data group of the data store. The check on the data group includes performing a parity check on a portion of the data group, the portion being equal to 1/f of the data group, and performing a data verify on the remainder of the data group. The performing of the check is repeated for the entire data store. An offset factor is used to select the portion of the data group for the parity check. In this case, the offset factor may be incremented when the performance of the check on the data group of the data store has been repeated for the entire data store.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: January 1, 2013
    Assignee: International Business Machines Corporation
    Inventors: Joanna K. Brown, Matthew J. Fairhurst, Mark B. Thomas
  • Patent number: 8335966
    Abstract: An efficient RAID-6 double parity erasure code scheme. Efficiency is provided by the addition of a single term to a diagonal parity equation. For example, in a five-wide layout (having five physical storage devices) the RAID-6 “parity diagonals” end up with six terms, which are the actual diagonal plus one more data block. As a result, no one data symbol contributes to the erasure code determined from the data symbols, such that no more than n+1 data symbols contribute to any one parity symbol.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: December 18, 2012
    Assignee: Dell Products L.P.
    Inventors: Richard F. Lary, Damon Hsu-Hung
  • Publication number: 20120297272
    Abstract: A method and controller for implementing enhanced input/output (IO) data conversion with an enhanced protection information model including an enhanced parity format of the data integrity fields (DIF), and a design structure on which the subject controller circuit resides are provided. The controller implements a protection information model including a unique parity data integrity fields (DIF) format. The unique parity DIF format enables corruption detection for RAID parity blocks. The unique parity DIF format includes a predefined size for a protection information model logical block guard cyclic redundancy check (CRC) field and a logical block Reference Tag (RT) field. A plurality of storage devices in a RAID configuration are coupled to the controller, and configured to store data and RAID parity redundancy data, and wherein a strength of RAID parity redundancy data is not reduced when a loss of a single storage device in the plurality of storage devices occurs.
    Type: Application
    Filed: May 16, 2011
    Publication date: November 22, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brian E. Bakke, Robert E. Galbraith, Adrian C. Gerhard, Daniel F. Moertl, Rick A. Weckwerth
  • Patent number: 8316259
    Abstract: A method, system and article of manufacture for the storing convolution-encoded data on a redundant array of independent storage devices (RAID) is described. The convolution-encoded data comprises error correction coded data to eliminate the need for parity as used in conventional RAID data storage. The number of storage devices may vary to accommodate expansion of storage capacity and provide on demand storage.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: November 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Daniel James Winarski, Craig A. Klein, Nils Haustein
  • Patent number: 8316273
    Abstract: The invention provides a method for reading information of an optical data storage medium. First, one sector of the optical data storage medium is obtained. The sector is then decoded to check if the sector is reliable. When the sector is not reliable, a data rescue process referring to spec-defined or pre-defined information of the physical specification of the sector is performed in order to obtain disc fundamental information of the optical data storage medium.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: November 20, 2012
    Assignee: Mediatek Inc.
    Inventors: Tai-Liang Lin, Shih-Hsin Chen
  • Patent number: 8307263
    Abstract: A method begins by a processing module determining dispersed storage preferences for streaming multi-media data. The method continues with the processing module transcoding the streaming multi-media data into transcoded data when the dispersed storage preferences include transcoding. In addition, the method continues with the processing module encoding the transcoded data in accordance with an error coding dispersed storage function of the dispersed storage preferences to produce pluralities of error coded data slices. In addition, the method continues with the processing module outputting the pluralities of error coded data slices to a plurality of data storage units for storage therein.
    Type: Grant
    Filed: June 13, 2010
    Date of Patent: November 6, 2012
    Assignee: Cleversafe, Inc.
    Inventors: Gary W. Grube, Timothy W. Markison
  • Patent number: 8301948
    Abstract: A method for adaptively applying an error-correcting code to a storage device is disclosed. A determination is made that a system is in an idle state of input/output requests. First data symbols are copied into a first location within a buffer. First data symbol errors corrected using a first error-correcting code. Second data symbols including corrected bits are written in a second location on the recording media with a second error-correcting code. An error number for the second data symbols in the second location is determined. If the error number is below a first threshold error number, the first data symbols are deleted. If the error number is above the first threshold error number, the second data symbols are deleted.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: October 30, 2012
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Mario Blaum, Kurt A. Rubin, Manfred E. Schabes
  • Patent number: 8301959
    Abstract: An apparatus and method for processing optical information using a low density parity check code are suggested. An optical information recording method includes the steps of encoding data to record into a low density parity check code; representing the data, which is encoded into the low density parity check code, to a spatial light modulator in the unit of a data page; and modulating a recording beam into the data page representing the spatial light modulator to be recorded in the form of hologram in a recording medium. By blocking inexact probability information from being concentrated in the LDPC code block, by achieving exact probability information through effective allocation of a mark, and by improving average accuracy of the pixel, which corresponds to the LDPC code, failure rate of decoding can be minimized so that decoding performance can be improved.
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: October 30, 2012
    Assignee: Maple Vision Technologies Inc.
    Inventor: Bi Woong Chung
  • Publication number: 20120266049
    Abstract: The parallel RS-RAID data storage architecture can aggregate that data and checksums within each cluster into intermediate or partial sums that are transferred or distributed to other clusters. The use of intermediate data symbols, intermediate checksum symbols, cluster configuration information on the assignment of data storage devices to clusters and the operational status of data storage devices, and the like, can reduce the computational burden and latency for the error correction calculations while increasing the scalability and throughput of the parallel RS-RAID distributed data storage architecture.
    Type: Application
    Filed: June 29, 2012
    Publication date: October 18, 2012
    Applicant: Marvell World Trade Ltd.
    Inventor: Arvind PRUTHI
  • Patent number: 8291277
    Abstract: A method begins by a processing module receiving a plurality of record requests to record a broadcast of data. The method continues with the processing module encoding the data using an error coding dispersal storage function to produce a plurality of sets of encoded data slices. The method continues with the processing module generating a list of requesting device identities corresponding to the plurality of requests and storing the plurality of sets of encoded data slices and the list of requesting device identities in a dispersed storage network memory. The method continues with the processing module receiving a playback request from a device identified in the list of requesting device identities, generating a unique retrieval matrix for the device, and outputting a unique plurality of sets of encoded data slices from the plurality of sets of encoded data slices in accordance with the unique retrieval matrix.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: October 16, 2012
    Assignee: Cleversafe, Inc.
    Inventors: Timothy W. Markison, Gary W. Grube
  • Patent number: 8281227
    Abstract: An apparatus, system, and method are disclosed to increase data integrity in a redundant storage system. The receive module receives a read request to read data from a logical page spanning an array of N+P number of storage elements. The array of storage elements includes N number of the storage elements each storing a portion of an ECC chunk and P number of the storage elements storing parity data. The data read module reads data from at least a portion of a physical page on each of X number of storage elements of the N+P number of storage elements where X equals N. The regeneration module regenerates missing data. The ECC module determines if the read data and any regenerated missing data includes an error. The read data combined with any regenerated missing data includes the ECC chunk.
    Type: Grant
    Filed: May 18, 2009
    Date of Patent: October 2, 2012
    Assignee: Fusion-10, Inc.
    Inventors: Jonathan Thatcher, David Flynn, Joshua Aune, Jeremy Fillingim, Bill Inskeep, John Strasser, Kevin Vigor
  • Patent number: 8266501
    Abstract: The present disclosure includes methods and devices for stripe-based memory operation. One method embodiment includes writing data in a first stripe across a storage volume of a plurality of memory devices. A portion of the first stripe is updated by writing updated data in a portion of a second stripe across the storage volume of the plurality of memory devices. The portion of the first stripe is invalidated. The invalid portion of the first stripe and a remainder of the first stripe are maintained until the first stripe is reclaimed. Other methods and devices are also disclosed.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: September 11, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Joseph M. Jeddeloh
  • Patent number: 8266502
    Abstract: A recording/reproducing apparatus includes an encoding section, a decoding section, and a first judging section. The encoding section is configured to encode data that is to be recorded onto a recording medium into an LDPC (Low Density Parity Check) code. The decoding section is configured to decode the LDPC code read out from the recording medium. The judging section is configured to judge a block with a recording error based on one of a block error flag and an iterative decoding count output from the decoding section.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: September 11, 2012
    Assignee: Sony Corporation
    Inventors: Tsutomu Harada, Yoshihiko Deoka, Hisato Hirasaka, Toshihiko Hirose, Toshiyuki Hirose, Osamu Nakamura, Akira Itou
  • Publication number: 20120221926
    Abstract: Embodiments of the invention relate to storing data in a storage array. An aspect of the invention includes receiving write data. The write data is arranged into “r” rows and “n” columns of pages, with each page including a plurality of sectors. The write data is encoded using a plurality of horizontal and vertical erasure correcting codes on the pages. The encoding allows recovery from up to tr erasures in any one of the r rows, up to tr-1 erasures in any one of the remaining r?1 rows, up to tr-2 erasures in any one of the remaining r?2 rows, and so on, such that the encoding allows recovery from up to t1 erasures in the last remaining row. Encoded write data is output from the encoding. The encoded write data is written as a write stripe across n storage devices in a storage array.
    Type: Application
    Filed: February 28, 2011
    Publication date: August 30, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mario Blaum, James L. Hafner, Steven R. Hetzler
  • Patent number: 8250453
    Abstract: When a data write request to a disk drive 210 is received from a host computer 20, a first error detecting code of write data to be written to the disk drive 210 in response to the data write request is generated and stored, write processing of the write data to the disk drive 210 is executed, whether or not response time as time required for the write processing exceeds a predetermined threshold value is determined, data stored in a sector as a writing destination of the write data is read from the sector when the response time exceeds the threshold value, a second error detecting code of the read data is generated, and when the first error detecting code and the second error detecting code are compared with each other and the two codes do not coincide with each other, a signal indicating that the write processing is not normally performed is generated.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: August 21, 2012
    Assignee: Hitachi Ltd.
    Inventor: Hiromi Matsushige
  • Patent number: 8245113
    Abstract: A Redundant Array of Independent Devices uses convolution encoding to provide redundancy of the striped data written to the devices. No parity is utilized in the convolution encoding process. Trellis decoding is used for both reading the data from the RAID and for rebuilding missing encoded data from one or more failed devices, based on a minimal, and preferably zero, Hamming distance for selecting the connected path through the trellis diagram.
    Type: Grant
    Filed: May 5, 2008
    Date of Patent: August 14, 2012
    Assignee: International Business Machines Corporation
    Inventors: Daniel James Winarski, Craig A. Klein, Nils Haustein
  • Patent number: 8239734
    Abstract: A method for data storage includes encoding data with an inter-device Error Correction Code (ECC), and sending the encoded data for storage on two or more storage devices. The data to be stored on each of the storage devices, and which has been encoded with the inter-device ECC, is encoded with an intra-device ECC, and the data encoded with the inter-device and intra-device ECCs is stored on the storage device. After storing the data, at least part of the stored data is retrieved and output by decoding the intra-device and inter-device ECCs, while using information related to one of the intra-device and inter-device ECCs in decoding the other of the intra-device and inter-device ECCs.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: August 7, 2012
    Assignee: Apple Inc.
    Inventor: Ofir Shalvi
  • Publication number: 20120192038
    Abstract: Embodiments of the present invention provide a storage device of a serial-attached small computer system interface/serial advanced technology attachment (PCI-Express) type that supports a low-speed data processing speed for a host. Specifically, the present invention provides a SSD memory system comprising (among other components) a set (at least one) of SSD memory disk units. Each SSD memory disk unit generally comprises (among other components), a host interface unit; a serial-attached small computer system interface (SAS) protocol controller for controlling a SAS protocol of the SSD memory disk unit coupled to the host interface unit; a direct memory access (DMA) controller for controlling access to the SSD memory disk unit coupled to the host interface unit; and a data buffer for buffering data stored in the SSD memory disk unit coupled to the DMA controller.
    Type: Application
    Filed: January 20, 2011
    Publication date: July 26, 2012
    Inventor: Byungcheol Cho
  • Patent number: 8214724
    Abstract: Provided is a transmitter for continuously and sequentially transmitting data with a variable unit for playback. The transmitter includes an obtaining section, a buffer, a computing section and a transmitting section. The obtaining section sequentially obtains segment data of the data to be transmitted. The buffer stores an error correction code to correct an error caused in the data by transmission. The computing section computes, every time newly obtained segment data reaches a predetermined size, XOR of the error correction code already stored in the buffer and the newly obtained segment data, and then updates the error correction code with the computed XOR. The transmitting section sequentially transmits the obtained segment data, as well as reads from the buffer and transmits the updated error correction code every time the computing section computes XOR for data in a size corresponding to the unit for playback.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Toshiro Hiromitsu, Seiichi Idei, Kazuaki Numano, Yasushi Tsukamoto
  • Patent number: 8209577
    Abstract: A “code optimizer” provides various techniques for optimizing arbitrary XOR-based codes for encoding and/or decoding of data. Further, the optimization techniques enabled by the code optimizer do not depend on any underlining code structure. Therefore, the optimization techniques provided by the code optimizer are applicable to arbitrary codes with arbitrary redundancy. As such, the optimized XOR-based codes generated by the code optimizer are more flexible than specially designed codes, and allow for any desired level of fault tolerance. Typical uses of XOR-based codes include, for example, encoding and/or decoding data using redundant data packets for data transmission real-time communications systems, encoding and/or decoding operations for storage systems such as RAID arrays, etc.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: June 26, 2012
    Assignee: Microsoft Corporation
    Inventors: Cheng Huang, Jin Li, Minghua Chen
  • Patent number: 8209587
    Abstract: Embodiments of the present invention disclose a technique for providing an indication whether data stored on a disk drive are invalid. As used herein, invalid data are data written prior to the disk drive being added to an array of the disk drives or data in a block that has become free and which has been removed from the corresponding parity block of the stripe. Knowing that the disk drive was written prior to the drive being added to the existing array or having data which has become invalid allows a storage server to ignore the invalid data and not to use it when computing parity (i.e., a data protection value computed as a result of a logical operation on data blocks in a stripe in the array of disk drives). This, in turn, eliminates the need to zero disk drives or to perform parity re-computation prior to using the disk drives.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: June 26, 2012
    Assignee: NetApp, Inc.
    Inventors: James Taylor, Atul Goel, James Leong