Abstract: A novel allocate instruction and a novel API call are received onto a compiler. The allocate instruction includes a symbol that identifies a non-memory resource instance. The API call is a call to perform an operation on a non-memory resource instance, where the particular instance is indicated by the symbol in the API call. The compiler replaces the API call with a set of API instructions. A linker then allocates a value to be associated with the symbol, where the allocated value is one of a plurality of values, and where each value corresponds to a respective one of the non-memory resource instances. After allocation, the linker generates an amount of executable code, where the API instructions in the code: 1) are for using the allocated value to generate an address of a register in the appropriate non-memory resource instance, and 2) are for accessing the register.

Abstract: A method and an apparatus to execute a code with value profiling are described. The code may include an access to an untyped variable. During the execution, runtime values of the untyped variable may be randomly inspected. A value profile may be established to predict one or more expected types of future runtime values for the untyped variable. The code may be recompiled according to the value profile to optimize the access of the untyped variable for the future runtime values.

Abstract: Embodiments of the claimed subject matter are directed to methods and a system that allows an application comprising a single code set under the COBOL Programming Language to execute in multiple platforms on the same multi-platform system (such as a mainframe). In one embodiment, a single code set is pre-compiled to determine specific portions of the code set compatible with the host (or prospective) platform. Once the code set has been pre-compiled to determine compatible portions, those portions may be compiled and executed in the host platform. According to these embodiments, an application may be executed from a single code set that is compatible with multiple platforms, thereby potentially reducing the complexity of developing the application for multiple platforms.

Abstract: A method, computer, and computer program for speculatively optimizing a code. The method includes speculatively optimizing the code characterized by searching in a predetermined order in at least one dictionary; extracting a value associated with a symbol name from a dictionary using the symbol name as a key; performing optimization to replace a symbol in the code with the value; compiling the code to be compiled including some or all of the optimized code; comparing, in response to detection of a change related to one dictionary among at least one dictionary, an order m in the predetermined order of the dictionary with the detected change to an order n of the dictionary with the extracted value; and invalidating the optimized code in the compiled code associated with the dictionary having the detected change in response to the results from the orders comparison and the type of change.

Abstract: In one example, a device includes one or more processors configured to determine an allocated time for execution of an optimization pass for optimizing code for a software program, execute at least some instructions of the optimization pass on the code, and, in response to determining that an actual time for execution of the optimization pass has exceeded the allocated time for execution, preventing execution of subsequent instructions of the optimization pass.

Abstract: Application computer instructions can be provided to a publishing server. The publishing service can parse the application computer instructions to identify one or more locations where supplemental computer instructions can be inserted. Metadata about purchasable items can be obtained and the supplemental computer instructions can be written based on the item metadata. The supplemental computer instructions can be inserted into the application computer instructions. A publishable application can be created by compiling the application computer instructions with the inserted supplemental computer instructions.

Abstract: A method and system for publishing virtual applications on the Internet. The method includes obtaining a list of applications associated with a publisher from a server computing device and displaying the list to a user via a user interface. Next, a selection by the user of one of the applications is received from the user interface. A new virtualized version of the selected application is built. The virtualized version includes at least one application file that at least partially implements the new virtualized version of the selected application. Then, the application file is uploaded to the server computing device. An application address is received from the server computing device and a link to the application address is displayed to the user via the user interface. The virtualized version of the application is available at the application address for download and execution over a network (e.g., the Internet).

Abstract: Described herein are techniques to provide read and write barriers for flexible and efficient garbage collection. A memory heap is split into pages. Each page is aligned to an address that is a multiple of a particular power of two. When generating read and write operations, code is generated to execute the write barrier or the read barrier. At this point, the page alignment for each pointer is known; for example, if the page alignment is the same for all pointers in the system. With this page structure, it is possible to find the page start by masking the address of any heap allocated object on the page with a mask based on the page alignment (bitwise-and operation). A plurality of flags are established on a page. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: A system and method for encapsulating a target application are described herein. In particular, an analysis of the target application can be performed to determine one or more characteristics of the target application. Based on the analysis of the target application, a blueprint of the target application can be generated. Based on the blueprint, an encapsulation application can be constructed for the target application. In addition, the target application can be encapsulated with the encapsulation application to create an encapsulated target application to enable adaptive loading of the target application.

Abstract: An interactive development environment receives developer inputs to develop or customize modeled types. A compilation agent receives a request from the IDE to compile the modeled types that the developer is developing or customizing. The compilation agent accesses a cache of previously compiled types and determines which of the individually loadable types are to be re-compiled based upon the changes made by the developer, and compiles only those identified types. The re-compiled types are also stored in cache.

Abstract: An aspect of the present invention detects usage, by an application process, of a utility provided by a first version of an operating system, and determines whether a later version of the operating system is incompatible with identical usage of the detected utility. If the usage is determined to be incompatible, the corresponding information on the incompatibility is included in a report. According to another aspect, the determination of compatibility is performed by maintaining data (e.g., in a database) indicating incompatibility information related to a set of utilities, which are incompatible with the second version. The data is examined to determine incompatibility. The features are disclosed as being applied with respect to dynamically linked libraries, dynamically loaded libraries, functions, fonts, etc.

Abstract: Programming in a multiprocessor environment includes accepting a program specification that defines a plurality of processing modules and one or more channels for sending data between ports of the modules, mapping each of the processing modules to run on a set of one or more processing engines of a network of interconnected processing engines, and for at least some of the channels, assigning one or more elements of one or more processing engines in the network to the channel for sending data between respective processing modules.

Abstract: A system and method for using inline stacks to improve the performance of application binaries is included. While executing a first application binary, profile data may be collected about the application that includes which callee functions are called from the application's callsites and the number of times each inline stack is executed. A context summary map may be created from the collected profile data which shows a summary of the total execution count of all instructions in the callee function for each callsite inlined in the application's normal binary. Using the context summary map, each function callsite's execution count may be compared with a predetermined threshold to determine if the function should be inlined. Then the application's profile may be annotated and a second application binary, an optimized binary, may be generated using the annotated profile.

Abstract: Software debugging with execution match determinations, including: inserting, by a compiler while compiling source code into a debuggable program, a phantom breakpoint at every line of source code; including in the debuggable program, by the compiler, a breakpoint handling module and an exit handler; executing the debuggable program including encountering one or more of the phantom breakpoints and removing, by the breakpoint handling module, each encountered phantom breakpoint; creating, by the exit handler, upon exiting execution of the debuggable program, a copy of the debuggable program that includes only phantom breakpoints not encountered during execution; and providing the copy of the debuggable program to a debugger.

Abstract: Program execution profile data is collected by direct measurement of some code paths, and by inferring data for unmeasured paths. The data collection process may cause errors, which are propagated by the inferencing process. The profile data thus constructed is further enhanced by detecting certain data mismatches, and adjusting inferred data to reduce the scope of errors propagated during the inferencing process. Preferably, a control flow graph of the program being measured is constructed. Mismatches in the total weights of input arcs versus output arcs are detected. For certain specific types of mismatches, it can be known or guessed which count is incorrect, and this count is accordingly corrected. Correction of arc counts proceeds recursively until it is no longer possible to correct mismatches. Additionally, certain other conditions are adjusted as presumed inaccuracies.

Abstract: In one embodiment, input code is received having a plurality of functional elements that process data elements. At least one criterion for generated code is also received. A first intermediate representation of the input code is built that has a plurality of nodes that represent the functional elements. Block sizes are assigned to two or more nodes of a first intermediate representation. The first intermediate representation is modified to create a second intermediate representation that satisfies the at least one criterion, and organizes at least some of the nodes of the first intermediate representation based on the block sizes.

Abstract: Methods to improve optimization of compilation are presented. In one embodiment, a method includes identifying one or more optimization speculations with respect to a code region and speculatively performing transformation on an intermediate representation of the code region in accordance with an optimization speculation. The method includes generating an advice message corresponding to the optimization speculation and displaying the advice message if the optimization speculation results in an improved compilation result.

Abstract: One embodiment of the present invention sets forth a technique for extracting a memory address offset from a 64-bit type-conversion expression included in high-level source code of a computer program. The technique involves receiving the 64-bit type-conversion expression, where the 64-bit type-conversion expression includes one or more 32-bit expressions, determining a range for each of the one or more 32-bit expressions, calculating a total range by summing the ranges of the 32-bit expressions, determining that the total range is a subset of a range for a 32-bit unsigned integer, calculating the memory address offset based on the ranges for the one or more 32-bit expressions, and generating at least one assembly-level instruction that references the memory address offset.

Abstract: Systems and methods for just-in-time (JIT) code compilation by a computer system. An example method may comprise identifying a defined pattern in a byte stream, evaluating a conditional expression associated with the pattern, and compiling the byte stream into a native code, while excluding, in view of the evaluating, a portion of byte stream associated with the pattern.

Abstract: A computing device displays a call history graphical user interface (GUI). The call history GUI includes a new list and an old list. The new list may include new missed call elements and missed call elements associated with new unopened voicemails. The old list may include other call history GUI elements, such as old missed call elements and missed call elements associated with opened voicemails.

Abstract: A method and an apparatus that modify pointer values pointing to typed data with type information are described. The type information can be automatically checked against the typed data leveraging hardware based safety check mechanisms when performing memory access operations to the typed data via the modified pointer values. As a result, hardware built in logic can be used for a broad class of programming language safety check when executing software codes using modified pointers that are subject to the safety check without executing compare and branch instructions in the software codes.

Abstract: A computing device comprising a JIT compiler, an application, and a JavaScript Engine. The computing device is adapted to receive at least one identified portion of a JavaScript source code, replace original context specific reference values in the JavaScript with one or more placeholders, and generate a first JIT copy of the code. The computing device is adapted to create a description of the original context specific reference values having one or more requirements, store the description, access runtime information related to the original context specific reference values, compare the runtime information to the stored description, obtain new context-specific reference values, replace/update the placeholders with the new context-specific reference values, generate a second JIT copy of the at least one identified portion of the JavaScript source code comprising the new context-specific reference values, and execute the second JIT copy in the new execution context.

Abstract: A method and system are provided for automatically creating an implicit literal value in a user defined enumerated data type by inserting an additional literal value, scanning the HDL design files for broken interdependencies or potential incompatibilities with the implicitly defined literal value, and modifying the HDL design files to be in accordance with the implicitly defined literal value while maintaining the semantics of the VHDL language reference model.

Abstract: A computer-implemented method for generating one or more build system build files using a unified build system configuration file includes: receiving the unified build system configuration file in a computer system, the unified build system configuration file comprising at least one platform-independent build system configuration; generating, using the computer system, at least one platform-specific build system configuration from the at least one platform-independent build system configuration; selecting at least one template for the unified build system configuration file, the template selected from among templates corresponding to each of multiple platforms; generating the one or more build system build files for at least one of the multiple platforms using the platform-specific build system configuration and the selected template; and providing the generated one or more build system build files in response to the unified build system configuration file.

Abstract: A method for forming an extension to a scripting language compiler is disclosed. A compiler of a machine receives a source code that has a new keyword to a scripting language of the compiler. An extension compiler module processes the source code to support the new keyword. The compiler and the extension compiler module generate an executable machine code based on a process of the extension compiler module and the compiler.

Abstract: Embodiments provided a formalized set of intermediate analysis contexts that are relevant for analysis checks of target code. Such intermediate analysis context may include, but are not limited to, the development phase of targeted code, the type or state of the targeted code, a source manipulating the targeted code, a purpose for the targeted code, or other development or runtime requirements. Accordingly, embodiments dynamically identify a current analysis context under which targeted code is being developed and can then execute rules based on knowledge of what contexts the rule(s) may apply. More specifically, analysis rules can describe (e.g., via metadata) those context conditions under which a rule can run. Based on such description and the current context, those rules that have been configured to apply to such context conditions can be executed.

Abstract: A compiler implemented by a computer performs optimized division of work across heterogeneous processors. The compiler divides source code into code sections and characterizes each of the code sections based on pre-defined criteria. Each of the code sections is characterized as at least one of: allocate to a main processor, allocate to a processing element, allocate to one of a parameterized main processor and a parameterized processing element, and indeterminate. The compiler analyzes side-effects and costs of executing the code sections on allocated processors, and transforms the code sections based on results of the analyzing. The transforming includes re-characterizing the code sections for alternate execution in a runtime environment.

Abstract: A device creates a graph based on source code, and analyzes the source code to identify private variables and functions of the source code and public variables and functions of the source code. The device determines, based on the graph, a size threshold and semantics-related characteristics of functions and variables for each module, of multiple modules, and assigns, based on the graph, the private variables and functions to a corresponding module of the multiple modules. The device reduces, based on the graph, a number of the public variables and functions assigned to each module, and generates the multiple modules based on one or more of the graph, the size threshold, the assigned private variables and functions, and the number of the public variables and functions assigned to each module.

Abstract: A computing platform may include heterogeneous processors (e.g., CPU and a GPU) to support sharing of virtual functions between such processors. In one embodiment, a CPU side vtable pointer used to access a shared object from the CPU 110 may be used to determine a GPU vtable if a GPU-side table exists. In other embodiment, a shared non-coherent region, which may not maintain data consistency, may be created within the shared virtual memory. The CPU and the GPU side data stored within the shared non-coherent region may have a same address as seen from the CPU and the GPU side. However, the contents of the CPU-side data may be different from that of GPU-side data as shared virtual memory may not maintain coherency during the run-time. In one embodiment, the vptr may be modified to point to the CPU vtable and GPU vtable stored in the shared virtual memory.

Abstract: In general, in one aspect, embodiments of the invention relate to a method for generating executable binary. The method includes analyzing a test executable binary generated from source code, wherein the source code comprises a plurality of functions, generating, based on analyzing the test executable binary, a code call tree comprising a plurality of call durations for the plurality of functions, and determining, using the code call tree, a function order of the plurality of functions. The method further includes generating, using the function order, a call tree order map, generating a call tree ordered executable binary using the source code and the call tree order map, and executing the call tree ordered executable binary on a processor.

Abstract: A method and system for providing target code to various computer systems. The target code is provided by a service. The service provides a mechanism for third-party developers to submit initial or base code for distribution to end-user computers as target code. The service converts the initial code to target code that is suitable for execution on the end-user computers. When the service receives the request for target code that matches certain requester-specified characteristics, it selects the intermediate code that best matches the requester-specified characteristics. The service then sends the target code to the requester.

Abstract: The present invention extends to methods, systems, and computer program products for aliasing buffers. Embodiment of the inventions supporting buffer aliasing through introduction of a level of indirection between a source program's buffer accesses and the target executable physical buffers, and binding the logical buffer accesses to actual physical buffer accesses at runtime. A variety of techniques for can be used supporting runtime aliasing of buffers, in a system which otherwise disallows such runtime aliasing between separately defined buffers in the target executable code. Binding of logical buffer accesses in the source program to the actual physical buffers defined in the target executable code is delayed until runtime.

Abstract: A system and method for producing a massive number of diverse program instances so as to deter differential attacks, collusion, and similar hostile actions. Code portions are shown to be defined in various manners, instantiated, and aggregated. The system and method establishes a very large number of program instances that may be deployed. Furthermore, testing is accomplished over a minimal set of instances to provide for high test coverage and high confidence over the fully deployed in stance set without incurring a high penalty.

Abstract: An apparatus having a transactional memory enabling exclusive control to execute a transaction. The apparatus includes: a first code generating unit configured to interpret a program, and generate first code in which a begin instruction to begin a transaction and an end instruction to commit the transaction are inserted before and after an instruction sequence including multiple instructions to execute designated processing in the program; a second code generating unit configured to generate second code at a predetermined timing by using the multiple instructions according to the designated processing; and a code write unit configured to overwrite the instruction sequence of the first code with the second code or to write the second code to a part of the first code in the transaction.

Abstract: A method for executing native code in a distributed Java Virtual Machine (JVM) is disclosed herein. The method may include receiving, in a first thread executing in a remote execution container, a first native code-generated call, such as a Java Native Interface (JNI) call, to a second thread, the first call including a first array write request. The first call may be stored in an instruction cache and bundled with a second native code-generated call and sent to the second thread. The calls are unbundled and executed in the second thread. An opaque handle to an array returned by the second call is bundled with corresponding array data and returned to the first thread. The array data of the bundle is stored in a data cache and retrieved in response to requests for the array data addressed to the second thread. A corresponding computer program product is also disclosed.

Abstract: Embodiments of the present invention relate to a computer-implemented method that includes binary weaving a second computer program code into the byte code of a first computer program code using a code weaver to form a third program product with a plurality of time measurement points. The programs can include sending a request via a network requesting information from a server computer system. The embodiment of the present invention may include measuring the execution time between the execution of a start point to the execution of a corresponding stop point.

Abstract: Technologies are generally described for a system, method and data center effective to execute a code. In an example, a method may include receiving, by a first processor, a first code from a second processor. The method may further include compiling the first code for first and second hardware stacks to produce first and second executable codes. The second hardware stack may be different from the first hardware stack. The method may include generating a reference to the first executable code and the second executable code and storing the reference. The method may further include receiving, by a third processor, an instance and a request to execute the instance. The method may further include executing the first executable code by the first hardware stack.

Abstract: A method, system, and article of manufacture for solving ordinary differential equations described in a graphical model with nodes as blocks and dependencies as links using the processing of a computer with a plurality of processors. The method includes: generating segments of block with or without duplication for each block with an internal state and for each block without any output by traversing the graphical model from each block with an internal state to each block without any output; merging the segment to reduce duplication; compiling and converting each segment from the merged results in an executable code; and individually allocating the executable code for each segment to a plurality of processors for parallel execution.

Abstract: A system, method and computer program product to provide a technique for achieving high speed and stable dispatch of a code in a programming language based on erasure, the code being converted from a code written in a programming language based on reification. The system, method and computer program product perform a function of adding a synthetic class having the same name as a suffix for name mangling of a normal method in a first programming language based on reification, adding a dummy parameter of the type of the synthetic class to a constructor definition, and adding an appropriate value (normally, null) that matches the type of the dummy parameter to a constructor invocation to convert the code in the first programming language to a code in a second programming language based on erasure.

Abstract: In developing applications for a plurality of node types, a meta-data definition of the application can be captured into an application definition module. The meta-data definition can describe the application for the plurality of node types. A code generation module can then automatically generate the application code for the plurality of node types, including transaction aware code. The code can be compiled per node type and the packaging necessary to deploy the application to the plurality of node types can also be automatically generated.

Abstract: Methods, apparatus and computer program products implement embodiments of the present invention that include replacing, in one or more initial source code files, each reference to a first function configured to convey system messages with a respective reference to a second function configured to convey the system messages, thereby producing respective corresponding preprocessed source code files for the one or more initial source code files. The respective corresponding preprocessed source code files are then compiled, thereby creating an executable file. While executing the executable file, a call to the second function is received, wherein the call includes a text string. A name of one of the respective corresponding preprocessed source code files storing the call to the second function is identified, and based on the identified name and the text string, a computed destination is determined for the text string. Finally, the text string is conveyed to the computed destination.

Abstract: Thermal-aware source code compilation including: receiving, by a compiler, an identification of a target computing system, the identification of the target computing system specifying temperature sensors that measure temperature of a memory module; compiling the source code into an executable application including inserting in the executable application computer program instructions for thermal-aware execution, the computer program instructions, when executed on the target computing system, carry out the steps of: retrieving temperature measurements of one or more of the target computing system's temperature sensors; determining, in real-time in dependence upon the temperature measurements, whether a memory module is overheated; if a memory module is overheated, entering a thermal-aware execution state including, for each memory allocation in the executable application, allocating memory on a different memory module than the overheated memory module; and upon the temperature sensors indicating the memory modu

Abstract: A mechanism is disclosed for operating local version-independent service program code for infrastructure services, wherein the mechanism is automatically and optionally linked to a central, remote service infrastructure, and wherein both an online and an offline processing mode is included and automatically supported, and wherein the mechanism is embedded in a generic runtime environment. In at least one embodiment, it contains service program code implemented in the runtime environment for calling by way of the application program code with standardized interfaces, wherein the service program code is intended for the provision of functionalities for predetermined services that an application program code can use.

Abstract: A system, and method for dynamically creating web applications from data is described. Simple data is transformed into a declarative application data model that is then parsed by a server and compiled into a functional web application. Application functionality is partly determined by rules applied to web application objects in response to user actions. These rules are triggered by various cues, including user actions and relationships among objects in the web applications. A web application is considered an n-dimensional problem space, and relationships among application objects can be modeled using set theory. The status of a particular relationship among objects and user actions can trigger specific application behavior. Additionally application behavior can be triggered in other ways, like conditions in arbitrary scripts or combinations of multiple triggers combined using logical connectives.

Abstract: The invention comprises (i) a compilation method for automatically converting a single-threaded software program into an application-specific supercomputer, and (ii) the supercomputer system structure generated as a result of applying this method. The compilation method comprises: (a) Converting an arbitrary code fragment from the application into customized hardware whose execution is functionally equivalent to the software execution of the code fragment; and (b) Generating interfaces on the hardware and software parts of the application, which (i) Perform a software-to-hardware program state transfer at the entries of the code fragment; (ii) Perform a hardware-to-software program state transfer at the exits of the code fragment; and (iii) Maintain memory coherence between the software and hardware memories. If the resulting hardware design is large, it is divided into partitions such that each partition can fit into a single chip. Then, a single union chip is created which can realize any of the partitions.

Abstract: A medium, method, and apparatus are disclosed for eliding superfluous function invocations in a vector-processing environment. A compiler receives program code comprising a width-contingent invocation of a function. The compiler creates a width-specific executable version of the program code by determining a vector width of a target computer system and omitting the function from the width-specific executable if the vector width meets one or more criteria. For example, the compiler may omit the function call if the vector width is greater than a minimum size.

Abstract: Optimized memory management settings may be derived from a mathematical model of an execution environment. The settings may be optimized for each application or workload, and the settings may be implemented per application, per process, or with other granularity. The settings may be determined after an initial run of a workload, which may observe and characterize the execution. The workload may be executed a second time using the optimized settings. The settings may be stored as tags for the executable code, which may be in the form of a metadata file or as tags embedded in the source code, intermediate code, or executable code. The settings may change the performance of memory management operations in both interpreted and compiled environments. The memory management operations may include memory allocation, garbage collection, and other related functions.

Abstract: Processes in a message passing system may be launched when messages having data patterns match a function on a receiving process. The function may be identified by an execution pointer within the process. When the match occurs, the process may be added to a runnable queue, and in some embodiments, may be raised to the top of a runnable queue. When a match does not occur, the process may remain in a blocked or non-executing state. In some embodiments, a blocked process may be placed in an idle queue and may not be executed until a process scheduler determines that a message has been received that fulfills a function waiting for input. When the message fulfills the function, the process may be moved to a runnable queue.

Abstract: A virtual machine can be extended to be aware of secondary cores and specific capabilities of the secondary cores. If a unit of platform-independent code (e.g., a function, a method, a package, a library, etc.) is more suitable to be run on a secondary core, the primary core can package the unit of platform-independent code (“code unit”) and associated data according to the ISA of the secondary core. The primary core can then offload the code unit to an interpreter associated with the secondary core to execute the code unit.

Abstract: A compiling method compiles an object program to be executed by a processor having a plurality of execution units operable in parallel. In the method a first availability chain is created from a producer instruction (p1), scheduled for execution by a first one of the execution units (20: AGU), to a first consumer instruction (c1), scheduled for execution by a second one of the execution units (22: EXU) and requiring a value produced by the said producer instruction. The first availability chain comprises at least one move instruction (mv1-mv3) for moving the required value from a first point (20: ARF) accessible by the first execution unit to a second point (22: DRF) accessible by the second execution unit.