Process Scheduling Patents (Class 718/102)
  • Patent number: 9372720
    Abstract: A multimedia data preprocessing apparatus for a virtual machine is provided. The multimedia data preprocessing apparatus includes a detection unit configured to detect multimedia data included in an application, a generation unit configured to generate a thread for processing the detected multimedia data, and an allocation unit configured to allocate the generated thread to an idle core.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: June 21, 2016
    Assignees: SNU R&DB FOUNDATION, Samsung Electronics Co., Ltd.
    Inventors: Dong-Heon Jung, Soo-Mook Moon, Kue-Hwan Sihn
  • Patent number: 9367372
    Abstract: A system, method and computer program product to execute a first and a second work-item, and compare the signature variable of the first work-item to the signature variable of the second work-item. The first and the second work-items are mapped to an identifier via software. This mapping ensures that the first and second work-items execute exactly the same data for exactly the same code without changes to the underlying hardware. By executing the first and second work-items independently, the underlying computation of the first and second work-item can be verified. Moreover, system performance is not substantially affected because the execution results of the first and second work-items are compared only at specified comparison points.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: June 14, 2016
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Alexander Lyashevsky, Sudhanva Gurumurthi, Vilas Sridharan
  • Patent number: 9367354
    Abstract: Tasks to be performed for a user can be outsourced to a workload service operable to process those types of tasks. Information for the tasks, such as code to be executed and data to be processed, can be stored to a queue for the workload service. The workload service can pull the task when an appropriate resource is available and provide the result to the user. The user can be charged only for the approximate time of the processing, without need to obtain the resource for an extended period of time resulting in unused capacity. The user can take advantage of queuing, data, and code storage services whereby tasks can contain pointers to code, data, and other information needed for a task. The workload service can pre-load the supporting code or information needed to provide an environment in which code of the type for the user task can be executed.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: June 14, 2016
    Assignee: Amazon Technologies, Inc.
    Inventor: Joshua D. Ramsden-Pogue
  • Patent number: 9361659
    Abstract: Techniques to optimize the ordering of image transformations. Ordering cost functions are applied to possible transformation orderings of image transformations of a user-selected transformation ordering. Computing costs are calculated based on the cost functions. An optimal transformation ordering is selected from the possible transformation orderings based on the computing costs. In one embodiment, a first transformation and a second transformation of the user-selected transformation ordering are swapped. In one embodiment, at least one of the ordering cost functions is based on a per-pixel cost value. In one embodiment, a fidelity loss threshold representing an acceptable level of difference between a first image resulting from the optimal transformation ordering and a second image resulting from the user-selected transformation ordering is determined. In one embodiment, selection of the optimal ordering transformation is based on satisfaction of the fidelity loss threshold.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: June 7, 2016
    Assignee: Facebook, Inc.
    Inventor: Apostolos Lerios
  • Patent number: 9361155
    Abstract: A method and system for scheduling a time critical task. The system may include a processing unit, a hardware assist scheduler, and a memory coupled to both the processing unit and the hardware assist scheduler. The method may include receiving timing information for executing the time critical task, the time critical task executing program instructions via a thread on a core of a processing unit and scheduling the time critical task based on the received timing information. The method may further include programming a lateness timer, waiting for a wakeup time to obtain and notifying the processing unit of the scheduling. Additionally, the method may include executing, on the core of the processing unit, the time critical task in accordance with the scheduling, monitoring the lateness timer, and asserting a thread execution interrupt in response to the lateness timer expiring, thereby suspending execution of the time critical task.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: June 7, 2016
    Assignee: National Instruments Corporation
    Inventors: Sundeep Chandhoke, Herbert K. Salmon, IV
  • Patent number: 9361118
    Abstract: A method, computer program product, and system is described that determines the correctness of using memory operations in a computing device with heterogeneous computer components. Embodiments include an optimizer based on the characteristics of a Sequential Consistency for Heterogeneous-Race-Free (SC for HRF) model that analyzes a program and determines the correctness of the ordering of events in the program. HRF models include combinations of the properties: scope order, scope inclusion, and scope transitivity. The optimizer can determine when a program is heterogeneous-race-free in accordance with an SC for HRF memory consistency model. For example, the optimizer can analyze a portion of program code, respect the properties of the SC for HRF model, and determine whether a value produced by a store memory event will be a candidate for a value observed by a load memory event. In addition, the optimizer can determine whether reordering of events is possible.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: June 7, 2016
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Derek R. Hower, Mark D. Hill, David Wood, Steven K. Reinhardt, Benedict R. Gaster, Blake A. Hechtman, Bradford M. Beckmann
  • Patent number: 9354934
    Abstract: Interrupt-intensive and interrupt-driven processes are managed among a plurality of virtual processors, wherein each virtual processor is associated with a physical processor, wherein each physical processor may be associated with a plurality of virtual processors, and wherein each virtual processor is tasked to execute one or more of the processes, by determining which of a plurality of the processes executing among a plurality of virtual processors are being or have been driven by at least a minimum count of interrupts over a period of operational time; selecting a subset of the plurality of virtual processors to form a sequestration pool; migrating the interrupt-intensive processes on to the sequestration pool of virtual processors; and commanding by a computer a bias in delivery or routing of the interrupts to the sequestration pool of virtual processors.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: May 31, 2016
    Assignee: International Business Machines Corporation
    Inventors: Mathew Accapadi, Grover Cleveland Davidson, II, Dirk Michel, Bret Ronald Olszewski
  • Patent number: 9357482
    Abstract: A method and system for dynamic power control for next generation LTE base stations are described herein. More particularly, a dynamic power control management process may run, for example, in an OA&M module on the control plane core of the base station. The dynamic power control management process collaborates with various components, such as a call management processing module and a transport process module, to periodically obtain information regarding the number of active calls as well as the uplink and downlink data rates for a given interval for a particular cell. The dynamic power control management process polls the call management processing module and transport process module periodically according to a tunable parameter for the key values. Based on this information, the dynamic power control management process determines whether a particular cell on the base station is running below a threshold at which dynamic power control could be triggered.
    Type: Grant
    Filed: July 13, 2011
    Date of Patent: May 31, 2016
    Assignee: Alcatel Lucent
    Inventor: Mohammad R. Khawer
  • Patent number: 9348658
    Abstract: Technologies for multithreaded synchronization and work stealing include a computing device executing two or more threads in a thread team. A thread executes all of the tasks in its task queue and then exchanges its associated task stolen flag value with false and stores that value in a temporary flag. Subsequently, the thread enters a basic synchronization barrier. The computing device performs a logical-OR reduction over the temporary flags of the thread team to produce a reduction value. While waiting for other threads of the thread team to enter the barrier, the thread may steal a task from a victim thread and set the task stolen flag of the victim thread to true. After exiting the basic synchronization barrier, if the reduction value is true, the thread repeats exchanging the task stolen flag value and entering the basic synchronization barrier. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: May 24, 2016
    Assignee: Intel Corporation
    Inventors: Arch D. Robison, Alejandro Duran Gonzalez
  • Patent number: 9348765
    Abstract: A technique for supporting user mode specification of Read-Copy Update (RCU) grace period latency to an operating system kernel-level RCU implementation. Non-expedited and expedited RCU grace period mechanisms are provided for invocation by RCU updaters performing RCU update operations to respectively initiate non-expedited and expedited grace periods. An expedited grace period indicator in a kernel memory space is provided for indicating whether a non-expedited RCU grace period or an expedited RCU grace period should be invoked. The non-expedited RCU grace period mechanism is adapted to check the expedited grace period indicator, and if an expedited RCU grace period is indicated, to invoke the expedited grace period mechanism. A communication mechanism is provided for use by a user mode application executing in a user memory space to manipulate the expedited grace period indicator in the kernel memory space, and thereby control whether an expedited or non-expedited RCU grace period should be used.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 24, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9342326
    Abstract: A system in which a virtual machine manager determines tasks that are to be performed on virtual machines executing on a host computing system. The host computing system further executes an intermediary virtual machine task management module that receives virtual machine tasks from the virtual machine manager. Upon request from the virtual machines, the intermediary module identifies the tasks that are to be performed on the requesting virtual machine to the requesting virtual machine. The virtual machines may perhaps also initiate the performance of such identified tasks. Since the virtual machine itself is initiating contact with the intermediary module, and is not interacting directly with the virtual machine manager, the virtual machine manager need not be in the same sphere of trust as the virtual machine.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: May 17, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Aravind Ramarathinam, Srivatsan Parthasarathy
  • Patent number: 9342380
    Abstract: Transactional reader-writer locks may leverage available hardware transactional memory (HTM) to simplify the procedures of the reader-writer lock algorithm and to eliminate a requirement for type stable memory An HTM-based reader-writer lock may include an ordered list of client-provided nodes, each of which represents a thread that holds (or desires to acquire) the lock, and a tail pointer. The locking and unlocking procedures invoked by readers and writers may access the tail pointer or particular ones of the nodes in the list using various combinations of transactions and non-transactional accesses to insert nodes into the list or to remove nodes from the list. A reader or writer that owns a node at the head of the list (or a reader whose node is preceded in the list only by other readers' nodes) may access a critical section of code or shared resource.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: May 17, 2016
    Assignee: Oracle International Corporation
    Inventors: David Dice, Yosef Lev, Yujie Liu, Victor M. Luchangco, Mark S. Moir
  • Patent number: 9342383
    Abstract: A buffer may be configured to store a plurality of items, and to be accessed by one or more activities of an instance of a process model. A scheduler may be configured to schedule execution of each of a plurality of activities of the process model, and to determine an activation of an activity of the plurality of activities. The scheduler may include an activity manager configured to access an activity profile of the activity upon the determining of the activation, the activity profile including buffer access characteristics according to which the activity is designed to access the buffer. A process execution unit may be configured to execute the activity and may include a buffer access manager configured to access the buffer according to the buffer access characteristics of the activity profile, and to thereby facilitate an exchange of at least one item between the buffer and the activity.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: May 17, 2016
    Assignee: SAP SE
    Inventors: Alistair P. Barros, Torben Schreiter
  • Patent number: 9342133
    Abstract: An information processing apparatus includes a detection unit and a frequency control unit and is designed to activate power saving control and perform information processing. The detection unit detects an idle time of a processor caused by job scheduling. The frequency control unit reduces the operating frequency of the processor for executing a job scheduled to be executed immediately before the idle time, below the maximum frequency. At this time, the frequency control unit reduces the operating frequency such that the execution time of the job is extended to the execution start time of a waiting job, which is included in the idle time.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: May 17, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Yoshifumi Ujibashi
  • Patent number: 9344501
    Abstract: A system that provides efficient expansion capability of a storage unit under test including multiple storage processors and reduces a number of required Ethernet ports on a client device and a reduced number of physical connections on the client device. A first processor and a peer processor of a storage processor system may be coupled to counterpart processors on one or more other storage processor systems using direct port-to-port connections and/or using a network infrastructure. A command from the client device may be passed among first processors and peer processors of the multiple storage processor systems until the correct destination processor for the command is reached, and data packets may be passed from a source processor of a storage processor system through processors of other storage processor systems until the client device is reached.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: May 17, 2016
    Assignee: EMC Corporation
    Inventors: Qing Liu, Ying Guo
  • Patent number: 9336057
    Abstract: A processing system is described which assigns jobs to heterogeneous processing modules. The processing system assigns jobs to the processing modules in a manner that attempts to accommodate the service demands of the jobs, but without advance knowledge of the service demands. In one case, the processing system implements the processing modules as computing units that have different physical characteristics. Alternatively, or in addition, the processing system may implement the processing modules as threads that are executed by computing units. Each thread which runs on a computing unit offers a level of performance that depends on a number of other threads that are simultaneously being executed by the same computing unit.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: May 10, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Yuxiong He, Sameh Elnikety, Kathryn S. McKinley, Shaolei Ren
  • Patent number: 9336063
    Abstract: Systems and methods are disclosed which facilitate management of a set of tasks between a plurality of task processing devices. Information corresponding to a number of tasks may be accessible to each of the task processing devices. In some instances, the information may be stored within a database. Each task processing device may claim a number of tasks, such that it is not claimable by other task processing devices, and may then process its claimed tasks. Each task processing device may be associated with a desired number of tasks, such that the desired number of tasks are claimed immediately or substantially immediately. Additional tasks may be claimed by a task processing device after a delay which may be based at least in part on the number of tasks currently claimed.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: May 10, 2016
    Assignee: Amazon Technologies, Inc.
    Inventor: Gregory Kempe
  • Patent number: 9335981
    Abstract: Methods are provided for source-to-source transformations for graph processing on many-core platforms. A method includes receiving a graph application including one graph, expressed by a graph application programming interface configured for defining and manipulating graphs. The method further includes transforming, by a source-to-source compiler, the graph application into a plurality of parallel code variants. Each of the plurality of parallel code variants is specifically configured for parallel execution by a target one of a plurality of different many-core processors. The method also includes selecting and tuning, by a runtime component, a particular one of the parallel code variants for the parallel execution responsive to graph application characteristics, graph data, and an underlying code execution platform of the plurality of different many-core processors.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: May 10, 2016
    Assignee: NEC Corporation
    Inventors: Srimat Chakradhar, Michela Becchi, Da Li
  • Patent number: 9336006
    Abstract: A method of traffic management implemented in a multi-core device comprising a first core and a second core, the method comprising receiving a first plurality of data flows for the first core and a second plurality of data flows for the second core, assigning a first thread running on the first core to the first plurality of data flows, assigning a second thread running on the second core to the second plurality of data flows, processing the first plurality of data flows using the first thread, and processing the second plurality of data flows using the second thread, wherein at least one of the first plurality of data flows and at least one of the second plurality of data flows are processed in parallel.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: May 10, 2016
    Assignee: Futurewei Technologies, Inc.
    Inventors: Deming Liu, Xiaoyong Yi
  • Patent number: 9329893
    Abstract: A method resumes an accelerated processing device (APD) wavefront in which a subset of elements have faulted. A restore command for a job including a wavefront is received. A list of context states for the wavefront is read from a memory associated with a APD. An empty shell wavefront is created for restoring the list of context states. A portion of not acknowledged data is masked over a portion of acknowledged data within the restored wavefronts.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: May 3, 2016
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Robert Scott Hartog, Ralph Clay Taylor, Michael Mantor, Thomas R. Woller, Kevin McGrath, Sebastien Nussbaum, Nuwan Jayasena, Rex McCrary, Philip J. Rogers, Mark Leather
  • Patent number: 9329937
    Abstract: A system for executing tasks in a computing resource environment is disclosed. Variations of a system may include two or more scheduler partitions associated with respective schedulers, scheduler state information, and respective plurality of computing resources. Variations of a system may include a task distributor that distributes tasks to the scheduler partitions. In some variations, one scheduler is configured such that, responsive to the scheduler partition receiving a task from the distributor, that scheduler allocates a computing resource for execution of that task and updates its scheduler state information accordingly. In some variations, the task distributor is configured such that, if one scheduler is in a failed or corrupted state, the task distributor stops distributing tasks to that scheduler partition and prevents that scheduler state information from propagation to, or access by, other scheduler partitions.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: May 3, 2016
    Assignee: Google Inc.
    Inventors: Brian Grant, John Wilkes
  • Patent number: 9331869
    Abstract: The input/output request packet (IRP) handling technique includes determining if a received input/output request packet should receive a given handling. If the input/output request packet should receive the given handling, the input/output request packet is dispatched to a device specific dispatch input/output request packet handler. Otherwise, the input/output request packet is redirected to an operating system dispatch input/output request packet handler.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: May 3, 2016
    Assignee: NVIDIA CORPORATION
    Inventors: Timothy Zhu, David Dunn, Randy Spurlock, Thomas Spacie
  • Patent number: 9326042
    Abstract: An intra-domain routing method in a content centric network (CCN), includes generating a packet requesting information requested by a node, the packet including an area to which the information is to be advertised, and transmitting the packet within the area.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: April 26, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong Ik Hong, Byoung Joon Lee, Myeong Wuk Jang, Jae Hoon Kim
  • Patent number: 9317325
    Abstract: A mechanism for idling an application in a multi-tenant cloud hosting environment is disclosed. A method of the invention includes detecting, by a reverse proxy of a node of a cloud computing architecture, a lack of minimum usage of an application hosted on the node, the application being one of a plurality of applications being hosted on the node and instructing the node to shut down the application in response. The reverse proxy is then; and reconfigured to point to a restarter instead of the application, wherein the restarter restarts the application in response to detecting an access to the application.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: April 19, 2016
    Assignee: Red Hat, Inc.
    Inventors: Michael P. McGrath, Matthew Hicks, Daniel Charles McPherson
  • Patent number: 9317339
    Abstract: A system may perform work stealing using a dynamically configurable separation between stealable and non-stealable work items. The work items may be held in a double-ended queue (deque), and the value of a variable (index) may indicate the position of the last stealable work item or the first non-stealable work item in the deque. A thread may steal a work item only from the portion of another thread's deque that holds stealable items. The owner of a deque may add work items to the deque and may modify the number or percentage of stealable work items, the number or percentage of non-stealable work items, and/or the ratio between stealable and non-stealable work items in the deque during execution. For example, the owner may convert stealable work items to non-stealable work items, or vice versa, in response to changing conditions and/or according to various work-stealing policies.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: April 19, 2016
    Assignee: Oracle International Corporation
    Inventors: Yosef Lev, Guy L. Steele, Jr.
  • Patent number: 9317304
    Abstract: A supervisor module manages multiple user selected applications. A first one of the multiple applications is launched in a first container. Allocation of a first process identifier by the first one of the multiple applications in the first container is detected. The first process identifier is unique within the first container. A first unique identifier is allocated to the first one of the multiple applications. The launch of a second one of the multiple applications is delayed but subsequently launched if the first unique identifier has been allocated to the first one of the multiple applications. A second unique identifier is allocated to the second one of the multiple applications. The first and second unique identifiers uniquely identify the respective first and second ones of the multiple applications within the supervisor module.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: April 19, 2016
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics Asia Pacific Pte, Ltd.
    Inventors: Raphael Collado, Wei He, Cheeseng Tan
  • Patent number: 9313266
    Abstract: A computer-program causing a computing device to transmit a command to a data storage cluster for multiple data transfer threads thereof to request assignment of a data transfer from a distribution thread; await receipt of a request for assignment from a data transfer thread; compare the quantity data transfer threads to the quantity of computation threads of a data processing cluster; assign to the data transfer thread an exchange of a block of data with a single computation thread in response to receipt of the request and to the multitude of data transfer threads comprising a greater quantity of threads than the multitude of computation threads; and assign to the data transfer thread exchanges of multiple blocks of data with multiple computation threads in response to receipt of the request and to the multitude of data transfer threads comprising a lesser quantity of threads than the multitude of computation threads.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: April 12, 2016
    Assignee: SAS INSTITUTE, INC.
    Inventors: Tom Weber, Paul Kent
  • Patent number: 9307048
    Abstract: The described implementations relate to distributed computing. One implementation provides a system that can include an outlier detection component that is configured to identify an outlier task from a plurality of tasks based on runtimes of the plurality of tasks. The system can also include a cause evaluation component that is configured to evaluate a cause of the outlier task. For example, the cause of the outlier task can be an amount of data processed by the outlier task, contention for resources used to execute the outlier task, or a communication link with congested bandwidth that is used by the outlier task to input or output data. The system can also include one or more processing devices configured to execute one or more of the components.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: April 5, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Srikanth Kandula, Ganesh Ananthanarayanan, Albert Greenberg, Yi Lu, Bikas Saha, Edward Harris
  • Patent number: 9307342
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for dynamic rendering for hybrid apps. One of the methods includes receiving user input navigating to a first view of an application; determining, using a navigation hierarchy stored on the mobile device, to render the first view using a native rendering engine native to the mobile device; receiving an update to the navigation hierarchy from a server; after receiving the update, receiving user input navigating to the first view; and determining, using the update to the navigation hierarchy from the server, to render the first view using an open rendering engine that is not native to the mobile device.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: April 5, 2016
    Assignee: Pivotal Software, Inc.
    Inventors: Sina Sojoodi, Joshua Winters, Elliott Garcea, Dwayne Forde, Mark D'Cunha
  • Patent number: 9298500
    Abstract: The job management at includes the following units. An information acquiring unit acquires information related to a job that is submitted in a predetermined time period. A weight calculating unit determines, on the basis of the information related to the job, the degree of influence for each shape of the job. A target shape determining unit determines, as pre-placement target shapes, shapes of a predetermined number of jobs in the order the degree of influence is high. A pre placement table computing unit determines, on the basis of the pre-placement target shapes and the degree of influence, pre placement of a job that is a way of placing a job to one of the computing nodes. A placement determining unit allocates, when a submitted job matches one of the pre-placement target shapes, the submitted job to the one of the computing nodes in accordance with the pre placement.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: March 29, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Kazushige Saga
  • Patent number: 9298520
    Abstract: The disclosure relates in particular to the processing of commands targeting at least one element of a cluster including a plurality of elements, the at least one element having a link of dependency according to the at least one command with at least one other element. After having identified the at least one element and at least one dependency rule from the at least one command, a dependency graph is generated from the at least one identified element, by applying the at least one identified dependency rule, the dependency graph including peaks representing at least the element and the at least one other element, an action linked with the at least one command being associated with the peaks of the dependency graph. A sequence of instructions is then generated from the dependency graph.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: March 29, 2016
    Assignee: BULL SAS
    Inventors: Pierre Vigneras, Marc Girard
  • Patent number: 9300750
    Abstract: Information is collected regarding an event in a computer system that includes a group of client application caches that each temporarily store information associated with one of a group of client applications. A set of rules is stored at one or more of the group of client application caches. Each rule triggers the event in another one of the group of client application caches in response to receipt of a message from a client application associated with the respective client application cache. Another message directed to another specified client application cache is generated for each rule that matches a first received message at a first client application cache. The generated message directs the other specified client application cache to collect and cache specified information from a server associated with the other specified client application cache.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: March 29, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John R. Hind, Bhavuk Srivastava
  • Patent number: 9298493
    Abstract: A method is used in managing system I/O load. When a background operation is available to be executed on a processor core, it is determined whether a credit value associated with the processor core satisfies a memory use criterion. The background operation has a memory use requirement and is executed on the processor core when the credit value associated with the processor core satisfies the memory use criterion. The credit value associated with the processor core is modified by an amount corresponding to the memory use requirement.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: March 29, 2016
    Assignee: EMC Corporation
    Inventors: Shay Harel, Peter Puhov
  • Patent number: 9292344
    Abstract: A method of scheduling tasks for a Real-Time Operating System (RTOS) in a low-power, wireless, mesh network may include receiving, at a scheduler for the RTOS, a plurality of tasks to schedule for execution by one or more processors. The plurality of tasks may include a first task; the first task may be associated with an expected execution interval; and the expected execution interval may indicate an expected length of time for the one or more processors to execute the first task. The method may also include scheduling the plurality of tasks for execution by the one or more processors. The first task may be scheduled using the expected execution time such that the first task is executed without being interrupted by others of the plurality of tasks.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: March 22, 2016
    Assignee: Cubic Corporation
    Inventors: Igor Ryshakov, Georgi Danielyan, Anatoli Gostev
  • Patent number: 9292523
    Abstract: Methods, a system, and a program product for use in managing data storage is disclosed. In an embodiment, a method, system, and program product comprises receiving content via an object based storage interface to a data storage system; generating a database insert operation for an object derived from the content, the object having a generated object identifier; and using the database entry operation, storing data associated with the object in a shared-nothing database located within the data storage system, wherein the shared-nothing database is enabled to perform parallel processing across multiple independent nodes.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: March 22, 2016
    Assignee: EMC Corporation
    Inventor: Stephen J. Todd
  • Patent number: 9286128
    Abstract: A processor is described having an out-of-order core to execute a first thread and a non-out-of-order core to execute a second thread. The processor also includes statistics collection circuitry to support calculation of the following: the first thread's performance on the out-of-order core; an estimate of the first thread's performance on the non-out-of-order core; the second thread's performance on the non-out-of-order core; an estimate of the second thread's performance on the out-of-order core.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 15, 2016
    Assignee: Intel Corporation
    Inventors: Aamer Jaleel, Kenzo Van Craeynest, Paolo Narvaez, Joel Emer
  • Patent number: 9286115
    Abstract: Some computing devices have limited resources such as, for example, battery power. When a user ceases to interact with an application, execution of the application can be moved to background and the application can be paused. During the time period in which the application is paused, the application consumes no CPU cycles because executing managed threads of the paused application are stopped, and native threads are prevented from running using asynchronous procedure calls.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: March 15, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Abhinaba Basu, Jan Kotas
  • Patent number: 9286125
    Abstract: A processing engine implementing job arbitration with ordering status is disclosed. A method of the disclosure includes receiving, by a job assigner communicably coupled to a plurality of processors, availability status from a plurality of job rings, availability status from the plurality of processors, and job entry completion status from an order manager, identifying, based on the received job entry completion status, a set of job rings from the plurality of job rings that do not exceed threshold conditions maintained by the job assigner, selecting, from the identified set of job rings, a job ring from which to pull a job entry for assignment, wherein the selecting is based on the received availability status of the plurality of job rings, and selecting, based on the received availability status of the plurality of processors, a processor to receive the assignment of the job entry for processing.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 15, 2016
    Assignee: INTEL CORPORATION
    Inventors: David A. Smiley, Naveen Lakkakula, Weiqiang Ma, Justin B. Diether, Nitin N. Garegrat
  • Patent number: 9286123
    Abstract: An apparatus and method for managing stream processing tasks are disclosed. The apparatus includes a task management unit and a task execution unit. The task management unit controls and manages the execution of assigned tasks. The task execution unit executes the tasks in response to a request from the task management unit, collects a memory load state and task execution frequency characteristics based on the execution of the tasks, detects low-frequency tasks based on the execution frequency characteristics if it is determined that a shortage of memory has occurred based on the memory load state, assigns rearrangement priorities to the low-frequency tasks, and rearranges the tasks based on the assigned rearrangement priorities.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: March 15, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Myung-Cheol Lee
  • Patent number: 9280841
    Abstract: An event chain visualization of performance data may show the execution of monitored elements as bars on a timeline, with connections or other relationships connecting the various bars into a sequential view of an application. The visualization may include color, shading, or other highlighting to show resource utilization or performance metrics. The visualization may be generated by monitoring many events processed by an application, where each bar on a timeline may reflect multiple instances of a monitored element and, in some case, the aggregated performance.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: March 8, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventor: Russell S. Krajec
  • Patent number: 9274826
    Abstract: A method for parallel processing implemented by a first core in a network unit, comprising locking an ingress queue if the ingress queue is not locked by another core, searching for an unlocked task queue from a first default subset of a plurality of task queues when the ingress queue is locked by another core, wherein the first subset is different from a second default subset of the plurality of task queues from which a second core begins a search for an unlocked task queue, and searching a remainder of the plurality of task queues for an unlocked task queue when all of the first default subset of task queues are locked and the ingress queue is locked.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: March 1, 2016
    Assignee: Futurewei Technologies, Inc.
    Inventors: Jun Xu, Dong Wang, Guang Zhao
  • Patent number: 9274921
    Abstract: A system for managing code displacement may include a manager and an application operable on a server. The application may include a plurality of modules each module for performing a different operation. The system may also include priority information associated with each module to permit the manager to deactivate selected ones of the modules based on the priority information to improve performance of the application.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: March 1, 2016
    Assignee: International Business Machines Corporation
    Inventors: Thomas J. Alcott, Kulvir Singh Bhogal, Jason Robert McGee, Alexandre Polozoff
  • Patent number: 9268574
    Abstract: A method for rolling back speculative threads in symmetric-multiprocessing (SMP) environments is disclosed. In one embodiment, such a method includes detecting an aborted thread at runtime and determining whether the aborted thread is an oldest aborted thread. In the event the aborted thread is the oldest aborted thread, the method sets a high-priority request for allocation to an absolute thread number associated with the oldest aborted thread. The method further detects that the high-priority request is set and, in response, clears the high-priority request and sets an allocation token to the absolute thread number associated with the oldest aborted thread, thereby allowing the oldest aborted thread to retry a work unit associated with the absolute thread number. A corresponding apparatus and computer program product are also disclosed.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 23, 2016
    Assignee: International Business Machines Corporation
    Inventors: Khaled A. Mohammed, Martin Ohmacht, Raul E. Silvera, Kai-Ting A. Wang
  • Patent number: 9268611
    Abstract: Methods and apparatus to schedule applications in heterogeneous multiprocessor computing platforms are described. In one embodiment, information regarding performance (e.g., execution performance and/or power consumption performance) of a plurality of processor cores of a processor is stored (and tracked) in counters and/or tables. Logic in the processor determines which processor core should execute an application based on the stored information. Other embodiments are also claimed and disclosed.
    Type: Grant
    Filed: September 25, 2010
    Date of Patent: February 23, 2016
    Assignee: Intel Corporation
    Inventors: Ravishankar Iyer, Sadagopan Srinivasan, Li Zhao, Rameshkumar G. Illikkal
  • Patent number: 9268607
    Abstract: A system and method of dynamically controlling a reservation of compute resources within a compute environment is disclosed. The method aspect of the invention comprises receiving a request from a requestor for a reservation of resources within the compute environment, reserving a first group of resources, evaluating resources within the compute environment to determine if a more efficient use of the compute environment is available and if a more efficient use of the compute environment is available, then canceling the reservation for the first group of resources and reserving a second group of resources of the compute environment according to the evaluation.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: February 23, 2016
    Assignee: Adaptive Computing Enterprises, Inc.
    Inventor: David Brian Jackson
  • Patent number: 9262172
    Abstract: A method for rolling back speculative threads in symmetric-multiprocessing (SMP) environments is disclosed. In one embodiment, such a method includes detecting an aborted thread at runtime and determining whether the aborted thread is an oldest aborted thread. In the event the aborted thread is the oldest aborted thread, the method sets a high-priority request for allocation to an absolute thread number associated with the oldest aborted thread. The method further detects that the high-priority request is set and, in response, modifies a local allocation token of the oldest aborted thread. The modification prompts the oldest aborted thread to retry a work unit associated with its absolute thread number. The oldest aborted thread subsequently initiates the retry of a successor thread by updating the successor thread's local allocation token. A corresponding apparatus and computer program product are also disclosed.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Martin Ohmacht, Raul E. Silvera, Mark G. Stoodley, Kai-Ting A. Wang
  • Patent number: 9262220
    Abstract: Embodiments of the present invention disclose a computer-implemented method, computer program product, and system for workload scheduling and resource provisioning.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: February 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Chong Chen, Zhenhua Hu, Daesuk Kang, Qi Wang
  • Patent number: 9262234
    Abstract: A technique for expediting the unloading of an operating system kernel module that executes read-copy update (RCU) callback processing code in a computing system having one or more processors. According to embodiments of the disclosed technique, an RCU callback is enqueued so that it can be processed by the kernel module's callback processing code following completion of a grace period in which each of the one or more processors has passed through a quiescent state. An expediting operation is performed to expedite processing of the RCU callback. The RCU callback is then processed and the kernel module is unloaded.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: February 16, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9262504
    Abstract: Methods, systems, and products characterize consistency of data in a stream warehouse. A warehouse table is derived from a continuously received a stream of data. The warehouse table is stored in memory as a plurality of temporal partitions, with each temporal partition storing data within a contiguous range of time. A level of consistency is assigned to each temporal partition in the warehouse table.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: February 16, 2016
    Assignee: AT&T INTELLECTUAL PROPERTY I, L.P.
    Inventors: Lukasz Golab, Theodore Johnson
  • Patent number: 9262192
    Abstract: Systems and techniques are described for allocating data store queues to virtual machines. A described technique includes allocating a respective queue to each of a plurality of threads, wherein the queue is configured to queue data requests from the respective thread and for a first data store, determining, for each of a plurality of threads, a respective maximum quantity of pending requests for the thread, wherein a quantity of pending requests sent from the respective queue to the first data store is equal to the maximum quantity of pending requests determined for the thread, determining, for each of the threads, a respective current quantity of operations per second, determining, for each of one or more first threads in the plurality of threads, a respective updated quantity of pending requests, and adjusting, for each first thread, the quantity of pending requests of the first thread sent to the first data store.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: February 16, 2016
    Assignee: VMware, Inc.
    Inventors: Ajay Gulati, Sachin Manpathak, Mustafa Uysal, Luis Useche