Dependency Based Cooperative Processing Of Multiple Programs Working Together To Accomplish A Larger Task Patents (Class 718/106)
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Patent number: 9262492Abstract: Disclosed herein are techniques for arranging a series of operations. It is determined whether an operation executes more efficiently when divided. It is further determined whether a plurality of operations execute more efficiently when combined.Type: GrantFiled: November 30, 2012Date of Patent: February 16, 2016Assignee: Hewlett Packard Enterprise Development LPInventors: Alkiviadis Simitsis, William K. Wilkinson
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Patent number: 9244751Abstract: A job profile includes characteristics of a job to be executed, where the characteristics of the job profile relate to map tasks and reduce tasks of the job, and where the map tasks produce intermediate results based on input data, and the reduce tasks produce an output based on the intermediate results. In response to a failure in a system, numbers of failed map tasks and reduce tasks of the job based on a time of the failure are computed, and numbers of remaining map tasks and reduce tasks are computed. A performance model is provided, and a performance parameter of the job is estimated using the performance model.Type: GrantFiled: May 31, 2011Date of Patent: January 26, 2016Assignee: Hewlett Packard Enterprise Development LPInventors: Ludmila Cherkasova, Abhishek Verma
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Patent number: 9239770Abstract: A restriction condition extraction apparatus specifies operation targets including a first target and another target related thereto that are operated based on first procedure information in a first execution environment, extracts first procedures related to the specified operation targets from the first procedure information, generates first relation information indicating an execution order on related operation targets regarding the extracted first procedures, specifies operation targets including a second target and another target related thereto that are operated based on second procedure information in a second execution environment, extracts second procedures related to the specified operation targets from the second procedure information, generates second relation information indicating an execution order on related operation targets regarding the extracted second procedures, compares the first and the second relation information, and extracts relations of an execution order on related operation targetType: GrantFiled: August 22, 2013Date of Patent: January 19, 2016Assignee: FUJITSU LIMITEDInventors: Shinji Kikuchi, Yasuhide Matsumoto
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Patent number: 9219733Abstract: In order to allow a single user registered on a single local host or other machine to access multiple shared resources on a remote host, an aliasing mechanism is employed so that multiple concurrent connections can be established by the user to a single remote host, with each connection using a different identity. Each connection can therefore be used to access a different shared resource on the remote host. In some illustrative examples, a user's identifier such as his or her machine log-in identification may be associated with two or more resource sharing aliases. As a result, two or more resource sharing sessions can be established by the user with a single remote host, with each of the sessions using a different one of the aliases. The resource sharing sessions are usually established in accordance with a resource sharing protocol such as the Server Block Message (SBM) protocol.Type: GrantFiled: June 30, 2008Date of Patent: December 22, 2015Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Jason Brewer, Neeraj Garg, Gavarraju Nanduri, Vikram Kakumani
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Patent number: 9213562Abstract: A system and method for providing direct socket input/output (I/O) for Java in a Java Virtual Machine (JVM) environment. During runtime, the system periodically garbage collects software objects in the Java memory space or heap. In accordance with an embodiment, the system provides a means to change the state of a thread performing the I/O which temporarily disallows garbage collection from taking place, thus guaranteeing that a receiving object in the heap does not move. The use of safepoints to prohibit GC from happening during the I/O call means that a global GC lock is not required. Non-blocking I/O is utilized, while prohibiting a thread from entering a GC safepoint during an I/O system call. The technique addresses disadvantages of previous methods by removing contended locks and by removing restrictions on allocation. In accordance with an embodiment, a special thread state can be used to prevent the thread from entering a GC safepoint.Type: GrantFiled: December 17, 2010Date of Patent: December 15, 2015Assignee: ORACLE INTERNATIONAL CORPORATIONInventor: Igor Veresov
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Patent number: 9208454Abstract: A system and method for providing a unified messaging and modeling infrastructure (UMMI) is disclosed. The system may comprise an input module of a first operations support system configured to receive information for processing at the first operations support system and a processor module of the first operations support system configured to process the information received at the first input module and an output module of the first operations support system configured to transmit a standardized data sheet to the second operations support system. The system may comprise an input module of the second operations support system configured to receive the standardized data sheet and a processor module of the second operations support system configured to update the standardized data sheet based on processing operations at the second operations support system and to generate executable code to support interface functionality based on definitions of the standardized data sheet.Type: GrantFiled: December 30, 2010Date of Patent: December 8, 2015Assignee: Verizon Patent and Licensing Inc.Inventors: Umashankar Velusamy, Amritham Koduvayur, Nityanand Sharma
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Patent number: 9158548Abstract: A system and method for operating a data-intensive computer is provided. The data-intensive computer includes a processing sub-system formed by a plurality of processing node servers and a database sub-system formed by a plurality of database servers configured to form a collective database in excess of a petabyte of storage. The data-intensive computer also includes an operating system sub-system formed by a plurality of operating system servers that extend a unifying operating system environment across the processing sub-system, the database sub-system, and the operating system sub-system to act as components in a single data-intensive computer. The operating system sub-system is configured to coordinate execution of a single application as distributed processes having at least one of the distributed processes executed on the processing sub-system and at least one of the distributed processes executed on the database sub-system.Type: GrantFiled: November 12, 2013Date of Patent: October 13, 2015Assignee: THE JOHNS HOPKINS UNIVERSITYInventors: Sandor Szalay, Edward Givelberg
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Patent number: 9158516Abstract: A dual evaluation mode method for use with computer software that includes the acts of determining, for certain functions and expressions within input computer code, whether each function and expression may have any recursive dependencies, generating eager evaluation mode executable code for one or more elements of the input computer code based on the act of determining and providing both eager evaluation mode executable code and non-eager evaluation mode executable code to runtime software that supports both eager and non-eager evaluation modes.Type: GrantFiled: February 8, 2013Date of Patent: October 13, 2015Assignee: EPIC GAMES, INC.Inventor: Timothy Dean Sweeney
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Patent number: 9135065Abstract: A device receives a command to initiate parallel processing. The command includes an indication of a function that is to be performed in connection with the parallel processing, and a reference to a multidimensional array to which the function is to be applied. The multidimensional array includes at least three dimensions. The command also includes an indication of one or more dimensions by which the multidimensional array is to be partitioned. The device partitions the multidimensional array, along the one or more dimensions, to divide the multidimensional array into multiple blocks, each of the multiple blocks representing a subset of the multidimensional array. The device controls application of the function to the multiple blocks to cause the function to be applied in parallel to at least two blocks of the multiple blocks.Type: GrantFiled: August 30, 2012Date of Patent: September 15, 2015Assignee: The MathWorks, Inc.Inventor: Halldor Narfi Stefansson
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Patent number: 9123005Abstract: The computer program manages a mobile workforce with task persons and GPS-enabled devices by using the GPS time-based location data. A database is populated with task situs location data, event time data and task person data and task person contact data. The database is coupled to the web-based processor, telecommunications network and GPS-enabled device. The system operator programs temporal (time) based rules and location-based rules unique to the task situs. Some rules are both time and location based. When the temporal or territorial rules are violated, first and second comm-events are generated by the system, for example, a text or IVR message to the task person. When associated time-and-territorial rules are violated, a third communications event arises. The time based rules may be associated or correlated with the event time for the task. The event time may be a “time of arrival.” Further, rules may be for approach, entry, or on-location.Type: GrantFiled: October 11, 2012Date of Patent: September 1, 2015Assignee: MobiWork, LLCInventor: Herve Rivere
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Patent number: 9092245Abstract: There is provided an information processing apparatus including a message storage unit for storing a message sent to a component, and an execution processing unit for loading the component body into a computer in response to receiving an execution instruction on the component to execute the component body and process the message stored in the message storage unit prior to the execution instruction.Type: GrantFiled: June 18, 2012Date of Patent: July 28, 2015Assignee: International Business Machines CorporationInventors: Masato Noguchi, Yoshiroh Kamiyama
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Patent number: 9071622Abstract: A technique is described for improving throughput in a processing system, such as a network storage server. The technique provides multiple levels (e.g., a hierarchy) of parallelism of process execution within a single mutual exclusion domain, in a manner which allows certain operations on metadata to be parallelized as well as certain operations on user data. The specific parallelization scheme used in any given embodiment is based at least partly on the underlying metadata structures used by the processing system. Consequently, a high degree of parallelization possible, which improves the throughput of the processing system.Type: GrantFiled: December 9, 2013Date of Patent: June 30, 2015Assignee: NetApp, Inc.Inventors: David Grunwald, Jeffrey S. Kimmel
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Patent number: 9064218Abstract: An information processor includes: an information adding unit that adds to an electronic document as an object to be processed by a work in a work flow showing the flow of the work relative to a plurality of works additional information designating a connection to the electronic document to an address; and a first output unit that outputs the additional information by coordinating with the electronic document in a case where the electronic document is accessed by the operation of an operator corresponding to the address of the additional information added by the information adding unit.Type: GrantFiled: May 9, 2008Date of Patent: June 23, 2015Assignee: FUJI XEROX CO., LTD.Inventor: Ryouji Taguchi
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Patent number: 9043363Abstract: The systems and methods described herein may be used to implement a shared dynamic-sized data structure using hardware transactional memory to simplify and/or improve memory management of the data structure. An application (or thread thereof) may indicate (or register) the intended use of an element of the data structure and may initialize the value of the data structure element. Thereafter, another thread or application may use hardware transactions to access the data structure element while confirming that the data structure element is still part of the dynamic data structure and/or that memory allocated to the data structure element has not been freed. Various indicators may be used determine whether memory allocated to the element can be freed.Type: GrantFiled: June 23, 2011Date of Patent: May 26, 2015Assignee: Oracle International CorporationInventors: Aleksandar Dragojevic, Maurice Herlihy, Yosef Lev, Mark S. Moir
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Patent number: 9043803Abstract: According to an embodiment, based on task border information, and first-type dependency relationship information containing N number of nodes corresponding to data accesses to one set of data, containing edges representing dependency relationship between the nodes, and having at least one node with an access reliability flag indicating reliability/unreliability of corresponding data access; task border edges, of edges extending over task borders, are identified that have an unreliable access node linked to at least one end, and presentation information containing unreliable access nodes is generated. According to dependency existence information input corresponding to the set of data, conversion information indicating absence of data access to the unreliable access nodes is output.Type: GrantFiled: January 10, 2012Date of Patent: May 26, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Kenji Funaoka, Nobuaki Tojo, Susumu Takeda, Akira Kuroda, Hidenori Matsuzaki
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Patent number: 9043804Abstract: There is provided a parallel computer system for performing barrier synchronization using a master node and a plurality of worker nodes based on the time to allow for an adaptive setting of the synchronization time. When a task process in a certain worker node has not been completed by a worker determination time, the particular worker node performs a communication to indicate that the process has not been completed, to a master node. When the communication has been received by a master determination time, the master node performs a communication to indicate that the process time is extended by a correction process time, in order to adjust and extend the synchronization time. In this way, it is possible to reduce the synchronization overhead associated with the execution of an application with a relatively large variation in the process time from a synchronization point to the next synchronization point.Type: GrantFiled: April 2, 2012Date of Patent: May 26, 2015Assignee: HITACHI, LTD.Inventors: Masaki Hamamoto, Tetsuya Yamada, Atsushi Tomoda, Atsushi Miyamoto
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Patent number: 9037705Abstract: A method, system and computer program product are disclosed for routing performance data to compute nodes. According to one aspect of the present disclosure each of a plurality of compute nodes are assigned a topic. Each topic may be associated with a set of calculations. Labeled performance metrics for an application are received. Each performance metric is labeled with a context under which the performance metric was collected. A topic is associated with each of the performance metrics based on the labeled context. Each respective node listens for a topic assigned to it in order to access the performance metrics associated with the assigned topic. Each respective node analyzes the performance metrics associated with the topic assigned to it.Type: GrantFiled: November 28, 2012Date of Patent: May 19, 2015Assignee: CA, Inc.Inventors: Aaron Kenneth Blackwell, Marco Gagliardi, Benny Tseng, David Tootill, Mark S. LoSacco, Ramana V. Lokavarapu, Gabriel D. Underwood
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Patent number: 9026658Abstract: The subject disclosure is directed towards automatically managing job request execution for a computer cluster using cloud computing resource allocations. When client computers to the computer cluster submit job requests to a head node, a set of job requests is selected based on a policy. The head node converts the set of job requests into a set of resource allocation requests based on job specification data. After communicating the resource allocation requests to a cloud computing provider, the head node is granted access and control over one or more worker nodes as a response. The worker nodes proceed to execute the set of job requests and update the head node with status information once the execution finishes.Type: GrantFiled: March 28, 2012Date of Patent: May 5, 2015Assignee: Microsoft Technology Licensing, LLCInventors: Mingqiang Xu, Jun Su, Qiufang Shi, Lanlan Cong, Tao Huang, Zhen Wei
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Patent number: 9025595Abstract: A network architecture is used for the communication between elementary calculus units or nodes of a supercomputer to execute a super-calculus processing application, partitionable and scalable at the level of calculus power in the range of PetaFLOPS. The supercomputer comprises a plurality of modular structures, each of which comprises a plurality of elementary calculus units or nodes defined by node cards a backplane, a root card, and a node communication network of the switched fabric fat tree type; ii) a synchronization architecture comprising a plurality of distinct node communication networks, configured for the communication of specific synchronization information different from network to network and with different characteristics; iii) a re-configurable Programmable Network Processor that implements the nodes both of the n-toroidal network and those of the synchronization networks.Type: GrantFiled: November 18, 2011Date of Patent: May 5, 2015Assignee: Eurotech SpAInventors: Mauro Rossi, Giampietro Tecchiolli, Pierfrancesco Zuccato
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Patent number: 9021485Abstract: Systems and methods for auto-restarting abnormally terminated processes are disclosed. An auto-restart system can include a parent task control block, a child process, and a shared resource. The parent task control block can spawn the child process. The child process can operate on the shared resource. When the child process finds the shared resource locked, the child process can terminate abnormally. The parent task control block can recognize the abnormal termination of the child process, and can automatically rollback and restart the child process. Accordingly, the child process can be restarted to operate on the shared resource without human intervention.Type: GrantFiled: August 20, 2009Date of Patent: April 28, 2015Assignee: Wal-Mart Stores, Inc.Inventor: Trey Vanderpool
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Patent number: 9021501Abstract: A combinational computing apparatus and method. The combinational computing method includes the steps of: receiving a first setting relating to multiple groups of input data and a second setting relating to a combinatorial mode among multiple groups of input data, obtaining the data combination of the multiple groups of input data according to the first setting and the second setting, and performing a desired calculating operation on the data combination.Type: GrantFiled: August 14, 2012Date of Patent: April 28, 2015Assignee: International Business Machines CorporationInventors: Yan Li, Haibo Lin, Liu Tao, Yudong Yang
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Patent number: 9021500Abstract: A combinational computing apparatus and method. The combinational computing method includes the steps of: receiving a first setting relating to multiple groups of input data and a second setting relating to a combinatorial mode among multiple groups of input data, obtaining the data combination of the multiple groups of input data according to the first setting and the second setting, and performing a desired calculating operation on the data combination.Type: GrantFiled: March 28, 2012Date of Patent: April 28, 2015Assignee: International Business Machines CorporationInventors: Yan Li, Haibo Lin, Liu Tao, Yudong Yang
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Patent number: 9015719Abstract: A method for scheduling tasks to be processed by one of a plurality of non-coherent processing devices, at least two of the devices being heterogeneous devices and at least some of said tasks being targeted to a specific one of the processing devices. The devices process data that is stored in local storage and in a memory accessible by at least some of the devices. The method includes the steps of: for each of a plurality of non-dependent tasks to be processed by the device, determining consistency operations required to be performed prior to processing the non-dependent task; performing the consistency operations for one of the non-dependent tasks and on completion issuing the task to the device for processing; performing consistency operations for a further non-dependent task such that, on completion of the consistency operations, the device can process the further task.Type: GrantFiled: February 27, 2012Date of Patent: April 21, 2015Assignee: ARM LimitedInventor: Robert Elliott
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Patent number: 9009725Abstract: A combination of workflow management tools is utilized to implement a logical system that supports the needs of both simple and complex workflow environments. Team members may access a central database to collaborate on a project via user interfaces with work item functionality, such as creation, reporting, performance, updates, and communications. Select management of work items may be automated. Work items may represent server-oriented tasks and sub-tasks and may be ticketed and tracked. A knowledge base may provide help for the system application, such as online or live access to access helpful information. In an example embodiment, the workflow management tools are implemented to support the creation of a Video Hub Office project.Type: GrantFiled: September 2, 2008Date of Patent: April 14, 2015Assignee: AT&T Mobility II LLCInventors: Amy Biondi, Brian Coffey, Timothy Criste, Kevin Dunn, Blaine Thomas
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Patent number: 9009726Abstract: A “Concurrent Sharing Model” provides a programming model based on revisions and isolation types for concurrent revisions of states, data, or variables shared between two or more concurrent tasks or programs. This model enables revisions of shared states, data, or variables to maintain determinacy despite nondeterministic scheduling between concurrent tasks or programs. More specifically, the Concurrent Sharing Model provides various techniques wherein shared states, data, or variables are conceptually replicated on forks, and only copied or written if necessary, then deterministically merged on joins such that concurrent tasks or programs can work with independent local copies of the shared states, data, or variables while ensuring automated conflict resolution.Type: GrantFiled: December 10, 2010Date of Patent: April 14, 2015Assignee: Microsoft Technology Licensing, LLCInventors: Sebastian Burckhardt, Daniel Johannes Pieter Leijen, Alexandro Baldassin
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Patent number: 9009663Abstract: A method for establishing a support environment for a program may include identifying one or more support environment features depended upon by the program to run on one or more nodes, selecting one or more support software components indicated to provide the features, loading the selected support components on the one or more nodes, configuring the selected support components based on the program, and causing the program and the selected support components to be executed on one or more nodes.Type: GrantFiled: June 1, 2011Date of Patent: April 14, 2015Assignee: Red Hat, Inc.Inventor: Tobias Kunze
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Patent number: 9009711Abstract: The present invention provides a particular efficient system of scheduling of tasks for parallel processing, and data communication between tasks running in parallel in a computer system. A particular field of application of the present invention is the platform-independent simulation of decomposition/partitioning of an application, in order to obtain an optimal implementation for parallel processing.Type: GrantFiled: July 26, 2010Date of Patent: April 14, 2015Inventors: Enno Wein, Vahagn Poghosyan
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Patent number: 8997103Abstract: One embodiment sets forth a technique for N-way memory barrier operation coalescing. When a first memory barrier is received for a first thread group execution of subsequent memory operations for the first thread group are suspended until the first memory barrier is executed. Subsequent memory barriers for different thread groups may be coalesced with the first memory barrier to produce a coalesced memory barrier that represents memory barrier operations for multiple thread groups. When the coalesced memory barrier is being processed, execution of subsequent memory operations for the different thread groups is also suspended. However, memory operations for other thread groups that are not affected by the coalesced memory barrier may be executed.Type: GrantFiled: April 6, 2012Date of Patent: March 31, 2015Assignee: NVIDIA CorporationInventors: Shirish Gadre, Charles McCarver, Anjana Rajendran, Omkar Paranjape, Steven James Heinrich
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Patent number: 8997109Abstract: Disclosed herein are an apparatus and method for managing a data stream distributed parallel processing service. The apparatus includes a service management unit, a Quality of Service (QoS) monitoring unit, and a scheduling unit. The service management unit registers a plurality of tasks constituting the data stream distributed parallel processing service. The QoS monitoring unit gathers information about the load of the plurality of tasks and information about the load of a plurality of nodes constituting a cluster which provides the data stream distributed parallel processing service. The scheduling unit arranges the plurality of tasks by distributing the plurality of tasks among the plurality of nodes based on the information about the load of the plurality of tasks and the information about the load of the plurality of nodes.Type: GrantFiled: August 14, 2012Date of Patent: March 31, 2015Assignee: Electronics and Telecommunications Research InstituteInventors: Myung-Cheol Lee, Hyun-Hwa Choi, Hun-Soon Lee, Byoung-Seob Kim, Mi-Young Lee
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Patent number: 8990294Abstract: A mechanism is provided in a data processing system for optimization of a distributed file system by log data analysis. A name node in the distributed file system initiates a log analysis map/reduce job on one or more connected data nodes via a map/reduce processing framework in the distributed file system and receives result data resulting from the log analysis map/reduce job from the one or more connected data nodes via the map/reduce processing framework in the distributed file system. The name node performs analysis on the received result data and generates an optimization plan for the one or more connected data nodes based on results of the analysis. The name node initiates the optimization plan on the one or more connected data nodes via the map/reduce processing framework in the distributed file system.Type: GrantFiled: April 18, 2012Date of Patent: March 24, 2015Assignee: International Business Machines CorporationInventors: Anthony N. Hylick, Eric Van Hensbergen, Joanne P. Rawson
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Patent number: 8990452Abstract: Techniques are described for eliminating backpressure in a distributed system by changing the rate data flows through a processing element. Backpressure occurs when data throughput in a processing element begins to decrease, for example, if new processing elements are added to the operating chart or if the distributed system is required to process more data. Indicators of backpressure (current or future) may be monitored. Once current backpressure or potential backpressure is identified, the operator graph or data rates may be altered to alleviate the backpressure. For example, a processing element may reduce the data rates it sends to processing elements that are downstream in the operator graph, or processing elements and/or data paths may be eliminated. In one embodiment, processing elements and associate data paths may be prioritized so that more important execution paths are maintained.Type: GrantFiled: July 26, 2011Date of Patent: March 24, 2015Assignee: International Business Machines CorporationInventors: Michael J. Branson, Ryan K. Cradick, John M. Santosuosso
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Patent number: 8990802Abstract: Methods, apparatuses, and computer-readable media for implementing and executing computer processes in an efficient manner. In an apparatus embodiment of the present invention, a pinball virtual machine (PVM) (99) is adapted to implement multiple PVM atomic threads (1040) within a single instance of an execution of a single method within an executable software process, said PVM (99) comprising: a code transformer (100) adapted to transform executable computer code (107) to PVM atoms (1020), a PVM graph (102), and PVM code segments (104); and coupled to the PVM graph (102), a PVM atomic threads manager (1011) implemented to control execution of a plurality of PVM atoms (1020) organized in PVM atomic threads (1040).Type: GrantFiled: May 23, 2011Date of Patent: March 24, 2015Assignee: Thinking Software, Inc.Inventors: Benjamin V. Shapiro, Roman Shapiro
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Patent number: 8984511Abstract: Provided is a method of permitting the reordering of a visibility order of operations in a computer arrangement configured for permitting a first processor and a second processor threads to access a shared memory. The method includes receiving in a program order, a first and a second operation in a first thread and permitting the reordering of the visibility order for the operations in the shared memory based on the class of each operation. The visibility order determines the visibility in the shared memory, by a second thread, of stored results from the execution of the first and second operations.Type: GrantFiled: August 17, 2012Date of Patent: March 17, 2015Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Anthony Asaro, Kevin Normoyle, Mark Hummel
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Publication number: 20150074353Abstract: Embodiments are provided for an asynchronous processor with multiple threading. The asynchronous processor includes a program counter (PC) logic and instruction cache unit comprising a plurality of PC logics configured to perform branch prediction and loop predication for a plurality of threads of instructions, and determine target PC addresses for caching the plurality of threads. The processor further comprises an instruction memory configured to cache the plurality of threads in accordance with the target PC addresses from the PC logic and instruction cache unit. The processor further includes a multi-threading (MT) scheduling unit configured to schedule and merge instruction flows for the plurality of threads from the instruction memory into a single combined thread of instructions. Additionally, a MT register window register is included to map operands in the plurality of threads to a plurality of corresponding register windows in a register file.Type: ApplicationFiled: September 3, 2014Publication date: March 12, 2015Inventors: Yiqun Ge, Wuxian Shi, Qifan Zhang, Tao Huang, Wen Tong
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Patent number: 8978038Abstract: A thread group generator generates from a received workload a plurality of thread groups. Each thread group consists of a plurality of threads, and at least one thread group has an interthread dependency existing between the plurality of threads. Each thread may be either an active thread whose output is required to form the result data, or a dummy thread required to resolve the inter-thread dependency for one of the active threads but whose output is not required to form the result data. A thread execution unit then executes each thread within a thread group received from the generator by executing a predetermined program. Execution flow modification circuitry is responsive to the received thread group having at least one dummy thread, to cause the unit to selectively omit at least part of the execution of at least one of the plurality of instructions when executing each dummy thread.Type: GrantFiled: June 4, 2013Date of Patent: March 10, 2015Assignee: ARM LimitedInventors: Andreas Due Engh-Halstvedt, Jorn Nystad
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Patent number: 8978034Abstract: This disclosure relates generally to automated workflow for data management, and specifically to efficient data manipulation and information extraction techniques used by a versatile data analytics platform. The information extraction techniques include micro-batching and provenance tracking, as well as integration of provenance-driven policies to improve the efficacy of the analytics. Embodiments disclosed here integrate the concept of real-time or near-real-time data stream processing and event/batch processing into one data processing layer, allowing a single processing definition to be applied at different granularities.Type: GrantFiled: March 15, 2013Date of Patent: March 10, 2015Assignee: Natero, Inc.Inventors: Garth Goodson, Craig Anthony Nigel Soules
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Patent number: 8977795Abstract: Systems, methods, and other embodiments associated with managing access to critical sections in a multithread processor are described. According to one embodiment, an apparatus includes a register configured to store i) respective resource identifiers that identify respective resources and ii) respective priorities for respective resource identifiers. The apparatus includes a managing module logic configured to receive a blocking instruction for a first resource having a first resource identifier that is associated with a first task, access the register to determine a priority associated with the first resource identifier, select one or more dependent resources based, at least in part on the priority associated with first resource identifier, and block the first resource and the dependent resources. In this manner the first task is granted access to the first resource and the dependent resources while other tasks are prevented from accessing the first resource and the dependent resources.Type: GrantFiled: October 23, 2012Date of Patent: March 10, 2015Assignee: Marvell International Ltd.Inventors: Olaf Mater, Sascha Schmeckenbecher
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Patent number: 8978039Abstract: A device, system and method are provided for presenting message threads in a device display where messages may have a persistent or intermediate status. A list of message threads is displayed, collated according to a given message thread attribute, is displayed. When a new message is detected belonging to one of the message threads, if the message has a persistent status it is added to the message thread and the collating message thread attribute for that thread is updated. If the message has an intermediate status, it may be added to the message thread but the collating message thread attribute for that message is deferred until the intermediate status is changed to a persistent status. The collated list of message threads is then updated. By deferring updates to the collating message thread attribute when a message has an intermediate status, disruption to the order of the collated list is mitigated.Type: GrantFiled: December 19, 2012Date of Patent: March 10, 2015Assignee: Blackberry LimitedInventors: Darsono Sutedja, John Bennett Parrett, Katerina Doudkin
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Publication number: 20150067697Abstract: It is provided a computer system comprising a management computer to be coupled to a management subject resource managed by the management computer, which includes at least one of a server apparatus, a storage apparatus or a network apparatus, and a display computer coupled to the management computer. The management computer includes a memory storing at least one workflow program including a work procedure, and a CPU configured to execute the at least one workflow program. The work procedure changes a configuration of the management subject resource, and acquires information from the management subject resource. The CPU executes prior verification processing of verifying an operation environment of the management subject resource to operate the work procedure included in the at least one workflow program before execution of the at least one workflow program, and displays an execution result of the prior verification processing on the display computer.Type: ApplicationFiled: September 23, 2012Publication date: March 5, 2015Applicant: Hitachi, Ltd.Inventor: Daisuke Iizuka
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Publication number: 20150067698Abstract: Method and Apparatus for rapid scalable unified infrastructure system management platform are disclosed by discovery of compute nodes, network components across data centers, both public and private for a user; assessment of type, capability, VLAN, security, virtualization configuration of the discovered unified infrastructure nodes and components; configuration of nodes and components covering add, delete, modify, scale; and rapid roll out of nodes and components across data centers both public and private.Type: ApplicationFiled: August 28, 2014Publication date: March 5, 2015Inventors: Zeeshan Naseh, Yusuf Akhtar, Faisal Azizullah
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Patent number: 8973010Abstract: Embodiments of the present invention are directed to techniques for providing an environment for the efficient execution of recognition tasks. A novel environment is provided which automatically and efficiently executes a recognition program on as many computer processors as available. This program, deconstructed into separate tasks, may be executed by constructing a dependency network from known inputs and outputs of the tasks, applying project planning methods for scheduling these tasks into multiple processing threads, and dynamically assigning tasks within these threads to processors. Therefore, an efficient schedule of tasks to complete a recognition program can be created and executed automatically, for any type of recognition problem.Type: GrantFiled: May 28, 2010Date of Patent: March 3, 2015Assignee: Varian Medical Systems International, AGInventors: Benjamin Haas, Thomas Coradi
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Patent number: 8973012Abstract: An approach for composing an analytic solution is provided. After associating descriptive schemas with web services and web-based applets, a set of input data sources is enumerated for selection. A desired output type is received. Based on the descriptive schemas that specify required inputs and outputs of the web services and web-based applets, combinations of web services and web-based applets are generated. The generated combinations achieve a result of the desired output type from one of the enumerated input data sources. Each combination is derived from available web services and web-based applets. The combinations include one or more workflows that provide an analytic solution. A workflow whose result satisfies the business objective may be saved. Steps in a workflow may be iteratively refined to generate a workflow whose result satisfies the business objective.Type: GrantFiled: October 25, 2011Date of Patent: March 3, 2015Assignee: International Business Machines CorporationInventors: Ying Chen, Thilina Gunarathne, Eugene M. Maximilien, William S. Spangler
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Patent number: 8973013Abstract: An approach for composing an analytic solution is provided. After associating descriptive schemas with web services and web-based applets, a set of input data sources is enumerated for selection. A desired output type is received. Based on the descriptive schemas that specify required inputs and outputs of the web services and web-based applets, combinations of web services and web-based applets are generated. The generated combinations achieve a result of the desired output type from one of the enumerated input data sources. Each combination is derived from available web services and web-based applets. The combinations include one or more workflows that provide an analytic solution. A workflow whose result satisfies the business objective may be saved. Steps in a workflow may be iteratively refined to generate a workflow whose result satisfies the business objective.Type: GrantFiled: August 28, 2012Date of Patent: March 3, 2015Assignee: International Business Machines CorporationInventors: Ying Chen, Thilina Gunarathne, Eugene M. Maximilien, William S. Spangler
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Publication number: 20150058865Abstract: Management is provided for threads of a database system that is subject to a plurality of disparate bottleneck conditions for resources. A monitor thread retrieves, from a first thread, first monitor data for first bottleneck condition of a first type. The monitor thread compares the first monitor data to a trigger level for the first bottleneck condition and then determines, in response to the comparison of the first monitor data to the trigger level, a potential source of the first bottleneck condition. A potential blocker thread is identified based upon the potential source of the first bottleneck condition. The monitor thread retrieves, from the potential blocker thread, second monitor data for a second type of bottleneck condition that is different from the first type of bottleneck condition. Based upon monitor data, a blocking thread is identified, and a particular blocking solution is applied to the blocking thread.Type: ApplicationFiled: August 26, 2013Publication date: February 26, 2015Applicant: International Business Machines CorporationInventors: Nigel G. Slinger, John B. Tobler, Wen Jie Zhu
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Patent number: 8966484Abstract: An information processing apparatus makes a plurality of threads concurrently execute tasks stored in a task queue associated with the thread a prescribed number of times of execution. The information processing apparatus includes a processor that executes the plurality of threads that executes a procedure. The procedure includes generating a task from among a plurality of tasks into which a serial program processing corresponding to a processing request is divided, selecting the task queue associated with one of the plurality of threads, enqueuing the generated task to the selected task queue, dequeuing the enqueued task to the task queue associated with the thread, and executing the dequeued task.Type: GrantFiled: August 22, 2012Date of Patent: February 24, 2015Assignee: Fujitsu LimitedInventors: Kei Hamada, Kouichirou Amemiya, Yasushi Kurokawa, Yumiko Ogata, Eitatsu Yoshida
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Patent number: 8966068Abstract: In an embodiment, in response to detecting a request by a program to access a network, if the request is the first time that the program requests to access the network, a subset of instructions is replaced in the program with supervisor call instructions. The supervisor call instructions cause respective interrupts of execution of the program. In response to each of the respective interrupts of execution of the program, the supervisor call instructions that caused the respective interrupts are replaced with the respective swapped instructions, and if a number of the respective interrupts of execution exceed a trap threshold, all remaining of the respective swapped instructions are stored to the program.Type: GrantFiled: January 15, 2013Date of Patent: February 24, 2015Assignee: International Business Machines CorporationInventors: Cary L. Bates, Lee Nee Helgeson, Justin K. King, Michelle A. Schlicht
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Publication number: 20150052363Abstract: The various embodiments herein provide an actor oriented system and a method for providing communication between a plurality of processes in the actor system. The system uses actor model as the basis for a large scale process distribution. The system abstracts the plurality of processes and adopts a method of process composition and resolution. The method provides binding of different processes in the system to create a multi-functional distributed application.Type: ApplicationFiled: November 3, 2014Publication date: February 19, 2015Inventors: Fred Korangy, Hamed Ghasemzadeh, Mohsen Arjmandi, Reza Azmi
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Publication number: 20150052537Abstract: A sequencer of a processing unit determines, at runtime, a barrier width of a barrier operation for a group threads, wherein the barrier width is smaller than a total number of threads in the group of threads, and wherein threads in the group of threads execute data parallel code on one or more compute units. In response to each thread in a subgroup of the group of threads having executed the barrier operation, the subgroup including a same number of threads as the barrier width, the sequencer may enable the subgroup of the group of threads to execute on the one or more processors past the barrier operation without waiting for other threads in the group of threads to execute the barrier operation, wherein the subgroup of the group of threads is smaller than the total number of threads in the group of threads.Type: ApplicationFiled: August 13, 2013Publication date: February 19, 2015Applicant: QUALCOMM IncorporatedInventor: Benedict Ruben Gaster
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Patent number: 8959516Abstract: Automated techniques are disclosed for coordinating request or transaction processing in a data processing system. For example, a technique for handling compound requests, in a system comprising multiple nodes for executing requests in which an individual request is associated with a particular node, comprises the following steps. A compound request comprising at least two individual requests associated with a same node is received. It is determined if both of the at least two individual requests are executable. The compound request is executed if it is determined that all individual requests of the compound request can execute.Type: GrantFiled: July 30, 2007Date of Patent: February 17, 2015Assignee: International Business Machines CorporationInventors: Paul M. Dantzig, Arun Kwangil Iyengar, Francis Nicholas Parr, Gong Su
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Patent number: 8959527Abstract: A task is marked as dependent upon a preceding task. The task that is attempted to be taken for execution from a head of a pending task queue that is marked is deferred. The deferred task is removed from the pending task queue and placed in a deferred task queue. The deferred task is reinserted back into the pending task queue for execution upon determining that the preceding tasks are completed.Type: GrantFiled: November 5, 2013Date of Patent: February 17, 2015Assignee: International Business Machines CorporationInventors: Ron Edelstein, Yariv Bachar, Oded Sonin