Abstract: A magnetic random access memory includes a memory cell element which includes a first fixed layer, a first recording layer in which a magnetization direction reverses on the basis of a first threshold value, and a first nonmagnetic layer formed between the first fixed layer and the first recording layer, a first interconnection connected to one terminal of the memory cell element, a transistor whose current path has one end connected to the other terminal of the memory cell element, a second interconnection connected to the other end of the current path, and a first resistance change element electrically connected to the memory cell element, and having a resistance value which changes on the basis of a second threshold value.

Abstract: Provided are a data storage device using a magnetic domain wall movement and a method of operating the data storage device. The data storage device includes a magnetic layer which has a plurality of magnetic domains, a current applying unit which applies current for a magnetic domain wall movement to the magnetic layer, and a head for reading and writing, wherein the magnetic layer comprises a plurality of perpendicular magnetic layers formed on a substrate in a plurality of rows and columns, and a horizontal magnetic layer formed on the perpendicular magnetic layers to connect the perpendicular magnetic layers.

Abstract: This magnetic memory with a thermally-assisted write, every storage cell of which consists of at least one magnetic tunnel junction, said tunnel junction comprising at least: one magnetic reference layer, the magnetization of which is always oriented in the same direction at the time of the read of the storage cell; one so-called “free” magnetic storage layer, the magnetization direction of which is variable; one insulating layer sandwiched between the reference layer and the storage layer. The magnetization direction of the reference layer is polarized in a direction that is substantially always the same at the time of a read due to magnetostatic interaction with another fixed-magnetization layer called the “polarizing layer”.

Abstract: Techniques and device designs associated with devices having magnetically shielded magnetic or magnetoresistive tunnel junctions (MTJs) and spin valves that are configured to operate based on spin-transfer torque switching.

Abstract: A tunnel magnetoresistive element includes a laminate including a pinned magnetic layer, an insulating barrier layer, and a free magnetic layer. The insulating barrier layer is composed of Ti—Mg—O or Ti—O. The free magnetic layer includes an enhancement sublayer, a first soft magnetic sublayer, a nonmagnetic metal sublayer, and a second soft magnetic sublayer. For example, the enhancement sublayer is composed of Co—Fe, the first soft magnetic sublayer and the second soft magnetic sublayer are composed of Ni—Fe, and the nonmagnetic metal sublayer is composed of Ta. The total thickness of the average thickness of the enhancement sublayer and the average thickness of the first soft magnetic sublayer is in the range of 25 to 80 angstroms. Accordingly, the tunneling magnetoresistive element can consistently have a higher rate of resistance change than before.

Abstract: An integrated circuit memory device may include an integrated circuit substrate, and a multi-bit memory cell on the integrated circuit substrate. The multi-bit memory cell may be configured to store a first bit of data by changing a first characteristic of the multi-bit memory cell and to store a second bit of data by changing a second characteristic of the multi-bit memory cell. Moreover, the first and second characteristics may be different. Related methods are also discussed.

Abstract: A magnetoresistive random access memory (RAM) may include a plurality of variable resistance devices, a plurality of read bitlines electrically connected to respective variable resistance devices, and a plurality of write bitlines alternating with the read bitlines. The magnetoresistive RAM may be configured to apply a first write current through a first write bitline adjacent to a first variable resistance device when writing a first data to the first variable resistance device, and apply a first inhibition current through a second write bitline adjacent to a second variable resistance device, the second variable resistance device being adjacent to the first write bitline, and between the first write bitline and the second write bitline, and the first write current and the first inhibition current flowing in a same direction.

Abstract: A method (and structure) of quantum computing. Two independent magnitudes of a three-state physical (quantum) system are set to simultaneously store two real, independent numbers as a qubit. The three-state physical (quantum) system has a first energy level, a second energy level, and a third energy level capable of being degenerate with respect to one another, thereby forming basis states for the qubit.

Abstract: In a particular embodiment, a magnetic tunnel junction (MTJ) structure is disclosed that includes an MTJ cell having multiple sidewalls that extend substantially normal to a surface of a substrate. Each of the multiple sidewalls includes a free layer to carry a unique magnetic domain. Each of the unique magnetic domains is adapted to store a digital value.

Abstract: The present invention includes a memory configured to store data having a pinned layer and a plurality of stacked memory locations. Each memory location includes a nonmagnetic layer and a switchable magnetic layer. The plurality of stacked memory locations are capable of storing a plurality of data bits.

Abstract: Electronic devices that include (i) a magnetization controlling structure; (ii) a tunnel barrier structure; and (iii) a magnetization controllable structure including: a first polarizing layer; and a first stabilizing layer, wherein the tunnel barrier structure is between the magnetization controlling structure and the magnetization controlling structure and the first polarizing layer is between the first stabilizing layer and the tunnel barrier structure, wherein the electronic device has two stable overall magnetic configurations, and wherein a first unipolar current applied to the electronic device will cause the orientation of the magnetization controlling structure to reverse its orientation and a second unipolar current applied to the electronic device will cause the magnetization controllable structure to switch its magnetization in order to obtain one of the two stable overall magnetic configurations, wherein the second unipolar current has an amplitude that is less than the first unipolar current.

Abstract: A magnetoresistive effect element includes a first magnetic layer, a second magnetic layer, and a first spacer layer. The first magnetic layer has an invariable magnetization direction. The second magnetic layer has a variable magnetization direction, and contains at least one element selected from Fe, Co, and Ni, at least one element selected from Ru, Rh, Pd, Ag, Re, Os, Ir, Pt, and Au, and at least one element selected from V, Cr, and Mn. The spacer layer is formed between the first magnetic layer and the second magnetic layer, and made of a nonmagnetic material. A bidirectional electric current flowing through the first magnetic layer, the spacer layer, and the second magnetic layer makes the magnetization direction of the second magnetic layer variable.

Abstract: A magnetic random access memory includes a magnetoresistive effect element which includes a fixed layer in which a magnetization direction is fixed, a recording layer in which a magnetization direction is reversible, and a nonmagnetic layer formed between the fixed layer and the recording layer, and in which the magnetization directions in the fixed layer and the recording layer take one of a parallel state and an antiparallel state in accordance with a direction of an electric current supplied between the fixed layer and the recording layer, and a yoke layer which concentrates a magnetic field generated by the electric current, and causes the magnetic field to act on magnetization in the recording layer.

Abstract: A memory cell is used which includes a plurality of magneto-resistive elements and a plurality of laminated ferrimagnetic structure substances. The plurality of the magneto-resistive elements are placed corresponding to respective positions where a plurality of first wirings extended in a first direction intersects with a plurality of second wirings extended in a second direction which is substantially perpendicular to the first direction. The plurality of the laminated ferrimagnetic structure substances corresponds to the plurality of the magneto-resistive elements, respectively, is placed to have a distance of a predetermined range from the respective plurality of the magneto-resistive elements, and has a laminated ferrimagnetic structure. The magneto-resistive element includes a free layer having a laminated ferrimagnetic structure, a fixed layer, and a nonmagnetic layer interposed between the free layer and the fixed layer.

Abstract: A device and method for manipulating a direction of motion of current carriers are presented. The device comprises a structure containing a two-dimensional gas of current carriers configured to define at least one region of inhomogeneity which is characterized by a substantially varying value of at least one parameter from the following: a spin-orbit coupling constant, density of the spin carriers, and a mobility of the gas. The device may be configured and operable to perform spin manipulation of a flux of the spin carrying current carriers to provide at least one of the following types of deviation of said spin-carrying current carriers: spin dependent refraction, spin dependent reflection and spin dependent diffraction on desired deviation angles of a direction of motion of the spin-carrying current carriers being incident on said at least one region of inhomogeneity.

Abstract: Magnetic tunnel junction cell including multiple vertical domains. In an embodiment, a magnetic tunnel junction (MTJ) structure is disclosed. The MTJ structure includes an MTJ cell. The MTJ cell includes multiple vertical side walls. Each of the multiple vertical side walls defines a unique vertical magnetic domain. Each of the unique vertical magnetic domains is adapted to store a digital value.

Abstract: The incidence of half-select errors during MRAM programming has been significantly reduced by giving the free layer a shape that approximates an X so that, when the free layer switches, the magnetization in the arms of the X guides the magnetization in the central section (the X's intersection area) causing it to rotate towards the hard axis in two opposing directions. This raises the free layer's switching energy barrier, thereby reducing half-select errors.

Abstract: Disclosed is a storage element having a storage layer retaining information based on a magnetization state of a magnetic material; a fixed-magnetization layer having a ferromagnetic layer; and an intermediate layer interposed between the storage layer and the fixed-magnetization layer. In the storage element, spin-polarized electrons are injected in a stacking direction to change a magnetization direction of the storage layer so that information is recorded in the storage layer, and resistivity of the ferromagnetic layer forming the storage layer is 8×10?7 ?m or more.

Abstract: A bottom electrode (BE) layout is disclosed that has four distinct sections repeated in a plurality of device blocks and is used to pattern a BE layer in a MRAM. A device section includes BE shapes and dummy BE shapes with essentially the same shape and size and covering a substantial portion of substrate. There is a via in a plurality of dummy BE shapes where each via will be aligned over a WL pad. A second bonding pad section comprises an opaque region having a plurality of vias. The remaining two sections relate to open field regions in the MRAM. The third section has a plurality of dummy BE shapes with a first area size. The fourth section has a plurality of dummy BE shapes with a second area size greater than the first area size to provide more complete BE coverage of an underlying etch stop ILD layer.

Abstract: A magnetoresistive random access memory (RAM) may include a plurality of variable resistance devices, a plurality of read bitlines electrically connected to respective variable resistance devices, and a plurality of write bitlines alternating with the read bitlines. The magnetoresistive RAM may be configured to apply a first write current through a first write bitline adjacent to a first variable resistance device when writing a first data to the first variable resistance device, and apply a first inhibition current through a second write bitline adjacent to a second variable resistance device, the second variable resistance device being adjacent to the first write bitline, and between the first write bitline and the second write bitline, and the first write current and the first inhibition current flowing in a same direction.

Abstract: Embodiments of the present invention disclose an MRAM device having a plurality of magnetic memory cells grouped into words, and write conductors for carrying write currents to write to the memory cells, wherein at least some of the write conductors have a reduced cross-sectional area in the vicinity of a group of memory cells.

Abstract: A data storage device includes a magnetic layer having a plurality of magnetic domains, a write head provided at an end portion of the magnetic layer, a read head to read data written to the magnetic layer, and a current controller connected to the write head and the read head. A method of operating the data storage device includes reading data of an end portion of the magnetic layer using a read head provided at the end portion of the magnetic layer in which a write head is provided at the other end portion thereof, moving a magnetic domain wall of the magnetic layer by a distance corresponding to the length of one magnetic domain toward the end portion, and writing the read data to the other end portion of the magnetic layer using the write head and a current controller provided between the write head and the read head.

Abstract: A spin-transfer MRAM is described that has two sub-cells each having a conductive spacer between an upper CPP cell and a lower MTJ cell. The two conductive spacers in each bit cell are linked by a transistor which is controlled by a write word line. The two CPP cells in each bit cell have different resistance states and the MTJ cell and CPP cell in each sub-cell have different resistance states. The MTJ free layer rotates in response to switching in the CPP free layer because of a large demagnetization field exerted by the CPP free layer. An improved circuit design is disclosed that enables a faster and more reliable read process since the reference is a second MTJ within the same bit cell. When RMTJ1>RMTJ2, the bit cell has a “0” state, and when RMTJ1<RMTJ2, the bit cell has a “1” state.

Abstract: A spin-transfer MRAM is described that has two sub-cells each having a conductive spacer between an upper CPP cell and a lower MTJ cell. The two conductive spacers in each bit cell are linked by a transistor which is controlled by a write word line. The two CPP cells in each bit cell have different resistance states and the MTJ cell and CPP cell in each sub-cell have different resistance states. The MTJ free layer rotates in response to switching in the CPP free layer because of a large demagnetization field exerted by the CPP free layer. An improved circuit design is disclosed that enables a faster and more reliable read process since the reference is a second MTJ within the same bit cell. When RMTJ1>RMTJ2, the bit cell has a “0” state, and when RMTJ1<RMTJ2, the bit cell has a “1” state.

Abstract: A spin-transfer MRAM is described that has two sub-cells each having a conductive spacer between an upper CPP cell and a lower MTJ cell. The two conductive spacers in each bit cell are linked by a transistor which is controlled by a write word line. The two CPP cells in each bit cell have different resistance states and the MTJ cell and CPP cell in each sub-cell have different resistance states. The MTJ free layer rotates in response to switching in the CPP free layer because of a large demagnetization field exerted by the CPP free layer. An improved circuit design is disclosed that enables a faster and more reliable read process since the reference is a second MTJ within the same bit cell. When RMTJ1>RMTJ2, the bit cell has a “0” state, and when RMTJ1<RMTJ2, the bit cell has a “1” state.

Abstract: An object of the present invention corrects fluctuation of a writing current between cells in a magnetic random access memory using spin torque magnetization reversal. The present invention includes a magneto-resistive effect element that is disposed between a bit line and a word line, a first variable resistance element that is connected to one end of the bit line, a second variable resistance element that is connected to the other end of the bit line, a first voltage applying unit that applies voltage to the first variable resistance element, and a second voltage applying unit that applies voltage to the second variable resistance element, when a writing operation is performed, an offset magnetic field is applied to a free layer of the magneto-resistive effect element by flowing a variable current between the first voltage applying unit and the second voltage applying unit based on a predetermined resistance value.

Abstract: Provided are a semiconductor memory device and a magneto-logic circuit which change the direction of a magnetically induced current according to a logical combination of logic states of a plurality of input values. The semiconductor memory device comprises a current driving circuit, a magnetic induction layer, and a resistance-variable element. The current driving circuit receives a plurality of input values and changes the direction of a magnetically induced current according to a logical combination of logic states of the input values. The magnetic induction layer induces magnetism having a direction varying according to the direction of the magnetically induced current. The resistance-variable element has a resistance varying according to the direction of the magnetism induced by the magnetic induction layer.

Abstract: A semiconductor memory device includes first to fourth resistance change elements sequentially arranged apart from each other in a first direction, a first electrode which connects one terminals of the first and second resistance change elements, a second electrode which connects one terminals of the third and fourth resistance change elements, a bit line which connects the other terminals of the second and third resistance change elements, first to fourth word lines respectively paired with the first to fourth resistance change elements, arranged apart from the first and second electrodes, and running in a second direction, a first current source which supplies a first electric current to a chain structure, when writing data in a selected element, and a second current source which supplies a second electric current to a selected word line which corresponds to the selected element, when writing the data in the selected element.

Abstract: A magnetic memory cell and a magnetic memory incorporating the cell are described. The magnetic memory cell includes at least one magnetic element and at least one non-planar selection device. The magnetic element(s) are programmable using write current(s) driven through the magnetic element. The magnetic memory may include a plurality of magnetic storage cells, a plurality of bit lines corresponding to the plurality of magnetic storage cells, and a plurality of source lines corresponding to the plurality of magnetic storage cells.

Abstract: A magnetic memory device comprises a magnetic tunnel junction (MTJ) connecting to a bit line to a sense line through an isolation transistor. The MTJ includes a ferromagnetic layer having a magnetic hard axis. An assist current line overlies the bit line and is insulated from the bit line. The MTJ is switchable between a first, relatively high resistance state and a second, relatively low resistance state. The assist current line applies a magnetic field along the magnetic hard axis in the ferromagnetic layer, independently of current flow through the MTJ for assisting switching of the MTJ between the first and second states.

Abstract: A nonmagnetic semiconductor device which may be utilized as a spin resonant tunnel diode (spin RTD) and spin transistor, in which low applied voltages and/or magnetic fields are used to control the characteristics of spin-polarized current flow. The nonmagnetic semiconductor device exploits the properties of bulk inversion asymmetry (BIA) in (110)-oriented quantum wells. The nonmagnetic semiconductor device may also be used as a nonmagnetic semiconductor spin valve and a magnetic field sensor. The spin transistor and spin valve may be applied to low-power and/or high-density and/or high-speed logic technologies. The magnetic field sensor may be applied to high-speed hard disk read heads. The spin RTD of the present invention would be useful for a plurality of semiconductor spintronic devices for spin injection and/or spin detection.

Abstract: A magnetic tunnel junction cell that has a ferromagnetic pinned layer, a ferromagnetic free layer, and a non-magnetic barrier layer therebetween. The free layer has a larger area than the pinned layer, in some embodiments at least twice the size of the pinned layer, in some embodiments at least three times the size of the pinned layer, and in yet other embodiments at least four times the size of the pinned layer. The pinned layer is offset from the center of the free layer. The free layer has a changeable vortex magnetization, changeable between clockwise and counterclockwise directions.

Abstract: A magnetic memory includes a plurality of magnetoresistive elements which include a fixed layer in which a magnetization direction is fixed, a free layer in which a magnetization direction changes, and a nonmagnetic layer formed between the fixed layer and the free layer, and a word line electrically connected to the magnetoresistive elements. Data erase is performed by setting the magnetization direction of the free layer in a first direction by a magnetic field induced by a current flowing through the word line, and data of the magnetoresistive elements are erased by one time data erase. Data write is performed by setting the magnetization direction of the free layer in a second direction by spin-transfer magnetization reversal by supplying a current in one direction to the magnetoresistive elements.

Abstract: It is made possible to cause spin inversion at a low current density which does not cause element destruction and to conduct writing with a small current. A magnetoresistance effect element includes: a magnetization pinned layer in which magnetization direction is pinned; a magnetic recording layer in which magnetization direction is changeable, the magnetization direction in the magnetization pinned layer forming an angle which is greater than 0 degree and less than 180 degrees with a magnetization direction in the magnetic recording layer, and the magnetization direction in the magnetic recording layer being inverted by injecting spin-polarized electrons into the magnetic recording layer; and a non-magnetic metal layer provided between the magnetization pinned layer and the magnetic recording layer.

Abstract: Method of magnetization reversal of the magnetization (M) of at least one first magnetic memory element of an array of magnetic memory elements comprising the steps of: applying a first magnetic field pulse to a first set of magnetic memory elements, and applying a second magnetic field pulse to a second set of magnetic memory elements, such that during the application of the first and second magnetic field pulse the magnetization (M) of said first magnetic memory element which is to be reversed upon the field pulse decay performs approximately an odd number of a half precessional turns, wherein the magnetization (M) of at least one second magnetic memory element which is not to be reversed upon the field pulse decay performs approximately a number of full precessional turns.

Abstract: A storage element includes a storage layer for holding information depending on a magnetization state of a magnetic material; and a magnetization fixed layer in which magnetization direction is fixed, that is arranged relative to the storage layer through a nonmagnetic layer. The magnetization direction of the storage layer is changed with application of an electric current in a laminating direction to enable information to be recorded to the storage layer. A plurality of magnetization regions respectively having magnetization components in laminating directions and having magnetizations in different directions from each other are formed in the magnetization fixed layer or on an opposite side of the magnetization fixed layer relative to the storage layer.

Abstract: A magnetic random access memory includes a substrate, a free layer and a spacer layer. The substrate and the free layer are made of a vertical anisotropy ferrimagentic thin film. The spacer layer is sandwiched between the substrate and the free layer and is made of an insulating layer. The method uses a modified Landau-Lifshitz-Gilbert equation to obtain a critical current value as a function of exchange coupling constant. The critical current value is predictable under several external magnetic fields being applied. When the exchange coupling constant is proportionally varied, the critical current value is reduced to a third of its original value under an optimum state.

Abstract: A magnetoresistive element includes a free layer which contains a magnetic material and has an fct crystal structure with a (001) plane oriented, the free layer having a magnetization which is perpendicular to a film plane and has a direction to be changeable by spin-polarized electrons, a first nonmagnetic layer and a second nonmagnetic layer which sandwich the free layer and have one of a tetragonal crystal structure and a cubic crystal structure, and a fixed layer which is provided on only one side of the free layer and on a surface of the first nonmagnetic layer opposite to a surface with the free layer and contains a magnetic material, the fixed layer having a magnetization which is perpendicular to a film plane and has a fixed direction.

Abstract: A magnetic random access memory (MRAM) is disclosed. The MRAM includes a first electrode, an antiferromagnetic layer formed over the first electrode, a pinned layer formed over the antiferromagnetic layer, a barrier layer formed over the pinned layer, a composite free layer formed over the barrier layer, and a second electrode formed over the composite free layer. The composite free layer includes a first magnetic layer, a spacer layer and a second magnetic layer sequentially stacked over the barrier layer and the spacer layer allows parallel coupling between the first and second magnetic layers. A magnetic tunnel junction (MTJ) device suitable for a memory unit of a magnetic memory device is also provided.

Abstract: A multi-bit magnetic memory cell in a stacked structure controlled by at least one read bit line and one read word line is provided. The multi-bit magnetic memory cell includes at least two magnetic memory units and a switching device. Each magnetic memory unit has a magneto-resistance value and at least the two magnetic memory units are stacked to form a circuit of serial connection or parallel connection. The circuit and the read bit line are connected. The switching device is connected to the circuit, wherein the switching device is controlled by the read word line to be conducting or non-conducting so as to connect the circuit with a ground voltage. Furthermore, a plurality of the multi-bit magnetic cells is used to form a magnetic memory device.

Abstract: A spin-transfer MRAM is described that has two sub-cells each having a conductive spacer between an upper CPP cell and a lower MTJ cell. The two conductive spacers in each bit cell are linked by a transistor which is controlled by a write word line. The two CPP cells in each bit cell have different resistance states and the MTJ cell and CPP cell in each sub-cell have different resistance states. The MTJ free layer rotates in response to switching in the CPP free layer because of a large demagnetization field exerted by the CPP free layer. An improved circuit design is disclosed that enables a faster and more reliable read process since the reference is a second MTJ within the same bit cell. When RMTJ1>RMTJ2, the bit cell has a “0” state, and when RMTJ1<RMTJ2, the bit cell has a “1” state.

Abstract: A spin injection write type magnetic memory device includes memory cells which have a magnetoresistance effect element and a select transistor. The magnetoresistance effect element has one end connected to a first node. The select transistor has a first diffusion area connected to another end of the magnetoresistance effect element and a second diffusion area connected to a second node. A select line extends along a first direction and is connected to a gate electrode of the select transistor. A first interconnect extends along a second direction and is connected to the first node. A second interconnect extends along the second direction and is connected to the second node. Two of the memory cells adjacent along the first direction share the first node. Two of the memory cells adjacent along the second direction share the second node.

Abstract: A magnetic random access memory includes at least a first-direction write current line and multiple second-direction write current line, intersecting with the first-direction write current line in substantial perpendicular and forming several intersecting regions. Multiple magnetic memory cells are respectively located at the intersecting regions for receiving an induced magnetic field in a time sequence. Every at least two adjacent memory cells are in parallel or series connection, to form at least one memory unit. An easy axis of a free layer of each magnetic memory cell is substantially perpendicular to a magnetization of a pinned layer. The easy axis and the first-direction write current line form an including angle of about 45°. A read bit-line circuit connects to a first terminal of the memory unit. A read word-line circuit connects to a second terminal of the memory unit.

Abstract: An MTJ pattern layout for a memory device is disclosed that includes two CMP assist features outside active MTJ device blocks. A first plurality of dummy MTJ devices is located in two dummy bands formed around an active MTJ device block. The inner dummy band is separated from the outer dummy band by the MTJ ILD layer and has a MTJ device density essentially the same as the MTJ device block. The outer dummy band has a MTJ device density at least 10% greater than the inner dummy band. The inner dummy band serves to minimize CMP edge effect in the MTJ device block while the outer dummy band improves planarization. A second plurality of dummy MTJ devices is employed in contact pads outside the outer dummy band and is formed between a WL ILD layer and a BIT ILD layer thereby minimizing delamination of the MTJ ILD layer.

Abstract: A method and system for providing and utilizing a magnetic memory are described. The magnetic memory includes a plurality of magnetic storage cells. Each magnetic storage cell includes magnetic element(s) programmable due to spin transfer when a write current is passed through the magnetic element(s) and selection device(s). The method and system include driving a first current in proximity to but not through the magnetic element(s) of a portion of the magnetic storage cells. The first current generates a magnetic field. The method and system also include driving a second current through the magnetic element(s) of the portion of the magnetic storage cells. The first and second currents are preferably both driven through bit line(s) coupled with the magnetic element(s). The first and second currents are turned on at a start time. The second current and the magnetic field are sufficient to program the magnetic element(s).

Abstract: A nonmagnetic semiconductor device which may be utilized as a spin resonant tunnel diode (spin RTD) and spin transistor, in which low applied voltages and/or magnetic fields are used to control the characteristics of spin-polarized current flow. The nonmagnetic semiconductor device exploits the properties of bulk inversion asymmetry (BIA) in (110)-oriented quantum wells. The nonmagnetic semiconductor device may also be used as a nonmagnetic semiconductor spin valve and a magnetic field sensor. The spin transistor and spin valve may be applied to low-power and/or high-density and/or high-speed logic technologies. The magnetic field sensor may be applied to high-speed hard disk read heads. The spin RTD of the present invention would be useful for a plurality of semiconductor spintronic devices for spin injection and/or spin detection.

Abstract: A CPP MTJ MRAM element utilizes transfer of spin angular momentum as a mechanism for changing the magnetic moment direction of a free layer. The device includes a tunneling barrier layer of MgO and a non-magnetic CPP layer of Cu or Cr and utilizes a novel free layer comprising a thin layer of Ta or Hf sandwiched by layers of CoFeB. The device is characterized by values of DR/R between approximately 95% and 105%.

Abstract: A transistor has an emitter, a spin-selective base, a collector, a first barrier interposed between the spin-selective base and the emitter, a second barrier interposed between the spin-selective base and the collector, and a transfer ratio of more than 10?3.

Abstract: A spin oscillator device generates a microwave output in response to an applied DC current. The device includes a spin momentum transfer (SMT) stack including a top electrode, a free layer, a nonmagnetic layer, a pinned magnetic structure, and a bottom electrode. A local magnetic field source adjacent the SMT stack applies a local magnetic field to the free layer to cause the magnetization direction of the free layer to be oriented at a tilt angle with respect to plane of the free layer. The local magnetic field source can include coils or an electromagnet structure, or permanent magnets in close proximity to the SMT stack.

Abstract: A non-volatile magnetic memory device is proposed, which provides sufficient magnetic shielding performance for external magnetic fields. A first magnetic shield layer 60a and a second magnetic shield layer 60b, both made of a soft magnetic metal, are formed respectively on the bottom surface of the transistor section 20, which is the mounting side of the MRAM device 10, and on the top surface of the bit line 50, which is opposite to the bottom surface of the mounting side of the MRAM device 10. On the second magnetic shield layer 60a, a passivation film 70 is formed. The magnetic flux penetrated from the external magnetic field, is suppressed below the inversion strength of the MRAM device 10, thereby improving reliability.