Search Patents
  • Publication number: 20080270726
    Abstract: A method and apparatus for providing remote access redirect in a host channel adapter of a system area network are provided. The apparatus and method provide a mechanism by which a host channel adapter, in response to receiving a marker message, places selected channel(s) of the host channel adapter in a remote access redirect (RAR) mode of operation. During the RAR mode of operation, memory access messages received by the host channel adapter that are destined for portions of an application memory space marked as being protected are converted to RAR receive messages and redirected to a queue pair associated with an operating system rather than the queue pair for the application. The operating system is responsible for serializing access to application memory pages outside of the host channel adapter. The mechanisms of the present invention may be used to perform a checkpoint data integrity operation.
    Type: Application
    Filed: July 17, 2008
    Publication date: October 30, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Elmootazbellah Nabil Elnozahy, Peter Anthony Walker
  • Patent number: 8358503
    Abstract: A modular processing module is provided. The modular processing module comprises a set of processing module sides. Each processing module side comprises a circuit board, a plurality of connectors coupled to the circuit board, and a plurality of processing nodes coupled to the circuit board. Each processing module side in the set of processing module sides couples to another processing module side using at least one connector in the plurality of connectors such that, when all of the set of processing module sides are coupled together, the modular processing module is formed. The modular processing module comprises an exterior connection to a power source and a communication system.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: January 22, 2013
    Assignee: International Business Machines Corporation
    Inventors: John B. Carter, Wael R. El-Essawy, Elmootazbellah N. Elnozahy, Wesley M. Felter, Madhusudan K. Iyengar, Thomas W. Keller, Jr., Karthick Rajamani, Juan C. Rubio, William E. Speight, Lixin Zhang
  • Patent number: 8589895
    Abstract: A mechanism is provided for automatic detection of assertion violations. An application may write assertion tuples to the assertion checking mechanism. An assertion tuple forms a Boolean expression (predicate or invariant) that the developer of the application wishes to check. If the assertion defined by the tuple remains true, then the application does not violate the assertion. For any instruction that stores a value to a memory location or register at a target address, the assertion checking mechanism compares the target address to the addresses specified in the assertion tuples. If the target address matches one of the tuple addresses, then the assertion checking mechanism reads a value from the other address in the tuple. The assertion checking mechanism then recomputes the assertion using the retrieved value along with the value to be stored. If the assertion checking mechanism detects an assertion violation, the assertion checking mechanism raises an exception.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: November 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Elmootazbellah N. Elnozahy, Mark W. Stephenson
  • Publication number: 20030041118
    Abstract: A web server that integrates portions of operating system code to execute substantially within user space to reduce context switching. The web server includes an application level interpreter, such as an HTTP interpreter, configured to process client requests. The web server typically includes a network interface dedicated to process traffic to and from the web server. The web server may include within its user space kernel device driver extensions enabling it to communicate directly with the network interface. The server may implement a polling architecture in which the server periodically monitors the interface for new requests. The web server typically includes a user space transmission protocol library that enables the server to perform its own network processing of requests and responses. The library may include TCP/IP drivers that are optimized or streamlined for to processing HTTP requests.
    Type: Application
    Filed: August 23, 2001
    Publication date: February 27, 2003
    Applicant: International Business Machines Corporation
    Inventors: Elmootazbellah Nabil Elnozahy, Ramakrishnan Rajamony
  • Publication number: 20030084154
    Abstract: Cluster systems having central processor units (CPUs) with multiple processors (MPs) are configured as high density servers. Power density is managed within the cluster systems by assigning a utilization to persistent states and connections within the cluster systems. If a request to reduce overall power consumption within the cluster system is received, persistent states and connections are moved (migrated) within the multiple processors based on their utilization to balance power dissipation within the cluster systems. If persistent connections and states, that must be maintained have a low rate of reference, they may be maintained in processors that are set to a standby mode where memory states are maintained. In this way the requirement to maintain persistent connections and states does not interfere with an overall strategy of managing power within the cluster systems.
    Type: Application
    Filed: October 31, 2001
    Publication date: May 1, 2003
    Applicant: International Business Machines Corporation
    Inventors: Patrick J. Bohrer, Elmootazbellah N. Elnozahy, Thomas W. Keller, Michael D. Kistler, Freeman L. Rawson
  • Patent number: 6925529
    Abstract: A method and a computer usable medium including a program for operating disks having units, comprising: providing a first tier of at least one disk, the first tier storing at least one popular unit, providing a second tier of at least one disk, the second tier storing at least one unpopular unit, powering on at least one first tier disk, powering down the second tier, determining whether a request for a unit requires processing on the first tier or second tier, accessing the requested unit if the requested unit requires processing on the first tier, and powering on a second tier disk to copy the requested unit from the second tier disk to a first tier disk, if the requested unit is stored on the second tier.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: August 2, 2005
    Assignee: International Business Machines Corporation
    Inventors: Patrick J. Bohrer, Elmootazbellah N. Elnozahy, Charles R. Lefurgy, Ramakrishnan Rajamony, Bruce A. Smith
  • Patent number: 6879999
    Abstract: A method and system for responding to requests for static web documents including saving the response as a packet train comprising one or more IP compliant packets. Upon a subsequent request for the static web document, the saved packet train may be retrieved and the header information updated. In this manner, the network protocol processing required to respond to the request is reduced. The server may include code for determining whether a referenced web object is a static object and a directory of recently accessed static web objects and a copy of the corresponding packet trains. The web server may be configured to consult the directory to determine if an object is a static object that has been recently accessed. If the object has been recently accessed, the server may retrieve the corresponding packet train from its system memory or from disk and update the packet headers prior to transmission.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: April 12, 2005
    Assignee: International Business Machines Corporation
    Inventor: Elmootazbellah Nabil Elnozahy
  • Patent number: 7437517
    Abstract: Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application program interface (API), and part managed by hardware. Thus, the software applications can provide guidance regarding address ranges to maintain close to the processor to reduce unnecessary latencies typically encountered when dependent upon cache controller policies. Several embodiments utilize a memory internal to the processor or on a processor node so the memory block used for this technique is referred to as OCM.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: October 14, 2008
    Assignee: International Business Machines Corporation
    Inventors: Dilma Menezes da Silva, Elmootazbellah Nabil Elnozahy, Orran Yaakov Krieger, Hazim Shafi, Xiaowei Shen, Balaram Sinharoy, Robert Brett Tremaine
  • Publication number: 20110004875
    Abstract: A method, a system, an apparatus, and a computer program product for allocating resources of one or more shared devices to one or more partitions of a virtualization environment within a data processing system. At least one user defined resource assignment is received for one or more devices associated with the data processing system. One or more registers, associated with the one or more partitions are dynamically set to execute the at least one resource assignment, whereby the at least one resource assignment enables a user defined quantitative measure (number and/or percentage) of devices to operate when the one or more transactions are executed via the partition. The system enables the one or more devices to execute one or more transactions at a bandwidth/capacity that is less than or equal to the user defined resource assignment and minimizes performance interference among partitions.
    Type: Application
    Filed: July 1, 2009
    Publication date: January 6, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Elmootazbellah N. Elnozahy, Ramakrishnan Rajamony, William E. Speight, Lixin Zhang
  • Publication number: 20090144383
    Abstract: A method and apparatus for providing remote access redirect in a host channel adapter of a system area network are provided. The apparatus and method provide a mechanism by which a host channel adapter, in response to receiving a marker message, places selected channel(s) of the host channel adapter in a remote access redirect (RAR) mode of operation. During the RAR mode of operation, memory access messages received by the host channel adapter that are destined for portions of an application memory space marked as being protected are converted to RAR receive messages and redirected to a queue pair associated with an operating system rather than the queue pair for the application. The operating system is responsible for serializing access to application memory pages outside of the host channel adapter. The mechanisms of the present invention may be used to perform a checkpoint data integrity operation.
    Type: Application
    Filed: December 19, 2008
    Publication date: June 4, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Elmootazbellah Nabil Elnozahy, Peter Anthony Walker
  • Publication number: 20110231030
    Abstract: A mechanism is provided for minimizing system power in a data processing system. A management control unit determines whether a convergence has been reached in the data processing system. If convergence fails to be reached, the management control unit determines whether a maximum fan flag is set to indicate that a fan is operating at a maximum speed. Responsive to the maximum fan flag failing to be set, a thermal threshold of the data processing system is either increased or decreased and thereby a fan speed of the data processing system is either increased or decreased based on whether the system power of the data processing system has either increased or decreased and based on whether a temperature of the data processing system has either increased or decreased. Thus, a new thermal threshold and a new fan speed are formed. The process is then repeated until convergence has been met.
    Type: Application
    Filed: March 18, 2010
    Publication date: September 22, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John B. Carter, Elmootazbellah N. Elnozahy, Malcolm S. Ware, Wei Huang
  • Patent number: 7934061
    Abstract: Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application program interface (API), and part managed by hardware. Thus, the software applications can provide guidance regarding address ranges to maintain close to the processor to reduce unnecessary latencies typically encountered when dependent upon cache controller policies. Several embodiments utilize a memory internal to the processor or on a processor node so the memory block used for this technique is referred to as OCM.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: April 26, 2011
    Assignee: International Business Machines Corporation
    Inventors: Dilma Menezes da Silva, Elmootazbellah Nabil Elnozahy, Orran Yaakov Krieger, Hazim Shafi, Xiaowei Shen, Balaram Sinharoy, Robert Brett Tremaine
  • Publication number: 20110292596
    Abstract: A modular processing module allowing in-situ maintenance is provided. The modular processing module comprises a set of processing module sides. Each processing module side comprises a circuit board, a plurality of connectors, and a plurality of processing nodes. Each processing module side couples to another processing module side using at least one connector in the plurality of connectors such that, when all of the set of processing module sides are coupled together, the modular processing module is formed. The modular processing module comprises an exterior connection to a power source and a communication system and at least one heatsink that couples to at least a portion of the plurality of processing nodes on one of the processing module sides and is designed such that, when a set of heatsinks in the modular processing module are installed, an empty space is left in a center of the modular processing module.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 1, 2011
    Applicant: International Business Machines Corporation
    Inventors: Wael R. El-Essawy, Elmootazbellah N. Elnozahy, Madhusudan K. Iyengar, Thomas W. Keller, JR., Juan C. Rubio
  • Publication number: 20120320524
    Abstract: A modular processing module allowing in-situ maintenance is provided. The modular processing module comprises a set of processing module sides. Each processing module side comprises a circuit board, a plurality of connectors, and a plurality of processing nodes. Each processing module side couples to another processing module side using at least one connector in the plurality of connectors such that, when all of the set of processing module sides are coupled together, the modular processing module is formed. The modular processing module comprises an exterior connection to a power source and a communication system and at least one heatsink that couples to at least a portion of the plurality of processing nodes on one of the processing module sides and is designed such that, when a set of heatsinks in the modular processing module are installed, an empty space is left in a center of the modular processing module.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 20, 2012
    Applicant: International Business Machines Corporation
    Inventors: Wael R. El-Essawy, Elmootazbellah N. Elnozahy, Madhusudan K. Iyengar, Thomas W. Keller, JR., Juan C. Rubio
  • Patent number: 7805498
    Abstract: An apparatus for providing remote access redirect in a host channel adapter of a system area network are provided. The apparatus provides a mechanism by which a host channel adapter, in response to receiving a marker message, places selected channel(s) of the host channel adapter in a remote access redirect (RAR) mode of operation. During the RAR mode of operation, memory access messages received by the host channel adapter that are destined for portions of an application memory space marked as being protected are converted to RAR receive messages and redirected to a queue pair associated with an operating system rather than the queue pair for the application. The operating system is responsible for serializing access to application memory pages outside of the host channel adapter. The mechanisms of the present invention may be used to perform a checkpoint data integrity operation.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: September 28, 2010
    Assignee: International Business Machines Corporation
    Inventors: Elmootazbellah Nabil Elnozahy, Peter Anthony Walker
  • Patent number: 8756608
    Abstract: A method, a system, an apparatus, and a computer program product for allocating resources of one or more shared devices to one or more partitions of a virtualization environment within a data processing system. At least one user defined resource assignment is received for one or more devices associated with the data processing system. One or more registers, associated with the one or more partitions are dynamically set to execute the at least one resource assignment, whereby the at least one resource assignment enables a user defined quantitative measure (number and/or percentage) of devices to operate when the one or more transactions are executed via the partition. The system enables the one or more devices to execute one or more transactions at a bandwidth/capacity that is less than or equal to the user defined resource assignment and minimizes performance interference among partitions.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: June 17, 2014
    Assignee: International Business Machines Corporation
    Inventors: Elmootazbellah N. Elnozahy, Ramakrishnan Rajamony, William E. Speight, Lixin Zhang
  • Patent number: 7953854
    Abstract: A method and apparatus for providing remote access redirect in a host channel adapter of a system area network are provided. The apparatus and method provide a mechanism by which a host channel adapter, in response to receiving a marker message, places selected channel(s) of the host channel adapter in a remote access redirect (RAR) mode of operation. During the RAR mode of operation, memory access messages received by the host channel adapter that are destined for portions of an application memory space marked as being protected are converted to RAR receive messages and redirected to a queue pair associated with an operating system rather than the queue pair for the application. The operating system is responsible for serializing access to application memory pages outside of the host channel adapter. The mechanisms of the present invention may be used to perform a checkpoint data integrity operation.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: May 31, 2011
    Assignee: International Business Machines Corporation
    Inventors: Elmootazbellah Nabil Elnozahy, Peter Anthony Walker
  • Patent number: 8179674
    Abstract: A scalable space-optimized and energy-efficient computing system is provided. The computing system comprises a plurality of modular compartments in at least one level of a frame configured in a hexadron configuration. The computing system also comprises an air inlet, an air mixing plenum, and at least one fan. In the computing system the plurality of modular compartments are affixed above the air inlet, the air mixing plenum is affixed above the plurality of modular compartments, and the at least one fan is affixed above the air mixing plenum. When at least one module is inserted into one of the plurality of modular compartments, the module couples to a backplane within the frame.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: May 15, 2012
    Assignee: International Business Machines Corporation
    Inventors: John B. Carter, Wael R. El-Essawy, Elmootazbellah N. Elnozahy, Madhusudan K. Iyengar, Thomas W. Keller, Jr., Jian Li, Karthick Rajamani, Juan C. Rubio, William E. Speight, Lixin Zhang
  • Patent number: 7499966
    Abstract: A web server that integrates portions of operating system code to execute substantially within user space to reduce context switching. The web server includes an application level interpreter, such as an HTTP interpreter, configured to process client requests. The web server typically includes a network interface dedicated to process traffic to and from the web server. The web server may include within its user space kernel device driver extensions enabling it to communicate directly with the network interface. The server may implement a polling architecture in which the server periodically monitors the interface for new requests. The web server typically includes a user space transmission protocol library that enables the server to perform its own network processing of requests and responses. The library may include TCP/IP drivers that are optimized or streamlined for to processing HTTP requests.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: March 3, 2009
    Assignee: International Business Machines Corporation
    Inventors: Elmootazbellah Nabil Elnozahy, Ramakrishnan Rajamony
  • Publication number: 20120173906
    Abstract: A mechanism is provided for scheduling application tasks. A scheduler receives a task that identifies a desired frequency and a desired maximum number of competing hardware threads. The scheduler determines whether a user preference designates either maximization of performance or minimization of energy consumption. Responsive to the user preference designating the performance, the scheduler determines whether there is an idle processor core in a plurality of processor cores available. Responsive to no idle processor being available, the scheduler identifies a subset of processor cores having a smallest load coefficient. From the subset of processor cores, the scheduler determines whether there is at least one processor core that matches desired parameters of the task. Responsive to at least one processor core matching the desired parameters of the task, the scheduler assigns the task to one of the at least one processor core that matches the desired parameters.
    Type: Application
    Filed: March 9, 2012
    Publication date: July 5, 2012
    Applicant: International Business Machines Corporation
    Inventors: Elmootazbellah N. Elnozahy, Heather L. Hanson, Freeman L. Rawson, III, Malcolm S. Ware
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