Abstract: A method for the design and optimization of inductors for RF circuits. This method consists in the formulation of RF circuit designs as geometric programs. The designer can specify a wide variety of specifications such as gain, bandwidth, noise, etc. The method, which was implemented in simple code, determines inductor dimensions and component values in a few seconds real-time. The results was also a globally optimal design.

Abstract: A method for rapidly determining feasibility of a force optimization problem and for rapidly solving a feasible force optimization problem is disclosed. The method comprises formulating the force optimization problem or force feasibility problem as a convex optimization problem, formulating a primal barrier subproblem associated with the convex optimization problem, and solving the primal barrier subproblem. The method and related methods may also be used to solve each problem in a set of force optimization problems, determine the minimum or maximum force required to satisfy any of a set of force optimization problems, solve a force closure problem, compute a conservative contact force vector, or solve a feasible force optimization problem with bidirectional forces.

Abstract: A method for optimizing an integrated circuit uses a dominant time constant of a transition of the circuit. A physical layout of the circuit is characterized in terms of design parameters. The circuit is modeled by a conductance matrix G and a capacitance matrix C, wherein G and C are affine functions of the design parameters. The optimization method comprises the step of finding the values of the design parameters that optimize a property of the circuit while simultaneously enforcing a constraint that the dominant time constant must be less than a maximum value tmax. Mathematically, the constraint on the dominant time constant can be written: tmax G−C≧0. The optimization method can be used when the circuit has a non-tree topology. Furthermore, when the design parameters comprise variables that relate to sizes of elements of the circuit, a topology of the circuit is optimized by the optimization method.