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  • Patent number: 9674967
    Abstract: A via in a printed circuit board is composed of a patterned metal layer that extends through a hole in dielectric laminate material that has been covered with catalytic adhesive material on both faces of the dielectric laminate material. The layer of catalytic adhesive coats a portion of the dielectric laminate material around the hole. The patterned metal layer is placed over the catalytic adhesive material on both faces of the dielectric laminate material and within the hole.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: June 6, 2017
    Assignee: Sierra Circuits, Inc.
    Inventors: Konstantine Karavakis, Kenneth S. Bahl