Processes Joining Independent Crystals Patents (Class 117/1)
  • Patent number: 11885040
    Abstract: Some aspects relate to methods of forming an epitaxial layer. In some examples, the methods include ejecting atoms from a molten metal sputtering material onto a heated crystalline substrate and growing a single epitaxial layer on the substrate from the ejected atoms, where the atoms are ejected with sufficient energy that the grown epitaxial layer has at least a partial rhombohedral lattice, and wherein the crystalline substrate is heated to a temperature of about 600 degrees Celsius or less, or about 500 degrees or less. Other aspects relate to materials, such as a material including a single epitaxial layer on top of a crystalline substrate, the layer including one or more semiconductor materials and having at least a partial rhombohedral lattice, or a substantially rhombohedral lattice.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: January 30, 2024
    Assignee: United States of America as represented by the Administrator of NASA
    Inventors: Hyun Jung Kim, Sang Hyouk Choi
  • Patent number: 11742817
    Abstract: A process for transferring a thin layer consisting of a first material to a support substrate consisting of a second material having a different thermal expansion coefficient, comprises providing a donor substrate composed of an assembly of a thick layer formed of the first material and of a handle substrate having a thermal expansion coefficient similar to that of the support substrate, and the donor substrate having a main face on the side of the thick layer introducing light species into the thick layer to generate a plane of weakness therein and to define the thin layer between the plane of weakness and the main face of the donor substrate; assembling the main face of the donor substrate with a face of the support substrate; and detachment of the thin layer at the plane of weakness, the detachment comprising application of a heat treatment.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: August 29, 2023
    Assignee: Soitec
    Inventors: Isabelle Huyet, Cedric Charles-Alfred, Didier Landru, Alexis Drouin
  • Patent number: 11644735
    Abstract: Provided is a wavelength conversion element capable of achieving highly efficient wavelength conversion, without relying on a method of applying electric fields. A wavelength conversion element is formed of a second-order nonlinear optical crystal and has a z-axis, running along a direction of spontaneous polarization, within a substrate plane. The wavelength conversion element includes a waveguide in which, when a plurality of circles having their centers on a straight line parallel to the z-axis and having the same radius are depicted so that circumferences of the plurality of circles contact each other, semicircular waveguides corresponding to one semicircles of the circumferences with the straight line as a boundary, are alternately connected.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: May 9, 2023
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Osamu Tadanaga, Takahiro Kashiwazaki, Takushi Kazama, Takeshi Umeki, Koji Embutsu, Nobutatsu Koshobu, Ryoichi Kasahara
  • Patent number: 11597181
    Abstract: A wavelength conversion device that includes a plurality of crystal layers adjacent to one another such that crystal-axis orientations thereof are alternately arranged, the plurality of crystal layers each including a first-thickness portion having a first thickness and a second-thickness portion having a second thickness smaller than the first thickness; and an adhesive layer in at least part of a gap between adjacent second-thickness portions of the plurality of crystal layers and with which the plurality of crystal layers are bonded to one another.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: March 7, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kentaro Yoshii, Hiroaki Kaida, Susumu Okazaki, Shigeaki Sugimura
  • Patent number: 10563320
    Abstract: A two-dimensional perovskite forming material with an ammonium halide group disposed on its surface can achieve a high carrier mobility. Preferably, the two-dimensional perovskite forming material includes a monolayer that has such an ammonium halide group at a terminal of its molecular structure, and the ammonium halide group in the monolayer is disposed in an ordered fashion on the surface of the material.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: February 18, 2020
    Assignee: KYUSHU UNIVERSITY, NATIONAL UNIVERSITY CORPORATION
    Inventors: Toshinori Matsushima, Chuanjiang Qin, Chihaya Adachi
  • Patent number: 10373830
    Abstract: An electromagnetic wave irradiation apparatus and methods to bond unbonded areas in a bonded pair of substrates are disclosed. The unbonded areas between the substrates are eliminated by thermal activation in the unbonded areas induced by electromagnetic wave irradiation having a wavelength selected to effect a phonon or electron excitation. A first substrate of the bonded pair of substrates absorbs the electromagnetic radiation and a portion of a resulting thermal energy transfers to an interface of the bonded pair of substrates at the unbonded areas with sufficient flux to cause opposite sides the first and second substrates to interact and dehydrate to form a bond (e.g., Si—O—Si bond).
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: August 6, 2019
    Assignee: Ostendo Technologies, Inc.
    Inventors: Hussein S. El-Ghoroury, Minghsuan Liu, Kameshwar Yadavalli, Weilong Tang, Benjamin A. Haskell, Hailong Zhou
  • Patent number: 10310183
    Abstract: The embodiments of the present disclosure describe forming a semiconductor layer (e.g., III-V semiconductor material) on a silicon substrate using a template. In one embodiment, the template is patterned to form a plurality of cylindrical openings or pores that expose a portion of the underlying silicon substrate. The material of the semiconductor is disposed into the pores to form individual crystals or monocrystals. Because of the lattice mismatch between the crystalline silicon substrate and the material of the semiconductor layer, the monocrystals may include defects. However, the height of the pores is controlled such that these defects terminate at a sidewall of the template. Thus, the monocrystals can be used to form a single sheet (or single crystal) semiconductor layer above that template that is defect free.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: June 4, 2019
    Assignee: Cisco Technology, Inc.
    Inventors: Harry E. Ruda, Igor Savelyev, Marina Blumin, Christina F. Souza
  • Patent number: 10199536
    Abstract: A method of fabricating a device using a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions. A device including one or more of these features also is provided.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: February 5, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Rakesh Jain, Wenhong Sun, Jinwei Yang, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Patent number: 10141180
    Abstract: A silicon wafer is manufactured by subjecting a silicon wafer sliced from a silicon single-crystal ingot grown by the Czochralski process to a rapid thermal process in which the silicon wafer is heated to a maximum temperature within a range of 1300 to 1380° C., and kept at the maximum temperature for 5 to 60 seconds; and removing a surface layer of the wafer where a semiconductor device is to be manufactured by a thickness of not less X [?m] which is calculated according to the below equations (1) to (3): X [?m]=a [?m]+b [?m]??(1); a [?m]=(0.0031×(said maximum temperature) [° C.]?3.1)×6.4×(cooling rate)?0.4 [° C./second]??(2); and b [?m]=a/(solid solubility limit of oxygen) [atoms/cm3]/(oxygen concentration in substrate) [atoms/cm3]??(3).
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: November 27, 2018
    Assignee: GLOBALWAFERS JAPAN CO., LTD.
    Inventors: Koji Araki, Tatsuhiko Aoki, Haruo Sudo, Takeshi Senda
  • Patent number: 10094045
    Abstract: In a method of manufacturing a GaN substrate, a capping layer may be formed on a first surface of a silicon substrate. A buffer layer may be formed on a second surface of the silicon substrate. The second surface may be opposite the first surface. A GaN substrate may be formed on the buffer layer by performing a hydride vapor phase epitaxy (HVPE) process. The capping layer and the silicon substrate may be removed.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: October 9, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mi-Hyun Kim, Sam-Mook Kang, Jun-Youn Kim, Young-Jo Tak, Young-Soo Park
  • Patent number: 9984941
    Abstract: A semiconductor material stack of, from bottom to top, a first semiconductor material having a first lattice constant and a second semiconductor material having a second lattice constant that may or may not differ from the first lattice constant and is selected from an III-V compound semiconductor and germanium is provided. The second semiconductor material of the semiconductor material stack is then scanned using an atomic force microscope (AFM) operating in a tapping mode to provide an AFM image of the second semiconductor material of the semiconductor material stack. The resultant AFM image is then analyzed and crystal defects at a topmost surface of the second semiconductor material of the semiconductor material stack can be measured.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: May 29, 2018
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, John A. Ott
  • Patent number: 9976232
    Abstract: An artificial quartz crystal growth method that includes applying a pressure that causes at least two substantially rectangular-parallelepiped-shaped quartz crystal substrates to abut each other in an X-axis direction with crystallographic axis directions of the quartz crystal substrates aligned with each other, and causing the at least two quartz crystal substrates to grow an artificial quartz crystal in a state where the pressure is being applied.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: May 22, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masatoshi Nishimoto, Yu Shirai, Sugao Yamaguchi, Takumi Shitara
  • Patent number: 9852898
    Abstract: A target for ultraviolet light generation comprises a substrate adapted to transmit ultraviolet light therethrough and a light-emitting layer, disposed on the substrate, for generating ultraviolet light in response to an electron beam. The light-emitting layer includes a powdery or granular oxide crystal containing Lu and Si doped with an activator (e.g., Pr:LPS and Pr:LSO crystals).
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: December 26, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Yoshinori Honda, Hiroyuki Taketomi, Fumitsugu Fukuyo, Koji Kawai, Hidetsugu Takaoka, Takashi Suzuki
  • Patent number: 9741560
    Abstract: A method of growing a nitride semiconductor layer may include preparing a substrate in a reactor, growing a first nitride semiconductor on the substrate at a first temperature, the first nitride semiconductor having a thermal expansion coefficient different from a thermal expansion coefficient of the substrate, and removing the substrate at a second temperature.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: August 22, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-soo Park, Moon-sang Lee, Young-soo Park
  • Patent number: 9310556
    Abstract: A waveguide choke joint includes a first array of pillars positioned on a substrate, each pillar in the first array of pillars having a first size and configured to receive an input plane wave at a first end of the choke joint. The choke joint has a second end configured to transmit the input plane wave away from the choke joint. The choke joint further includes a second array of pillars positioned on the substrate between the first array of pillars and the second end of the choke joint. Each pillar in the second array of pillars has a second size. The choke joint also has a third array of pillars positioned on the substrate between the second array and the second end of the choke joint. Each pillar in the third array of pillars has a third size.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: April 12, 2016
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Edward J. Wollack, Kongpop U-Yen, David T. Chuss
  • Patent number: 9243345
    Abstract: A method of manufacturing a silicon wafer provides a silicon wafer which can reduce the precipitation of oxygen to prevent a wafer deformation from being generated and can prevent a slip extension due to boat scratches and transfer scratches serving as a reason for a decrease in wafer strength, even when the wafer is provided to a rapid temperature-rising-and-falling thermal treatment process.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: January 26, 2016
    Assignee: SUMCO CORPORATION
    Inventors: Toshiaki Ono, Wataru Ito, Jun Fujise
  • Patent number: 9011598
    Abstract: The present invention provides methods for fabricating a composite substrate including a supporting substrate and a layer of a binary or ternary material having a crystal form that is non-cubic and semi-polar or non-polar. The methods comprise transferring the layer of a binary or ternary material from a donor substrate to a receiving substrate.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: April 21, 2015
    Assignee: Soitec
    Inventors: Alice Boussagol, Frédéric Dupont, Bruce Faure
  • Publication number: 20150059818
    Abstract: There are provided a film of surface Nb-containing La-STO cubic crystal particles that is effective as, for example, a thermoelectric conversion material for use at low temperatures of around room temperature, and an art for producing this film. The production method includes preparing a mixed aqueous solution in which an La-containing compound, an Sr-containing compound, a six-fold coordinated Ti complex compound, and an amphiphilic compound are dissolved; growing cubic-form crystals formed of La-doped STO in the mixed aqueous solution by a hydrothermal synthesis method; obtaining surface Nb-containing La-STO cubic crystal particles by dissolving a niobium-containing compound in this mixed solution and heating; and forming a particle film in which the surface Nb-containing La-STO cubic crystal particles are bonded, by disposing the surface Nb-containing La-STO cubic crystal particles on a substrate and carrying out firing.
    Type: Application
    Filed: March 10, 2014
    Publication date: March 5, 2015
    Inventors: Kunihito KOUMOTO, Feng DANG, Nam-Hee PARK, Chunlei WAN, Kazuki TSURUTA
  • Publication number: 20150027362
    Abstract: This invention relates seed layers and a process of manufacturing seed layers for casting silicon suitable for use in solar cells or solar modules. The process includes the step of positioning tiles with aligned edges to form seams on a suitable surface, and the step of joining the tiles at the seams to form a seed layer. The step of joining includes heating the tiles to melt at least a portion of the tiles, contacting the tiles at both ends of at least one seam with electrodes, using plasma deposition of amorphous silicon, applying photons to melt a portion of the tiles, and/or layer deposition. Seed layers of this invention include a rectilinear shape of at least about 500 millimeters in width and length.
    Type: Application
    Filed: October 8, 2014
    Publication date: January 29, 2015
    Inventor: Nathan G. Stoddard
  • Patent number: 8940266
    Abstract: The present invention provides a method for producing a large substrate of single-crystal diamond, including the steps of preparing a plurality of single-crystal diamond layers separated form an identical parent substrate, placing the single-crystal diamond layers in a mosaic pattern on a flat support, and growing a single-crystal diamond by a vapor-phase synthesis method on faces of the single-crystal diamond layers where they have been separated from the parent substrate. According to the method of the invention, a mosaic single-crystal diamond having a large area and good quality can be produced relatively easily.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: January 27, 2015
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Hideaki Yamada, Akiyoshi Chayahara, Yoshiaki Mokuno, Shinichi Shikata
  • Patent number: 8882077
    Abstract: This invention relates seed layers and a process of manufacturing seed layers for casting silicon suitable for use in solar cells or solar modules. The process includes the step of positioning tiles with aligned edges to form seams on a suitable surface, and the step of joining the tiles at the seams to form a seed layer. The step of joining includes heating the tiles to melt at least a portion of the tiles, contacting the tiles at both ends of at least one seam with electrodes, using plasma deposition of amorphous silicon, applying photons to melt a portion of the tiles, and/or layer deposition. Seed layers of this invention include a rectilinear shape of at least about 500 millimeters in width and length.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: November 11, 2014
    Assignee: AMG Idealcast Solar Corporation
    Inventor: Nathan G. Stoddard
  • Publication number: 20140091325
    Abstract: When an SiC single crystal having a large diameter of a {0001} plane is produced by repeating a-plane growth, the a-plane growth of the SiC single crystal is carried out so that a ratio Sfacet (=S1×100/S2) of an area (S1) of a Si-plane side facet region to a total area (S2) of the growth plane is maintained at 20% or less.
    Type: Application
    Filed: June 4, 2012
    Publication date: April 3, 2014
    Applicants: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO, SHOWA DENKO K.K., DENSO CORPORATION
    Inventors: Itaru Gunjishima, Keisuke Shigetoh, Yasushi Urakami, Masanori Yamada, Ayumu Adachi, Masakazu Kobayashi
  • Patent number: 8460461
    Abstract: The present invention provides an oriented substrate for forming an epitaxial thin film thereon, which has a more excellent orientation than that of a conventional one and a high strength, and a method for manufacturing the same. The present invention provides a clad textured metal substrate for forming the epitaxial thin film thereon, which includes a metallic layer and a silver layer bonded to at least one face of the metallic layer, wherein the silver layer has a {100}<001> cube texture in which a deviating angle ?? of crystal axes satisfies ???9 degree. The textured metal substrate can be manufactured by subjecting the silver sheet containing 30 to 200 ppm oxygen by concentration to the orienting treatment of hot-working and heat-treating, and bonding the metal sheet with the oriented silver sheet by using a surface activated bonding process.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: June 11, 2013
    Assignees: Chubu Electric Power Co., Ltd., Tanaka Kikinzoku Kogyo. K.K.
    Inventors: Naoji Kashima, Shigeo Nagaya, Kunihiro Shima, Hirofumi Hoshino
  • Patent number: 8287643
    Abstract: The present invention provides an oriented substrate for forming an epitaxial thin film thereon, which has a more excellent orientation than that of a conventional one and a high strength, and a method for manufacturing the same. The present invention provides a clad textured metal substrate for forming the epitaxial thin film thereon, which includes a metallic layer and a silver layer bonded to at least one face of the metallic layer, wherein the silver layer has a {100}<001> cube texture in which a deviating angle ?? of crystal axes satisfies ???9 degree. The textured metal substrate can be manufactured by subjecting the silver sheet containing 30 to 200 ppm oxygen by concentration to the orienting treatment of hot-working and heat-treating, and bonding the metal sheet with the oriented silver sheet by using a surface activated bonding process.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: October 16, 2012
    Assignees: Chubu Electric Power Co., Inc., Tanaka Kikinzoku Kogyo K.K.
    Inventors: Naoji Kashima, Shigeo Nagaya, Kunihiro Shima, Hirofumi Hoshino
  • Patent number: 8257491
    Abstract: Growth conditions are developed, based on a temperature-dependent alignment model, to enable formation of cubic group IV, group II-V and group II-VI crystals in the [111] orientation on the basal (0001) plane of trigonal crystal substrates, controlled such that the volume percentage of primary twin crystal is reduced from about 40% to about 0.3%, compared to the majority single crystal. The control of stacking faults in this and other embodiments can yield single crystalline semiconductors based on these materials that are substantially without defects, or improved thermoelectric materials with twinned crystals for phonon scattering while maintaining electrical integrity. These methods can selectively yield a cubic-on-trigonal epitaxial semiconductor material in which the cubic layer is substantially either directly aligned, or 60 degrees-rotated from, the underlying trigonal material.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: September 4, 2012
    Assignee: The United States of America, as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Yeonjoon Park, Sang Hyouk Choi, Glen C. King, James R. Elliott
  • Patent number: 8231724
    Abstract: The reactor for polycrystalline silicon is a reactor for polycrystalline silicon in which a silicon seed rod installed inside the reactor is heated by supplying electricity, a raw material gas supplied inside the reactor is allowed to react, thereby producing polycrystalline silicon on the surface of the silicon seed rod, and specifically, the reactor for polycrystalline silicon is provided with a raw material gas supply port installed on the bottom of the reactor and a raw material gas supply nozzle attached to the raw material gas supply port so as to be communicatively connected and extending upward, in which the upper end of the raw material gas supply nozzle is set to a height in a range from ?10 cm to +5 cm on the basis of the upper end of the electrode which retains the silicon seed rod.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: July 31, 2012
    Assignee: Mitsubishi Materials Corporation
    Inventors: Toshihide Endoh, Toshiyuki Ishii, Masaaki Sakaguchi, Naoki Hatakeyama
  • Patent number: 8221548
    Abstract: A process for producing a diamond thin-film includes forming a diamond crystal thin-film on a substrate and firing the diamond crystal thin-film at a sufficient temperature under high pressure under which a diamond is stable. A diamond single-crystal substrate having a diamond single-crystal thin-film formed thereon is placed in an ultra-high-pressure and high-temperature firing furnace to anneal the diamond single-crystal thin-film under the conditions of 1200° C. and 6 GPa.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: July 17, 2012
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Publication number: 20110278595
    Abstract: A method for manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate made of silicon carbide and a SiC substrate made of single-crystal silicon carbide; fabricating a stacked substrate by placing said SiC substrate on and in contact with a main surface of said base substrate; and connecting said base substrate and said SiC substrate to each other by heating said stacked substrate in a container to fall within a range of temperature equal to or greater than a sublimation temperature of silicon carbide constituting said base substrate. In the step of connecting said base substrate and said SiC substrate, a silicon carbide body made of silicon carbide and different from said base substrate and said SiC substrate is disposed in said container.
    Type: Application
    Filed: May 10, 2011
    Publication date: November 17, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Taro Nishiguchi, Makoto Sasaki, Shin Harada, Kyoko Okita, Hiroki Inoue, Yasuo Namikawa
  • Patent number: 7962205
    Abstract: A CPU (170) of a human subject index estimation apparatus (1) computes a waist circumference based on body weight measured by a weight scale (110) and bioelectric impedance measured by a bioelectric impedance measurement unit (200A), and information such as age and height which was input through input unit (150). The computed waist circumference is stored, along with the information such as age and height, in a third storage unit (140) that is a rewritable non-volatile memory. The CPU (170) displays the waist circumference on display unit (160).
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: June 14, 2011
    Assignee: Tanita Corporation
    Inventors: Masashi Okura, Yasuhiro Kasahara
  • Patent number: 7907647
    Abstract: The present invention relates to an optical element for converting light of prescribed wavelength emitted from a light source into light of wavelength different from the prescribed wavelength for outputting. A first crystal part (20) and a second crystal part (21) having respective surfaces opposed to each other whose coefficients of linear expansion are different by 5 ppm or more are optically polished so that the surfaces opposed to each other include crystallographic axes. An acrylic adhesive whose glass transition point is 75° C. or lower is applied to the adhesive surface of the first crystal part (20) or the second crystal part (21) to stick the first crystal part (20) and the second crystal part (21) to each other. The adhesive is irradiated with light to cure the adhesive and form an adhesive layer (22) having a refractive index of 1.52 or lower. Then, the first crystal part and the second crystal part stuck to each other are cut into a desired size to form the optical element.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: March 15, 2011
    Assignee: Sony Corporation
    Inventors: Koichiro Kezuka, Hiroto Sasaki
  • Patent number: 7883645
    Abstract: The present invention relates to a method for increasing the conversion of group III metal to group III nitride in a fused metal containing group III elements, with the introduction of nitrogen into the fused metal containing group III, at temperatures?1100° C. and at pressures of below 1×108 Pa, wherein a solvent adjunct is added to the fused metal containing group III elements, which is at least one element of the following elements C, Si, Ge, Fe, and/or at least one element of the rare earths, or an alloy or a compound of these elements, in particular their nitrides.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: February 8, 2011
    Assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
    Inventors: Jochen Friedrich, Georg Muller, Elke Meissner, Bernhard Birkmann, Stephan Hussy
  • Patent number: 7842132
    Abstract: The present invention relates to an optical element for converting light of prescribed wavelength emitted from a light source into light of wavelength different from the prescribed wavelength for outputting. A first crystal part (20) and a second crystal part (21) having respective surfaces opposed to each other whose coefficients of linear expansion are different by 5 ppm or more are optically polished so that the surfaces opposed to each other include crystallographic axes. An acrylic adhesive whose glass transition point is 75° C. or lower is applied to the adhesive surface of the first crystal part (20) or the second crystal part (21) to stick the first crystal part (20) and the second crystal part (21) to each other. The adhesive is irradiated with light to cure the adhesive and form an adhesive layer (22) having a refractive index of 1.52 or lower. Then, the first crystal part and the second crystal part stuck to each other are cut into a desired size to form the optical element.
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: November 30, 2010
    Assignee: Sony Corporation
    Inventors: Koichiro Kezuka, Hiroto Sasaki
  • Patent number: 7833345
    Abstract: A method for the treatment of a crystal, such as a lithium niobate crystal or lithium tantalate crystal, having nonlinear optical properties. The crystal comprises foreign atoms which bring about specific absorption of radiated light. The foreign atoms are transformed into a lower valent state by means of oxidation. Electrons, which are released during oxidation, are discharged from the crystal with the aid of an external power source.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: November 16, 2010
    Assignee: Deutsche Telekom AG
    Inventors: Karsten Buse, Matthias Falk, Konrad Peithmann
  • Publication number: 20100166636
    Abstract: The present invention provides a method for producing a large substrate of single-crystal diamond, including the steps of preparing a plurality of single-crystal diamond layers separated form an identical parent substrate, placing the single-crystal diamond layers in a mosaic pattern on a flat support, and growing a single-crystal diamond by a vapor-phase synthesis method on faces of the single-crystal diamond layers where they have been separated from the parent substrate. According to the method of the invention, a mosaic single-crystal diamond having a large area and good quality can be produced relatively easily.
    Type: Application
    Filed: December 23, 2009
    Publication date: July 1, 2010
    Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Hideaki Yamada, Akiyoshi Chayahara, Yoshiaki Mokuno, Shinichi Shikata
  • Patent number: 7704322
    Abstract: A static fluid and a second fluid are placed into contact along a microfluidic free interface and allowed to mix by diffusion without convective flow across the interface. In accordance with one embodiment of the present invention, the fluids are static and initially positioned on either side of a closed valve structure in a microfluidic channel having a width that is tightly constrained in at least one dimension. The valve is then opened, and no-slip layers at the sides of the microfluidic channel suppress convective mixing between the two fluids along the resulting interface. Applications for microfluidic free interfaces in accordance with embodiments of the present invention include, but are not limited to, protein crystallization studies, protein solubility studies, determination of properties of fluidics systems, and a variety of biological assays such as diffusive immunoassays, substrate turnover assays, and competitive binding assays.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: April 27, 2010
    Assignee: California Institute of Technology
    Inventors: Carl L. Hansen, Stephen R. Quake, James M. Berger
  • Publication number: 20100033806
    Abstract: Affords a wavelength converter manufacturing method and a wavelength converter whereby the transmissivity can be improved. A method of manufacturing a wavelength converter (10a) is provided with the following steps. At first, crystal is grown. Then a first crystal (11) and a second crystal (12) are formed by sectioning the crystal into two or more in such a way that the domains are the reverse of each other. The first and second crystals (11) and (12) are then interlocked in such a way that a domain inversion structure in which the polar directions of the first and second crystals (11) and (12) periodically reverse along an optical waveguide (13) is formed, and the domain inversion structure satisfies quasi-phase-matching conditions for an incoming beam (101).
    Type: Application
    Filed: July 28, 2009
    Publication date: February 11, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Issei Satoh, Michimasa Miyanaga, Yoshiyuki Yamamoto, Hideaki Nakahata
  • Patent number: 7537980
    Abstract: In a method of manufacturing a stacked semiconductor device, a seed layer including impurity regions may be prepared. A first insulation interlayer pattern having a first opening may be formed on the seed layer. A first SEG process may be carried out to form a first plug partially filling the first opening. A second SEG process may be performed to form a second plug filling the first opening. A third SEG process may be carried out to form a first channel layer on the first insulation interlayer pattern. A second insulation interlayer may be formed on the first channel layer. The second insulation interlayer, the first channel layer and the second plug arranged on the first plug may be removed to expose the first plug. The first plug may be removed to form a serial opening. The serial opening may be filled with a metal wiring.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: May 26, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Hoon Son, Yu-Gyun Shin, Jong-Wook Lee
  • Publication number: 20090114146
    Abstract: To provide a method for manufacturing a semiconductor device and a substrate processing apparatus which contribute to forming high-density nuclei. The method for manufacturing a semiconductor device according to the invention includes the steps of: carrying a wafer 200 having an insulator film on the surface into a reaction tube 203; introducing silicon-based gas into the reaction tube 203 to form silicon grains on the insulator film formed on the surface of the wafer 200; and carrying the processed wafer 200 out from the reaction tube 203. Before the introduction of the silicon-based gas, dopant gas is introduced into the reaction tube 203.
    Type: Application
    Filed: December 28, 2006
    Publication date: May 7, 2009
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yushin Takasawa, Naonori Akae
  • Publication number: 20090035504
    Abstract: Some demonstrative embodiments of the invention include a welded crystal, and/or a method and/or system of producing thereof. In some demonstrative embodiments, the welded crystal welded crystal may include a welded portion joining at least two crystals, wherein the welded portion has a bending strength equal to at least fifty percent of the bending strength of at least one of the crystals. Other embodiments are described and claimed.
    Type: Application
    Filed: August 2, 2007
    Publication date: February 5, 2009
    Inventors: Valerian PISHCHIK, Joseph A. Sragowicz, Vadim Livshits, Kaydash Vitaly
  • Publication number: 20090004426
    Abstract: This invention generally relates to a process for suppressing oxygen precipitation in epitaxial silicon wafers having a heavily doped silicon substrate and a lightly N-doped silicon epitaxial layer by dissolving existing oxygen clusters and precipitates within the substrate. Furthermore, the formation of oxygen precipitates is prevented upon subsequent oxygen precipitation heat treatment.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Luca Moiraghi, DongMyun Lee, Chanrae Cho, Marco Ravani
  • Patent number: 7468103
    Abstract: Disclosed herein is a method of manufacturing a gallium nitride-based (AlxInyGa(1?x?y)N, where 0?x?1, 0?y?1, 0?x+y?1) single crystal substrate. The method comprises the steps of preparing a ZnO substrate, primarily growing a gallium nitride-based single crystal layer, and secondarily growing an additional gallium nitride-based single crystal layer on the primarily grown gallium nitride-based single crystal layer while removing the ZnO substrate by etching the underside of the ZnO substrate.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: December 23, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Soo Min Lee, Hun Joo Hahm, Young Ho Park
  • Patent number: 7462237
    Abstract: The present invention provides computer-implementable systems and methods for generating images of crystals. The systems each include (a) a light source; (b) a rotatable first polarizing material; (c) a rotatable second polarizing material; (d) a light-capturing device; and (e) a software program executable on the computer-implementable system for analyzing electrical signals from the light-capturing device.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: December 9, 2008
    Assignee: deCODE biostructures, Inc.
    Inventors: Peter Nollert-von Specht, Mark B. Mixon
  • Publication number: 20080282967
    Abstract: A method for forming a uniformly oriented crystalline sheet, wherein a plurality of crystallites are introduced into a liquid. At least a portion of the crystallites float on the surface of the liquid, and are induced to self-orientate until they are uniformly oriented in a compact mosaic configuration, while their sintering is prevented. A uniformly oriented crystalline sheet is formed from the compact mosaic configuration, for example, by sintering the crystallites. An apparatus for forming a crystalline sheet includes a container containing a liquid, wherein a plurality of crystallites are introduced and at least a portion thereof float on the surface of the liquid without sintering.
    Type: Application
    Filed: June 15, 2005
    Publication date: November 20, 2008
    Inventor: Moshe Einav
  • Publication number: 20080156254
    Abstract: The present invention is related to a process for obtaining a larger area substrate of mono-crystalline gallium-containing nitride by making selective crystallization of gallium containing nitride on a smaller seed under a crystallization temperature and/or pressure from a supercritical ammonia-containing solution made by dissolution of gallium-containing feedstock in a supercritical ammonia-containing solvent with alkali metal ions, comprising: providing two or more elementary seeds, and making selective crystallization on the two or more separate elementary seeds to get a merged larger compound seed. The merged larger compound seed is used for a seed in a new growth process and then to get a larger substrate of mono-crystal gallium-containing nitride.
    Type: Application
    Filed: November 28, 2005
    Publication date: July 3, 2008
    Applicants: AMMONO Sp. z o.o., NICHIA CORPORATION
    Inventors: Robert Dwilinski, Roman Doradzinski, Jerzy Garczynski, Leszek Sierzputowski, Yasuo Kanbara
  • Publication number: 20080160274
    Abstract: In designing a precision monolithic structure having all discrete components with different Coefficient of Thermal Expansion (CTE) permanently bonded together, to avoid internal stress caused by changing of temperature: The Coefficient of Thermal Expansion (CTE) Adaptor must be bonded between two components having different Coefficient of Thermal Expansion (CTE); the Bonding Interfaces must be parallel; the Coefficient of Thermal Expansion (CTE) Adaptor is made of material having varied CTE, the variation must be gradual and in only one direction, which is perpendicular to the said Bonding Interfaces; at each Bonding Interface, the CTE of the CTE Adaptor must match the CTE of bonding component in certain degree.
    Type: Application
    Filed: December 31, 2006
    Publication date: July 3, 2008
    Inventor: Chi Hung Dang
  • Patent number: 7335865
    Abstract: The present invention relates to process for producing a transparent missile dome having a spanning angle larger than 180°, comprising the step of: (a) growing from single crystals of a ceramic material a first dome portion, said first dome portion being a portion of a sphere (b) growing from single crystals of a ceramic material a second dome portion, said second dome portion being a complementary sphere-portion for said first dome portion (c) attaching said complementary dome portion to said first dome portion and to the body of the missile, thereby forming a missile with a front dome having a spanning angle larger than 180°.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: February 26, 2008
    Assignee: Rafael-Armament Development Authority Ltd.
    Inventors: Dov Tibi, Tsafrir Ben-Ari, Igal Finkelstein
  • Patent number: 7297209
    Abstract: A method of forming an anisotropic crystal film, comprising providing a donor which comprises a base and an anisotropic crystal film bounded to the base, and a receptor. At least a portion of the anisotropic crystal film is placed in contact with the receptor. A loading is applied to at least a portion of the base, whereby providing shear and compressive stresses onto the donor and receptor, and transferring at least a portion of the anisotropic crystal film onto the receptor and delaminating the at least portion of the anisotropic crystal film from the base.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: November 20, 2007
    Assignee: Nitto Denko Corporation
    Inventors: Pavel I. Lazarev, Michael V. Paukshto
  • Patent number: 7250081
    Abstract: Methods for repair of single crystal superalloys by laser welding and products thereof have been disclosed. The laser welding process may be hand held or automated. Laser types include: CO2, Nd:YAG, diode and fiber lasers. Parameters for operating the laser process are disclosed. Filler materials, which may be either wire or powder superalloys are used to weld at least one portion of a single crystal superalloy substrate.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: July 31, 2007
    Assignee: Honeywell International, Inc.
    Inventors: Yiping Hu, William F. Hehmann, Murali Madhava
  • Patent number: 7247545
    Abstract: A method of fabricating a low defect germanium thin film includes preparing a silicon wafer for germanium deposition; forming a germanium film using a two-step CVD process, annealing the germanium thin film using a multiple cycle process; implanting hydrogen ions; depositing and smoothing a layer of tetraethylorthosilicate oxide (TEOS); preparing a counter wafer; bonding the germanium thin film to a counter wafer to form a bonded structure; annealing the bonded structure at a temperature of at least 375° C. to facilitate splitting of the bonded wafer; splitting the bonded structure to expose the germanium thin film; removing any remaining silicon from the germanium thin film surface along with a portion of the germanium thin film defect zone; and incorporating the low-defect germanium thin film into the desired end-product device.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: July 24, 2007
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Jer-Shen Maa, Jong-Jan Lee, Douglas J. Tweet, Sheng Teng Hsu
  • Patent number: RE46445
    Abstract: Piezoelectric compounds of the formula xNamBinTiO3-yKmBinTiO3-zLimBinTiO3-pBaTiO3 where (0<x?1), (0?y?1), (0?z?1), (0.3?m?0.7), (0.3?n?0.7), (0<p?1) (0.9?m/n?1.1) as well as to doped variations thereof are disclosed. The material is suitable for high power applications.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: June 20, 2017
    Assignee: The Penn State Research Foundation
    Inventors: Shujun Zhang, Hyeong Jae Lee, Thomas R Shrout