Abstract: A stacked III-V semiconductor diode having an n+-layer with a dopant concentration of at least 1019 N/cm3, an n?-layer with a dopant concentration of 1012-1016 N/cm3, a layer thickness of 10-300 microns, a p+-layer with a dopant concentration of 5×1018-5×1020 cm3, with a layer thickness greater than 2 microns, wherein said layers follow one another in the sequence mentioned, each comprising a GaAs compound. The n+-layer or the p+-layer is formed as the substrate and a lower side of the n?-layer is materially bonded with an upper side of the n+-layer, and a doped intermediate layer is arranged between the n?-layer and the p+-layer and materially bonded with an upper side and a lower side.

Abstract: A tunable capacitance circuit comprises a plurality of varactor transistors which are coupled in series. An antenna tuner comprises such a tunable capacitance circuit.

Abstract: An LED (Light Emitting Diode) module includes an LED unit having one or more LED chips and a case. The case includes: a body including a base plate made of ceramic, the base plate having a main surface and a bottom surface opposite to the main surface; a through conductor penetrating through the base plate; and one or more pads formed on the main surface and making conductive connection with the through conductor, the pads mounting thereon the LED unit. The through conductor includes a main surface exposed portion exposed to the main surface and overlapping the LED unit when viewed from top, a bottom surface reaching portion connected to the main surface exposed portion and reaching the bottom surface. The pads cover at least a portion of the main surface exposed portion.

Abstract: A method to integrate a vertical IMPATT diode in a planar process.

Abstract: Disclosed is a Zener diode having a scalable reverse-bias breakdown voltage (Vb) as a function of the position of a cathode contact region relative to the interface between adjacent cathode and anode well regions. Specifically, cathode and anode contact regions are positioned adjacent to corresponding cathode and anode well regions and are further separated by an isolation region. However, while the anode contact region is contained entirely within the anode well region, one end of the cathode contact region extends laterally into the anode well region. The length of this end can be predetermined in order to selectively adjust the Vb of the diode (e.g., increasing the length reduces Vb of the diode and vice versa). Also disclosed are an integrated circuit, incorporating multiple instances of the diode with different reverse-bias breakdown voltages, a method of forming the diode and a design structure for the diode.

Abstract: Provided are a light emitting device package and a method for fabricating the same. The light emitting device package comprises a substrate; a light emitting device on the substrate; a zener diode comprising a first conductive type impurity region and two second conductive type impurity regions, the first conductive type impurity region being disposed in the substrate, the two second conductive type impurity regions being separately disposed in two areas of the first conductive type impurity region; and a first electrode layer and a second electrode layer, each of them being electrically connected to the second conductive type impurity regions and the light emitting device.

Abstract: The present disclosure provides systems and methods for configuring and constructing a single photo detector or array of photo detectors with all fabrications circuitry on a single side of the device. Both the anode and the cathode contacts of the diode are placed on a single side, while a layer of laser treated semiconductor is placed on the opposite side for enhanced cost-effectiveness, photon detection, and fill factor.

Abstract: Provided are a light emitting device package and a method for fabricating the same. The light emitting device package comprises a substrate; a light emitting device on the substrate; a zener diode comprising a first conductive type impurity region and two second conductive type impurity regions, the first conductive type impurity region being disposed in the substrate, the two second conductive type impurity regions being separately disposed in two areas of the first conductive type impurity region; and a first electrode layer and a second electrode layer, each of them being electrically connected to the second conductive type impurity regions and the light emitting device.

Abstract: Impurity concentration of a second semiconductor region is set such that when a predetermined reverse bias is applied to a heterojunction diode configured by a first semiconductor region and the second semiconductor region, a breakdown voltage at least in a heterojunction region other than outer peripheral ends of the heterojunction diode is a breakdown voltage of a semiconductor device.

Abstract: A silicon controlled rectifier structure is provided in a substrate having a first conductive type. A well region formed within the substrate has a second conductive type. A first dopant region formed within the substrate and the well region has the first conductive type. A second dopant region formed within the substrate and a portion of the well region has the second conductive type. A third dopant region formed under the second dopant region has the first conductive type, in which the second and the third regions form a vertical Zener diode. A fourth dopant region formed within the substrate and separated from the second dopant region by a separation structure has the second conductive type. A fifth dopant region is formed within the substrate in a manner that the fourth dopant region is between the isolation structure and the fifth dopant region, and has the first conductive type.

Abstract: The present invention provides an avalanche photodiode capable of raising productivity. An n-type InP buffer layer, an n-type GaInAs light absorption layer, an n-type GaInAsP transition layer, an n-type InP electric field adjusting layer, an n-type InP avalanche intensifying layer, an n-type AlInAs window layer and a p-type GaInAs contact layer are grown in order on an n-type InP substrate. Next, Be is ion-injected into an annular area along the outer periphery of a light receiving area which is activated by heat treatment so as to form an inclined joint, to obtain a p-type peripheral area for preventing an edge break down. Further, Zn is selectively diffused thermally into the light receiving area until it reaches the n-type InP avalanche intensifying layer so as to form a p-type conductive area.

Abstract: A MOSFET device that includes a first Zener diode connected between a gate metal and a drain metal of said semiconductor power device for functioning as a gate-drain (GD) clamp diode. The GD clamp diode includes multiple back-to-back doped regions in a polysilicon layer doped with dopant ions of a first conductivity type next to a second conductivity type disposed on an insulation layer above the MOSFET device, having an avalanche voltage lower than a source/drain avalanche voltage of the MOSFET device wherein the Zener diode is insulated from a doped region of the MOSFET device for preventing a channeling effect.

Abstract: A sequential mesa type avalanche photodiode (APD) includes a semiconductor substrate and a sequential mesa portion formed on the substrate. In the sequential mesa portion, a plurality of semiconductor layers, including a light absorbing layer and a multiplying layer, are laminated by epitaxial growth. In the plurality of semiconductor layers, a pair of semiconductor layers forming a pn junction is included. The carrier density of a semiconductor layer which is near to the substrate among the pair of semiconductor layers is larger than the carrier density of a semiconductor layer which is far from the substrate among the pair of semiconductor layers. In the APD, light-receiving current based on movement of electrons and positive holes generated in the sequential mesa portion when light is incident from the substrate toward the light absorbing layer is larger at a central portion than at a peripheral portion of the sequential mesa portion.

Abstract: A high frequency oscillator for an integrated semiconductor circuit is a component of the semiconductor circuit, which is comprised of a first silicon layer, an adjoining silicon dioxide layer (insulation layer), and an additional subsequent silicon layer (structured layer), (SOI wafer), wherein the high frequency oscillator is comprised of a resonator with a metallized cylinder made of silicon disposed in the structured layer and a coupling disk that overlaps the cylinder in the vicinity of the layer, and an IMPATT diode that is connected to the cylinder of the resonator via a recess in the coupling disk.

Abstract: A new gate-controlled, negative resistance diode device is achieved. The device comprises, first, a semiconductor layer in a substrate. The semiconductor layer contains an emitter region and a barrier region. The barrier region is in contact with the emitter region and is laterally adjacent to the emitter region. The semiconductor layer contains a collector region. A drift region comprises the semiconductor layer between the barrier region and the collector region. Finally, a gate comprises a conductor layer overlying the drift region, the barrier region, and at least a part of the emitter region with an insulating layer therebetween. A method of manufacture is achieved.

Abstract: A single-electrode, push-pull semiconductor PIN Mach-Zehnder modulator (10) that includes first and second PIN devices (12, 14) on a substrate (16). Intrinsic layers (22, 28) of the devices (12, 14) are the active regions of two arms (50, 52) of a Mach-Zehnder interferometer. An outer electrode (38) is connected to the N layer (24) of the first PIN device (12) and a center electrode (40) is connected to the P layer (20) of the first PIN device (12). An outer electrode (42) is connected to the P layer (26) of the second PIN device (14) and the center electrode (40) is connected to the N layer (30) of the second PIN device (14). An RF modulation signal biases the PIN devices (12, 14) in opposite directions and causes the index refraction of the intrinsic layers (22, 28) to change in opposite directions to give a push-pull modulation effect.

Abstract: The present invention relates to an impact ionisation avalanche transit time (IMPATT) diode device comprising an avalanche region and a drift region, wherein at least one narrow bandgap region, with a bandgap narrower than the bandgap in the avalanche region, is located adjacent to or within the avalanche region in order to generate within the narrow bandgap region a tunnel current which is injected into the avalanche region. This improves the predictability with which a current can be injected into the avalanche region and enables a relatively narrow pulse of current to be injected into the avalanche region in order to enable a relatively noise free avalanche multiplication. The narrow bandgap region may be located between a heavily doped contact region and the avalanche region and is preferably arranged to generate a tunnel current at the peak reverse bias applied to the diode.

Abstract: An electronic package component includes a flip-chip device mounted to a BGA substrate. The BGA substrate includes conductive traces formed on its upper surface and configured in a coplanar waveguide structure. The package includes a dielectric coating applied over the conductive traces and over the upper surface of the substrate. The coating is formed from a material having a dielectric constant that is equal to or approximately equal to the dielectric constant of the BGA substrate material. The dielectric coating reduces the adverse effects caused by phase velocity dispersion of the signal propagated by the coplanar waveguide.

Abstract: The electronic circuit unit of the present invention includes first and second insulating substrates on respective surfaces of which wiring patterns are formed, and thick-film passive elements formed on the surfaces of the first and second insulating substrates in a state in which they are connected to the wiring patterns, wherein the first and second insulating substrates are disposed vertically opposite to each other, and the wiring patterns provided on the first and second insulating substrates are connected through metallic bumps provided between the first and second insulating substrates.

Abstract: A semiconductor light receiving element having a light receiving layer (1) formed from a GaN group semiconductor, and an electrode (2) formed on one surface of the light receiving layer as a light receiving surface (1a) in such a way that the light (L) can enter the light receiving layer is provided. When the light receiving element is of a Schottky barrier type, the aforementioned electrode (2) contains at least a Schottky electrode, which is formed in such a way that, on the light receiving surface (1a), the total length of the boundary lines between areas covered with the Schottky electrode and exposed areas is longer than the length of the outer periphery of the light receiving surface (1a).

Abstract: The invention relates to a high frequency oscillator for an integrated semiconductor circuit and its use.

Abstract: Indium phosphor (InP) Gunn diode that realizes improvements in thermal characteristics, yield factor of good products and easy assembly to planar circuits is provided. In a Gunn diode of the present invention, contact layers are interposing an active layer. An anode electrode and a cathode electrode are formed on the uppermost contact layer. A high resistance region around the cathode electrode is formed at least in an uppermost contact layer by ion implantation using the cathode and anode electrode as a mask. A region under the cathode electrode functions as a Gunn diode and a region under the anode electrode function as a conductive path from the anode electrode to the active layer. These two regions are defined by the high resistance region.

Abstract: A method of epitaxially growing backward diodes and diodes grown by the method are presented herein. More specifically, the invention utilizes epitaxial-growth techniques such as molecular beam epitaxy in order to produce a thin, highly doped layer at the p-n junction in order to steepen the voltage drop at the junction, and thereby increase the electric field. By tailoring the p and n doping levels as well as adjusting the thin, highly doped layer, backward diodes may be consistently produced and may be tailored in a relatively easy and controllable fashion for a variety of applications. The use of the thin, highly doped layer provided by the present invention is discussed particularly in the context of InGaAs backward diode structures, but may be tailored to many diode types.

Abstract: It is an object of the present invention to provide a radio frequency module incorporating an MMIC that has a high S/N ratio while ensuring a high output. A radio frequency module according to the present invention incorporates an MMIC having a field effect transistor in which channel layers for traveling of carriers are formed by a heterostructure of two or more different kinds of materials, and height of a potential barrier of an interface between the different kinds of materials is less than 0.22 eV.

Abstract: A buried Zener diode structure and method of manufacture requires no additional process steps beyond those required in a basic standard bipolar flow with up-down isolation. The buried Zener diode has its N++/P+ junction removed from the silicon surface.

Abstract: Implemented is a diode which controls an energy loss produced during a reverse recovery operation and generates an oscillation of an applied voltage with difficulty even if a reverse bias voltage has a great value. An N layer 101 and a P layer 102 are formed in a semiconductor substrate such as silicon. Furthermore, a cathode side P layer 103 is also formed facing a cathode electrode 105 in a position on the N layer 101 that a depletion layer extended during application of a reverse bias voltage does not reach. By providing the cathode side P layer 103, a current density of a reverse current obtained during a reverse recovery operation can be increased, the sudden change of a resistance component of a diode can be prevented and the generation of a voltage oscillation can be suppressed. The cathode side P layer 103 has a diameter W of approximately 400 &mgr;m or less and a rate of an area of the cathode side P layer 103 occupying a cathode surface is kept at approximately ⅖ or less.

Abstract: The invention concerns an integrated circuit, including a substrate (SBSTR) with sub-circuits provided with a number of terminals, including a substrate terminal or earthing point (GND), a Vcc power supply terminal, an input point (in) and an output point (out). At least one of the Vcc power supply terminal, the input point or the output point is connected via an overvoltage protection circuit to the substrate terminal or earthing point, and the overvoltage protection circuit includes means with diode action formed in the substrate between the relevant terminal and the substrate terminal or earthing point. The means include two or more diode elements of the Zener type connected in series. The substrate of a first conductivity type is provided with a well (WLL) of a second, opposed conductivity type formed in the substrate.

Abstract: It is an object of the present invention to provide a radio frequency module incorporating an MMIC that has a high S/N ratio while ensuring a high output.

Abstract: An insulator film provided on a region for arranging a Zener diode has a plurality of groove portions successively arranged in a direction D1 of extension of each semiconductor region forming the diode. Each groove potion extends in a width direction D2 of each semiconductor region, and has a depth T3. Each semiconductor region is arranged on the upper surface of the insulator film. Therefore, it follows that each semiconductor region has a plurality of irregular shapes arranged in the direction D1 of extension and the Zener diode has a peripheral length not only in the transverse direction D1 but also in a vertical direction D3, so that a p-n junction area in the Zener diode is increased. Thus, parasitic resistance of an input protection Zener diode is reduced for improving a gate insulator film protective function of the diode.

Abstract: Indium phosphor (InP) Gunn diode that realizes improvements in thermal characteristics, yield factor of good products and easy assembly to planar circuits is provided.

Abstract: A microwave-frequency microcircuit assembly includes an integrated circuit structure having a circuit ground. A support structure includes a grounded metallic carrier, and a dielectric substrate having a top surface, a bottom surface contacting the carrier, and a capacitor via extending through the dielectric substrate. A metallization on the top surface of the substrate includes an input metallization trace to the integrated circuit structure, an output metallization trace from the integrated circuit structure, and a substrate ground plane upon which the integrated circuit structure is affixed. A thin-film capacitor resides in the capacitor via and is electrically connected between the substrate ground plane and the carrier. An electrical resistor is connected between the circuit ground of the integrated circuit structure and the carrier to self-bias the integrated circuit structure.

Abstract: A high-frequency semiconductor device includes a microwave monolithic integrated circuit having first and second passive element sections each having at least one passive element as well as an FET. The FET has a gate connected to the first passive element section and a drain connected to the second passive element section. A bed configured as a plate of a conductive member is provided for mounting thereon the microwave monolithic integrated circuit. The bed has at least one opening or hole formed therethrough. The hole of the bed is provided at a specified position of the bed so as to underlie either one the first or second passive element section. With such an arrangement, it becomes possible to obtain enhanced performance.

Abstract: In a high power IMPATT ( Impact Avalanche Transit Time) diode for generating high frequency signals two electrodes, anode (2) and cathode (1), are arranged with a semiconductor layer therebetween. Said semiconductor layer comprises a drift layer (7) for transport of charge carriers between the electrodes. The semiconductor layer is made of crystalline SiC and it is provided with means (9) adapted to locally increase the electric field in the drift layer substantially with respect to the average electric field therein for generating an avalanche breakdown at a considerably lower voltage across the electrodes than would the electric field be substantially constant across the entire drift layer.

Abstract: In a power microwave hybrid integrated circuit, a depth of recesses (2) in a metal base (1) is selected so that a face surface of chips (3) and a metal base (1) are coplanar, a dielectric board (5) has a shield ground metallization (10) on its back side at the places adjoining the metal base (1), the metal base (1) is sealingly joined and electrically connected to the shield grounding metallization (10) of the board (5), and interconnecting holes (7) of the board (5) are filled with an electrically conducting material (9), the spacing between the side surfaces of the chips (3) and the side surfaces of the recesses (2) in the base (1) being of 0.001 to 0.2 mm.

Abstract: The present invention is directed to an improved deep trench structure, for use in junction devices, which addresses junction breakdown voltage instabilities of the prior art. The primary, or metallurgical, junction where avalanche breakdown occurs is moved away from the surface dielectric into the bulk silicon by adding a lightly doped layer adjacent to the deep trench. A preferred embodiment suitable for isolated structures places the doped layer adjacent to the sidewalls of the deep trench. A second preferred embodiment, suitable for non-isolated structures, places the doped layer adjacent to both the floor and the sidewalls of the trench.

Abstract: A semiconductor device comprises a dielectric substrate formed on a metal carrier, a semiconductor chip formed on the dielectric substrate and having a first electrode, a microstrip line formed on the dielectric substrate and having a second electrode to be connected to the first electrode, and wires, having different lengths, for connecting the first and second electrodes.

Abstract: The microwave hybrid integrated circuit comprises a dielectric board (1) provided with a topological metallization pattern (2) on its face side, a shield grounding metallization (3) on the back side thereof, a hole (4), and a metal base (5) having a projection (6). The hole (4) in the board (1) has a constriction (9) situated at a height of 1 to 300 .mu.m from the face surface of the board (1). The projection (6) is located in a wide section (10) of the hole (4). Bonding pads (8) of a chip (7) which are to be grounded are electrically connected to the projection (6) through the constricted portion (9) of the hole (4) which is filled with an electrically and heat conducting material (11). The wide section (10) of the hole (4) is from 0.2.times.0.2 mm to the size of the chip (7), and the distance between the side walls of the projection (6) and the side walls of the wide section (10) of the hole (4) is 0.001 to 1.0 mm.

Abstract: A microwave monolithic integrated circuit includes a coplanar waveguide (CPW) formed by a composite silicon structure constituted by a relatively high resistivity substrate, a first oxide layer on the upper surface thereof, a relatively thin silicon layer formed on the surface of the first oxide layer, and a very thin second oxide layer formed on the surface of the thin silicon layer. The silicon layer and the first oxide layer on which it is formed constitutes a silicon-on-insulator or SOI structure. A metallic signal line and ground planes are bonded to the surface of the second oxide layer. The zone of the thin silicon layer which extends between the ground planes is doped with an active impurity to produce high conductivity therein. As a result, the electric component of a quasi-TEM wave traversing the waveguide is substantially restricted to the thin silicon layer and does not penetrate to the underlying bulk silicon substrate.

Abstract: A Read diode includes an inner zone, a cathode zone, an anode zone and a first coupling zone disposed between the inner zone and the anode zone. A second coupling zone is disposed between the first coupling zone and the inner zone. Both coupling zones are used in the reverse mode for dividing an electric field into a high-field zone and a low-field zone and, consequently, permit greatly localized charge carrier generation by impact ionization in the voltage breakdown. The use of the two coupling zones ensures "punch-through" coupling between the high-field and low-field zones which, in contrast to the space charge coupling of Read diodes, permits a largely temperature-independent "soft-recovery" behavior. Hybrid diodes having optimized forward and commutation behaviors can be produced from the FCI-PT diodes. FCI-PT diodes are preferably employed in conjunction with switching power semiconductor components as voltage limiters or freewheeling diodes.

Abstract: A light-emitting-diode array includes a non-doped compound semiconductor layer between a substrate and a first compound semiconductor layer. A plurality of isolation regions extend from the first compound semiconductor layer to the surface of the non-doped compound semiconductor layer, and provide separation into isolated block regions each containing an equal number of diffusion regions. A plurality of shared electrode lines are connected to the diffusion regions in a plurality of the block regions, in such a relationship that diffusion regions selected from each of the block regions are connected to a common shared electrode. At least a surface portion of the substrate is formed of silicon. The density of the diffusion regions can be increased without increasing the number of the electrode pads. Moreover, the substrate is free from breakage or cracks.

Abstract: A monolithic circuit including an IMPATT with the IMPATT formed as a plurality of parallel vertical fingers or an array of vertical mesas having a common doped region to apread the area for heat dissipation through the substrate.

Abstract: Multiple quantum wells within an impact avalanche transit time device (IMPATT) utilizing a plurality of gallium arsenide/aluminum gallium arsenide heterojunctions are used to provide a high power, high frequency, high efficiency device operating at 50 GHz and up. The multiple quantum wells defined by the heterojunctions between pairs of gallium arsenide quantum wells and aluminum gallium arsenide barrier layers improves the nonlinearity of the avalanche process within the gallium arsenide quantum wells and reduces the ionization rate saturation limitations. Optical injection locking of the current through the IMPATT device is achieved by irradiating the active layer of the IMPATT device with modulated laser light.

Abstract: A silicon-based monolithic microwave integrated circuit architecture is described. This architecture, called MICROX.TM., is a combination of silicon material growth and wafer processing technologies. A wafer is fabricated using a substrate of high resistivity silicon material. An insulating layer is formed in the wafer below the surface area of active silicon, preferably using the SIMOX process. A monolithic circuit is fabricated on the wafer. A ground plane electrode is formed on the back of the wafer. Direct current and rf capacitive losses under microstrip interconnections and transistor source and drain electrodes are thereby minimized. Reduction in the resistivity of the substrate material as a result of CMOS processing can be minimized by maintaining a shielding layer over the bottom surface of the wafer. Microstrip and airbridge connectors, salicide processing and nitride side wall spacing can be used to further enhance device performance.

Abstract: High performance GaAs and AlGaAs-based devices and a process enabling the manufacture of new III-V compound technologies are disclosed. The GaAs devices are particularly useful as VLSICs by possessing a high degree of electrical insulation, both vertical and lateral, between closely packed active devices. Essentially, the GaAs devices include a substrate on which is formed, preferably by epitaxial growth or by ion implantation, an active GaAs, or AlGaAs region incorporating, by appropriate doping, the simultaneously therein formed active segments. The active segments are electrically shielded by providing insulating stratums in the active GaAs, AlGaAs region surrounding the active segments. Preferably, the insulating stratums are formed therein by implanting arsenic ions therein so as to form arsenic precipitates. Preferably, a passivated surface layer also is formed in part of the surface of the GaAs, AlGaAs active layer, also preferably by implanting arsenic ions therein.

Abstract: A semiconductor device consisting of epitaxial material is provided with at least one monoatomic layer of doping atoms, i.e. with a layer which is just one atom thick. A preferred device is a bipolar transistor in which case the Dirac-delta doped p-type layer 38 is directly between n-type collector and emitter layers (32, 33). The bipolar transistor described herein has an extremely low base width and is capable of operating at high frequencies.

Abstract: A semiconductor light wave detector which has a first layer of a highly doped n-type semiconducting substrate, a second layer of a highly doped n-type semiconducting material, a third layer of a distinct intrinsic semiconducting material and a fourth layer of a highly doped n-type semiconducting material similar to the second layer. First and second electrical connections are provided to the fourth layer and to at least one of the first and second layers. A plurality of pairs of Dirac-delta doped monoatomic layers are in the third layer, with the first monoatomic layer of each pair being a layer of donors and with the second monoatomic layer of each pair being acceptors spaced from the donor layer and positioned on the side thereof facing the fourth layer.

Abstract: A zener diode with a low reverse breakdown avalanche voltage and the use of zener diode in electrostatic discharge protection circuit is described herein. The low breakdown avalanche voltage is achieved by creating a zener diode with a lightly doped region between the P+ and N+ zones. Zener diode disclosed herein is particularly useful in protection circuits for integrated circuits having features or sizes of one micron or less.

Abstract: Improvement of a high frequency device having metal layers, active semiconductor layers and other semiconductor layers which make use of carrier avalanche or carrier injection induced by a reverse bias voltage for amplification or oscillation of high frequency waves. The active semiconductor layers are made of semiconductor diamond. High heat conductivity and high insulation breakdown voltage of diamond heighten the output power of oscillation or amplification.

Abstract: An optically bistable semiconductor device which has a doped or undoped gallium arsenide substrate and a series of alternating n-type and p-type Dirac-delta doped monoatomic layers formed on the substrate. Each Dirac-delta doped monoatomic layer is separated from the next adjacent Dirac-delta doped monoatomic layer by a layer of pure, undoped intrinsic semiconductor material such as gallium arsenide.