Abstract: In one form, an acoustic distance measuring circuit includes a frequency generator, a transmitter amplifier, an acoustic transducer, and a sensing circuit. The sensing circuit includes an input adapted to be coupled to the acoustic transducer, for receiving an input signal. The sensing circuit provides an in-phase portion and a quadrature portion of the input signal to a filter. The sensing circuit filters the in-phase portion and the quadrature portion and calculates a phase of the input signal in response to the filtered in-phase and quadrature portions. The sensing circuit determines a frequency slope of the input signal in response to calculating the phase and provides the frequency slope of the input signal to an output.

Abstract: An IQ mixer is used in a Pound-stabilized microwave source to detect amplitude modulation of the signal reflected from the reference resonator. By properly configuring the IQ mixer so that the LO and RF inputs are maintained in quadrature at the Q mixer, hence in-phase at the I mixer, lower levels of amplitude modulation may be detected at lower modulation frequencies compatible with optimal choices of resonator coupling and maximal phase to amplitude conversion.

Abstract: A method of calibrating a clock phase and a voltage offset includes receiving an input data signal that is periodically toggled. A clock phase calibration operation is performed based on an up signal and a down signal, such that phases of a plurality of clock signals are adjusted. The up signal and the down signal are generated based on the input data signal, a reference voltage and the plurality of clock signals. A voltage offset calibration operation is performed based on the up signal, the down signal and a first sample data signal, such that a voltage level of the reference voltage is adjusted. The first sample data signal is generated by sampling the input data signal based on one of the plurality of clock signals. The clock phase calibration operation and the voltage offset calibration operation are performed independently of each other and not to overlap with each other.

Abstract: A system includes a data path and a phase-locked loop (PLL) coupled to the data path. The system also includes a voltage-controlled oscillator (VCO) coupled to the PLL. The VCO includes an LC circuit with first and second differential output terminals. The VCO also includes a first resistor coupled between the first differential output terminal and drain terminals of a first pair of complementary metal-oxide semiconductor (CMOS) transistors. The VCO also includes a second resistor coupled between the second differential output terminal and drain terminals of a second pair of CMOS transistors.

Abstract: A digital demodulator for use with a Highway Addressable Remote Transducer (HART) modem is provided. Analog input signals are digitized according to a sampling clock rate to produce a discrete time signal. Filtering and edge detection allow determinations of “mark” or “space” data in a demodulated signal in conjunction with analyzing a detected signal period, a cycle period, count histories and/or an on/off signal period.

Abstract: An intelligent cable storage drum system for use in a pipe inspection system is disclosed. The system may include a cable storage drum, a video push-cable removably disposed on the cable storage drum, the video push-cable having a proximal end and a distal end, a video camera head having a camera output for providing analog or digital images or video output signals, and a transceiver module operatively coupled to the camera output for receiving the analog or digital images or video output signals and sending the received signals to a remote receiver.

Abstract: An optical receiver that demodulates an optical modulation signal into a baseband signal, which is an electrical signal, and decodes a received symbol acquired by converting the baseband signal. The optical receiver includes: an analog-to-digital converter that converts the baseband signal into a digital signal of which the number of samples per received symbol is M/N (samples/symbol), M and N being positive integers, M/N being not an integer, and “M>N” being satisfied; and an adaptive equalization processing unit that executes an equalization operation set in advance to output the received symbol on the basis of the digital signal of which the number of samples per received symbol is M/N (samples/symbol) and a predetermined tap coefficient digital signal equalization tap coefficients used for equalization of a signal, the coefficient being updated in any sampling period.

Abstract: In embodiments of the present invention improved capabilities are described for a system for process monitoring through data collection in an industrial drilling environment comprising a data collector communicatively coupled to a plurality of input channels, each input channel connected to a monitoring point from which data is collected, the collected data providing a plurality of process parameter values for the industrial drilling environment; a data storage structured to store collected data from the plurality of input channels; a data acquisition circuit structured to interpret the plurality of process parameter values from the collected data; and a data analysis circuit structured to analyze the plurality of process parameter values to detect a process condition associated with the industrial drilling environment, wherein an operational process for the industrial drilling environment is altered based on the analysis of the plurality of process parameter values.

Abstract: A receiver comprises an I/Q demodulator generates an angular signal by demodulating an in-phase branch and a quadrature branch of a received signal; a filter communicatively coupled to the I/Q demodulator and configured to generate a filtered angular signal by filtering out a noise signal having a frequency higher than a predetermined frequency value from the angular signal; an angle subtractor communicatively coupled to the filter and configured to generate a phase signal based on the filtered angular signal; a phase calibrator communicatively coupled to the angle subtractor and configured to generate a calibrated phase signal based on at least one received preamble signal corresponding to the phase signal and a known value of the at least one received preamble signal corresponding to the phase signal; and a symbol decider communicatively coupled to the phase calibrator and configured to generate an output symbol based on the calibrated phase signal.

Abstract: Systems and methods are provided for flux control of a qubit. A quantum system includes a microwave transmitter configured to provide a continuous microwave tone, and a qubit configured such that a portion of an energy spectrum of the qubit is responsive to an applied flux. The qubit also has an inductive element responsive to the continuous microwave tone to produce a Rabi oscillation within the qubit. A flux source is configured to apply a flux to the qubit.

Abstract: System and method for processing a signal sampled from an output of a digital-analog converter. The method comprises: (a) transforming the input signal from time domain to frequency domain to obtain a signal having a plurality of bins; (b) estimating properties of a largest amplitude bin, except for direct current (DC) bin, in the input signal; (c) performing signal reconstruction in time domain based on the estimated properties to generate a reconstructed signal; (d) subtracting the estimated signal from the input signal to get a residual signal; (e) repeating steps (a)-(d) till a predetermined number of bins have been processed; (f) adding all the reconstructed signals and the last residual signal together to generate a sum signal; and (g) transforming the sum signal from the time domain to the frequency domain.

Abstract: A method for correcting RDS demodulation in a vehicle radio system including a digital core with an RDS demodulation block, a numerically controlled oscillator, a digital mixer that mixes the input signals with the output of the numerically controlled oscillator, a low-pass filter for recovering baseband RDS signals including a sequence of symbols, and a phase-estimating block configured to estimate a phase deviation of the baseband signal. The method including a first correction acting, depending on the estimation of the phase deviation of the baseband signal, on a phase equalizer, downstream of the low-pass filter, in order to cancel out the phase deviation, and optionally a second correction forming a feedback loop and acting on the numerically controlled oscillator depending on the drift in the phase deviations of the baseband signal.

Abstract: A receiving device includes: a resampler to convert a sampling rate of a reception signal, and output a first signal that is a signal having been subjected to sampling rate conversion; an equalizer to perform an adaptive equalization process using the first signal as an input, and output a second signal that is a signal having been subjected to the adaptive equalization process and having a sampling rate that is an integer fraction of an input signal; a correlation calculator to calculate a correlation function between the first signal and the second signal; and a rate controller to control a rate conversion ratio for sampling rate conversion in the resampler on a basis of the correlation function.

Abstract: An apparatus for providing a clock signal based on a received clock signal includes a time-to-digital converter configured to generate timestamp information based on the received clock signal. The apparatus includes a first filter configured to generate clock period information based on the timestamp information. The apparatus includes a phase monitor circuit. The phase monitor circuit includes a second filter configured to provide a mean period signal of the received clock signal based on the clock period information. The phase monitor includes a phase error detection circuit configured to generate a phase error indicator based on a threshold difference value and a difference between the clock period information and expected clock period information. The expected clock period information is based on the mean period signal.

Abstract: An electronic circuit (51) configured to provide an adjustable impedance at a first frequency comprises a transconductance amplifier (52) arranged to provide a current signal proportional to an input signal at an input terminal; at least one conversion arrangement, each comprising a mixer arrangement (53) utilizing a first local oscillator signal at said frequency to down-convert the current signal to a baseband voltage signal; a filtering arrangement (54, 55) connected to said mixer arrangement (53) and comprising at least a resistor and a capacitor in parallel; and a mixer arrangement (56) utilizing a second local oscillator signal at said frequency to up-convert a voltage signal present at the filter arrangement to an up-converted voltage signal; and a transconductance amplifier (57) arranged to provide a second current signal proportional to the up-converted voltage signal and to feed back said second current signal to the input terminal of the electronic circuit.

Abstract: A phase-locked loop (PLL) filter of a read channel includes a filter portion having an input coupled to delay circuitry having an output. The input of the filter portion is configured to receive a phase error signal. A look-up table is coupled to the filter portion. The look-up table comprises phase coefficients and frequency coefficients associated with a plurality of phase error magnitudes. The look-up table is configured to provide one or both of a selected phase coefficient and a selected frequency coefficient based on a magnitude of the phase error signal. The PLL filter is configured to adjust a bandwidth of the filter portion using one or both of the selected phase coefficient and the selected frequency coefficient. A phase signal indicative of estimated phase disturbance is produced at the output of the delay circuitry.

Abstract: Noise parameters are used to characterize noise performance of linear devices, such as amplifiers. Such noise parameters have not been used for frequency conversion devices, such as mixers. Direct measurements of single-side-band noise figures are accurately represented by the measured noise parameters, which fully characterize the noise figure of the mixers for all harmonic impedance loading conditions. Each harmonic side band of frequencies contributing noise to the mixer output is associated with a set of noise parameters. A measurement method for extracting the noise parameters is described.

Abstract: A communication system, typically wireless and comprising at least one wireless (say) communication network node having a capacity for communicating with at least one additional wireless (say) communication network node at a given center frequency; and at least one external frequency converter, external to the node, operative to cause at least one wireless (say) communication network node, from outside said node, to communicate with at least one additional wireless (say) communication network node, at least on occasion, according to a given e.g. wireless communication protocol, at at least one converted center frequency which differs from the given center frequency, wherein a Channel Compensation Signal (CCS) is employed.

Abstract: A self-calibrating shared-component dual synthesizer includes, for example, two frequency synthesizers that are adapted to operate (respectively) in transmit (TX) and receive (RX) modes. Each synthesizer can be selectively arranged to vary and optimize the phase noise in accordance with the TX and RX requirements associated with each mode as well as independently optimized for flexible low area floorplan to achieve low power, spectral fidelity and reduced test time, low cost built in self-calibration. The two frequency synthesizers are also adapted to provide a built-in self-test signals used for intermodulation testing and calibration.

Abstract: An apparatus for detecting the end of a communication is disclosed. The apparatus includes an interface circuit for receiving an encoded signal and a carrier signal recovery circuit coupled to an output of the interface circuit. The carrier signal recovery circuit is configured to output a carrier signal of the encoded signal and a second signal that is out of phase with the carrier signal. The apparatus also includes a decoding circuit configured to decode the encoded signal as a function of both the encoded signal and the carrier signal output by the carrier signal recovery circuit. The apparatus also includes a detection circuit configured to detect an indication of an end of a communication in the encoded signal as a function of both the encoded signal and the second signal.

Abstract: A transmission device has an inverse fast Fourier transform converter (first circuit) that acquires plural multi-value symbol data each of which is assigned to a dedicated subcarrier, and generates waveform data on the basis of the acquired plural multi-value symbol data, and a digital frequency converter (second circuit) that shifts frequency of the waveform data generated by the inverse fast Fourier transform converter.

Abstract: A receiving device that converts, to a digital signal, a signal in which signal light from an optical transmission path and local oscillation light are mixed, so as to perform digital signal processing, the optical communication receiving device comprising: a frequency offset compensation unit configured to calculate a frequency offset of the digital signal and to, based on the frequency offset, compensate for a phase of the digital signal; a carrier phase recovery unit configured to calculate a carrier phase of the digital signal whose phase is compensated for in the frequency offset compensation unit; and a residual frequency offset detection unit configured to calculate an average of differences in the carrier phase, and to output the average as a residual frequency offset, wherein the frequency offset compensation unit is configured to correct the frequency offset using the residual frequency offset output by the residual frequency offset detection unit.

Abstract: A communication system includes a transmission device that transmits a signal, based on a plurality of symbol coordinates on a constellation, which characterize a shape having a predetermined rotational asymmetrical shape, and a receiving device that accumulates symbol coordinates on the constellation in the signal received from the transmission device and estimates the phase of the signal received from the transmission device, based on a difference between the direction of a shape characterized by the accumulated symbol coordinates and the direction of the predetermined shape.

Abstract: An RF reception system and method uses IF quadrature mixing, in which there is further mixing and channel filtering in the digital domain, to isolate a frequency of interest. A coefficient estimator is used for generating a phase correction coefficient and an amplitude correction coefficient from filtered in-phase and quadrature desired signals and from filtered in-phase and quadrature image signals.

Abstract: Frequency comparison means compares the levels of uplink (UL) and downlink (DL) frequencies which are designated by frequency designation means. When it is determined that the UL frequency is lower than the DL frequency, heterodyne switching means enables a receiving unit to perform frequency conversion using a lower-side heterodyne system and signal processing is performed, using one baseband signal and the other baseband signal obtained by a quadrature demodulation process as an in-phase component and a quadrature component, respectively. When it is determined that the UL frequency is higher than the DL frequency, the heterodyne switching means enables the receiving unit to perform the frequency conversion using an upper-side heterodyne system and signal processing is performed, using the one baseband signal and the other baseband signal obtained by the quadrature demodulation process as the quadrature component and the in-phase component, respectively.

Abstract: An apparatus for detecting the end of a communication is disclosed. The apparatus includes an interface circuit for receiving an encoded signal and a carrier signal recovery circuit coupled to an output of the interface circuit. The carrier signal recovery circuit is configured to output a carrier signal of the encoded signal and a second signal that is out of phase with the carrier signal. The apparatus also includes a decoding circuit configured to decode the encoded signal as a function of both the encoded signal and the carrier signal output by the carrier signal recovery circuit. The apparatus also includes a detection circuit configured to detect an indication of an end of a communication in the encoded signal as a function of both the encoded signal and the second signal.

Abstract: In a representative embodiment, a disclosed receiver of an optical multicarrier offset-quadrature-amplitude-modulated (MC-OQAM) signal is configured to track and compensate for the phase error in the local-oscillator (LO) signal with respect to a carrier wave of a modulated subcarrier of the optical MC-OQAM signal by tracking a minimum of a cost function that is sensitive to crosstalk between in-phase and quadrature components of the modulated subcarrier and/or crosstalk between the modulated subcarrier and at least one other modulated subcarrier of the optical MC-OQAM signal. The receiver can operate based on pure feed-forward processing and compensate the phase error in real time and without relying on pilot symbols or a PLL circuit coupled to the LO source.

Abstract: The present invention provides a technology for remote control of a power supply and construction of a power line communication infrastructure. The data transmission principle is based on an idea in which only a boosting part is configured in an electronic type using a 1 V boosting principle in a process of obtaining secondary 100 V and a data power supply and a power line supply are matched to utilize as on/off digital data. A power line coil at the side of a transformer and a coil at the side of a consumer home form a pair, allowing the coil at the side of the consumer home to receive the flux change of data at the side of the transformer and allowing the coil at the side of the transformer to receive the flux change of data at the side of the consumer home to implement a two-way communication.

Abstract: Satellite communication systems utilize spreading by repetition techniques, including block repetition, to enable operation at low signal to noise conditions. A carrier frequency offset between a transmitter and a receiver results in phase offsets between repetitions. Thus, combining the repetitions requires estimation of the phase offset between the repetitions before coherent de-spreading can be performed. Disclosed herein are methods for estimating a phase offset between successive block repetitions. The methods may utilize more than two repetitions for determining a common phase offset between any two successive repetitions. In some embodiments, these methods may allow summation of repetitions with better coherency and/or with a lower de-spreading loss.

Abstract: Methods and apparatus are provided for receiving a first signal and generating an output signal indicative of radio data system (“RDS”) information. A receiver circuit of the invention can include mixer circuitry, lowpass filter circuitry, downsampler circuitry, and decoder circuitry. Advantageously, the receiver circuit can operate entirely within the digital domain, promoting interoperability with digital frequency modulation (“FM”) demodulator circuitry.

Abstract: A complex intermediate frequency mixer (IFM) for frequency translating a received complex intermediate frequency, IF, signal, wherein the received complex IF signal comprises at least two frequency bands located at upper-side and lower-side of 0 Hz, is provided. The complex intermediate frequency mixer comprises a first, second, third and fourth mixer (M1, M2, M3, M4). The complex intermediate frequency mixer further comprises a first, second, third and fourth gain adjusting component (?1, ?2, ?2, ?1), connected to a first, second, third and fourth mixer output (M1-out, M2-out, M3-out, M4-out), respectively. Moreover, a first summing unit (S1), connected to a first gain output (?1-out), a fourth gain output (?1-out) and a third mixer output (M3-out) negated, and second summing unit (S2), connected to the second gain output (?2-out), the third gain output (?2-out) and the fourth mixer output (M4-out), are configured to output a first baseband complex signal of the received complex IF signal.

Abstract: A method and system is provided for communicating distinct data over a single frequency using on-off keying, a form of amplitude modulation, or phase changes timed to the zero crossing point of the carrier. A data signal is synchronized with the carrier by adding padding bits so that the number of bits is equal to the frequency of the carrier. The carrier is then modified by attenuating the carrier as needed once per cycle. Said carrier is then transmitted. The resulting transmitted carrier carries a number of bits equal to the transmit frequency. At the receive end, the received signal is compared to a sine wave to determine if the incoming signal is at full strength or at reduced strength, allowing for the detection of encoded digital information. In a another embodiment, the phase of the carrier is changed instead of attenuating the carrier, timed to the carrier cycles, once or twice per cycle.

Abstract: A phase-shift keying (PSK) demodulator and a smart card including the same are disclosed. The PSK demodulator includes a delay circuit and a sampling circuit. The delay circuit generates a plurality of clock signals by delaying the input signal. The sampling circuit samples the input signal in response to the clock signals, and generates output data.

Abstract: The teachings presented herein allow the same sequence of local oscillator waveform sample values to be used for driving two harmonic rejection mixers for which quadrature operation is desired, irrespective of whether the oversampling rate of the sequence is divisible by four or only divisible by two. This ability is obtained by controlling whether the quadrature mixer clocks coincidentally with the in-phase mixer, or clocks a half clock cycle out of phase relative to the in-phase mixer. Several advantages attend the contemplated circuit arrangement and method of operation. Example advantages include the improved matching that comes from operating both mixers with the identical waveform sample values, and the improved flexibility in optimizing the harmonic rejection and/or interference-related operation of the mixers over a broader range of frequencies of interest, which flows from having a larger set of usable OSRs.

Abstract: A non-coherent detection apparatus includes, inter alia, a correlation unit, a frequency offset estimator, and a signal detector. The correlation unit obtains a differential phase signal by multiplying a complex conjugate value of a delay signal obtained by delaying a received signal by (N+1) chips by the received signal, sums-up resultant values obtained by multiplying each component of the differential phase signal by each component of a correlation sequence and outputs a correlation signal. The frequency offset estimator estimates a frequency offset based on a value obtained by accumulatively summing-up the correlation signals corresponding to preamble portions of the received signal. The signal detector detects an original signal from the received signal based on a size of a real-number part of a resultant value obtained by multiplying the frequency offset estimated by the frequency offset estimator by the correlation signal corresponding to a PHY payload portion of the received signal.

Abstract: A method (500) of demodulation, the method comprising the steps of receiving (510) a radio frequency signal, converting (520) the received radio frequency signal to a baseband signal, performing (530) symbol timing recovery on the baseband signal, and demodulating (540) the baseband signal. The baseband signal comprises alternating symbols spaced therebetween at an alternating first interval length and a second interval length, where the first interval length and second interval length are dissimilar. Communication units and a method of modulation are also described.

Abstract: An acquisition scheme is provided for receiving a Bluetooth basic data rate (BDR) or enhanced data rate (EDR) packet. An acquisition apparatus for a Bluetooth receiver includes: a phase differentiator; a plurality of basic building blocks; a plurality of 1-bit switches; and a correlation computation equation. It features an acquisition circuit implementation with 1-bit correlator hardware shared by access code and EDR synchronization sequence correlation computations.

Abstract: In a receiver circuit, an analog signal processor frequency-converts an input high frequency signal into a baseband signal, and performs low pass filtering at a cutoff frequency below a desired-wave band. An ADC converts an output of the analog signal processor into a digital signal. A digital signal processor compensates an output of the ADC for a signal component in the desired-wave band which has been attenuated by the filtering operation of the analog signal processor.

Abstract: A multi-carrier linear equalization receiver, e.g., a RAKE receiver or chip equalization receiver, is described herein. The multi-carrier receiver distributes processing delays among a plurality of received carriers based on a comparison between the signal-to-interference ratios (SIRs) determined for each carrier. The receiver initially allocates a minimum number of processing delays to each carrier. In one embodiment, any remaining additional processing delays are distributed evenly between the carriers when a comparison between the largest and smallest SIR is less than or equal to a threshold. In another embodiment, the remaining additional processing delays are distributed to favor the carrier(s) with the strongest SIR(s) when the comparison between the largest and smallest SIR exceeds the threshold.

Abstract: A combination equalizer and automatic gain control (AGC) is provided for high-speed receivers. The combination circuit comprises a first AGC having an input to accept a communication signal and an input to accept a first control signal. The first AGC modifies the communication signal gain in response to the first control signal, to supply a first stage signal at an output. An equalizer has an input to accept the first stage signal and an input to accept a second control signal. The equalizer modifies the frequency characteristics of the first stage signal in response to the second control signal, to supply an equalized signal at an output. A second AGC has an input to accept the equalized signal and an input to accept a third control signal. The second AGC modifies the equalized signal gain in response to the third control signal, to supply a second stage signal at an output.

Abstract: In one embodiment, a circuit provides two quadrature components, I and Q, from a received modulated signal, from three mutually phase-shifted components of the received signal. The circuit can demodulate three mutually phase-shifted components of a baseband signal, in order to provide two quadrature demodulation components. The circuit includes three circuit inputs, each designed to received said three components, respectively. The circuit further includes a first and second adder circuit. The circuit also includes a bank of weighting circuits linked, at input, to the three circuit inputs and linked, at output, to the inputs of the first and second adder circuits so as to transmit to each adder input, with a determined weighting, a particular one of said three components, the weightings being chosen so that the first and second adder circuits provide said two quadrature demodulation components.

Abstract: A multilevel QAM demodulator includes a phase difference calculation unit calculating a phase difference signal based on the common phase signal and orthogonal signal after the phase rotation compensation, a phase shift amount calculation unit calculating a phase shift amount indicating a degree of a phase shift based on the common phase signal and orthogonal signal after the phase rotation compensation and phase noise compensation, and a correction unit correcting the phase difference signal based on the phase shift amount. A phase rotation is performed for the phase noise compensation based on the phase difference signal corrected by the correction unit.

Abstract: A quadrature demodulation circuit includes: first to fourth mixers to receive a modulation signal; a phase shifter to supply to the first and third mixers a first local frequency signal, to supply to the second mixer a second local frequency signal having a designated phase difference relative to the first local frequency signal, and to supply to the fourth mixer a third local frequency signal that is an inverse in phase to the second local frequency signal; a first adder to add a signal output from the first mixer and a signal output from the second mixer and to output a first demodulation signal; and a second adder to add a signal output from the third mixer and a signal output from the fourth mixer and to output a second demodulation signal.

Abstract: A 4-phase filter includes four filter units including resistors and capacitors which inputs input signals, and provides the input signal via a switch buffer to a secondary capacitor provided in parallel to a primary capacitance of each filter unit, thus enabling a shift of an operational frequency band according to whether or not the switch buffer is in an output-high-impedance state.

Abstract: Quadrature signal demodulator circuitry for demodulating multiple related input signals into respective pairs of quadrature signals for selective combining to provide a composite pair of quadrature signals with a maximized signal-to-noise ratio (SNR).

Abstract: Disclosed herein are systems and methods for accurate removal of I/Q mismatch in received signals of an analog FM receiver. The analog FM receiver includes a down-converter, a calibration circuit that estimates I/Q mismatch values, and a compensation circuit that uses the estimated mismatch values to reduce the effects of I/Q mismatch. In one aspect, the calibration circuit uses an adaptive dual-parameter compensation scheme to iteratively correct the received signals by approximating a coefficient value and an amplitude value that minimize the signals' amplitude variation from the amplitude value. In another aspect, phase and amplitude mismatch parameters can be determined using the coefficient value.

Abstract: There are provided a direct sampling type wireless receiver and a method using the same that reduce nonlinearity and DC offset by using a multi-port network and a carrier frequency direct conversion method with a low sampling rate of a direct sampling method in a wireless communication receiver.

Abstract: Frequency demodulation of a signal is disclosed. A first edge event and a second edge event are detected in a signal. The second edge event is an edge event subsequent in time to the first edge event. A data bit based at least in part on a timing interval between the first edge event and the second edge event is determined.

Abstract: A quadrature demodulation circuit includes: first to fourth mixers to receive a modulation signal; a phase shifter to supply to the first and third mixers a first local frequency signal, to supply to the second mixer a second local frequency signal having a designated phase difference relative to the first local frequency signal, and to supply to the fourth mixer a third local frequency signal that is an inverse in phase to the second local frequency signal; a first adder to add a signal output from the first mixer and a signal output from the second mixer and to output a first demodulation signal; and a second adder to add a signal output from the third mixer and a signal output from the fourth mixer and to output a second demodulation signal.

Abstract: Some embodiments discussed relate to an apparatus and method for processing signals, comprising receiving an input signal and forming a stream of digital samples of the input signal by sampling at a sampling frequency and mixing the stream of digital samples using a mixer sequence having a sine sequence and a cosine sequence based on the sampling frequency to generate an input sequence, each of the sine sequence and the cosine sequence including a plurality of components in an arrangement such that at least one of the components has a zero value and the remaining components has a non-zero value, and filtering the input sequence using a plurality of polyphase filter parts, each corresponding to the non-zero components of the sine sequence and the cosine sequence, and selectively combining the outputs of the polyphase filter parts to generate an in-phase sequence and a quadrature sequence.