Bias Patents (Class 365/27)
  • Patent number: 8064239
    Abstract: Data is stored in a quantum-well type structure with double gate control. According to an example embodiment, a transistor-based data storage circuit includes a gate, a back gate and a semiconductor channel between the gate and the back gate. Carriers are stored in a storage pocket structure in the channel, in response to biases applied to the gate and back gate. Current passing through the channel is sensed and used to detect the stored carriers and, correspondingly, a memory state of the storage circuit.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: November 22, 2011
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Mehmet Günhan Ertosun, Krishna Chandra Saraswat, Pawan Kapur
  • Patent number: 8060771
    Abstract: Circuits and methods to provide a digital clock signal, which can be instantly halted without glitches and then resumes under control of an asynchronous suspend signal with whole width clock pulses has been achieved. The circuit suspends the clock output in either a high or a low state, instantaneously with the suspend signal. There is no restriction on either the suspend pulse width or position in relation to the input clock. The asynchronous logic implementation is using standard cell logic gates. The circuit functionality is not dependent on the manufacturing technology, i.e. CMOS, bipolar, BI-CMOS, GaAs, etc. implementations are all valid.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: November 15, 2011
    Assignee: Dialog Semiconductor GmbH
    Inventor: Julian Tyrrell
  • Patent number: 7804701
    Abstract: An array of memory cells is arranged in a plurality of columns and rows, each of the memory cells including a programmable fuse connected to a predetermined bit line and in series with a select transistor. The select transistor has a first current electrode connected to a reference voltage terminal, a control electrode connected to a predetermined word line, and a second current electrode connected to the programmable fuse. The select transistor further has a semiconductor body adjacent to which the first current electrode and the second current electrode are located. These electrodes are separated by a channel. A signal terminal that is connected to the semiconductor body receives an input signal to forward bias the channel to the first current electrode during programming of the programmable fuse to increase a programming current of the programmable fuse.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: September 28, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Alexander Hoefler
  • Patent number: 7480185
    Abstract: A split NROM flash memory cell is comprised of source/drain regions in a substrate. The split nitride charge storage regions are insulated from the substrate by a first layer of oxide material and from a control gate by a second layer of oxide material. The nitride storage regions are isolated from each other by a depression in the control gate. In a vertical embodiment, the split nitride storage regions are separated by an oxide pillar. The cell is programmed by creating a positive charge on the nitride storage regions and biasing the drain region while grounding the source region. This creates a virtual source/drain region near the drain region such that the hot electrons are accelerated in the narrow pinched off region. The electrons become ballistic and are directly injected onto the nitride storage region that is adjacent to the pinched off channel region.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: January 20, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Leonard Forbes
  • Patent number: 5842170
    Abstract: A method and system for editing messages within a recording system includes a handheld recorder having flash memory and a plurality of memory address pointers for storing messages. The flash memory has a plurality of sequential memory blocks, each memory block has a plurality of memory locations, and the messages are stored as message segments. The plurality of memory address pointers stores an ordered sequence of addresses of said message segments within the flash memory. Upon an edit point being selected within a message at which the message is to be edited, the edit point corresponding to a first location within the message defining an end point of a first message segment, an edited message comprising a second message segment is generated.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: November 24, 1998
    Assignee: Norris Communications Corp.
    Inventors: Norbert P. Daberko, Richard K. Davis, Richard D. Bridgewater
  • Patent number: 5798959
    Abstract: Switching distortion in a digitally controlled attenuator is effectively suppressed and soft-switching in passgate arrays, present at a certain point of a logic signal path, is implemented with a minimum number of additional components. The soft switching in passgate arrays is implemented by driving the control nodes of each passgate by an inverter, at least a current terminal of which is made switchable from the respective supply node to a node onto which an appropriate ramp signal toward the potential of the respective supply potential is produced by a suitable controlled ramp generator. The passgates for switching the current terminals of the inverters are controlled by the logic signal that preexisted the intervening switching on the respective signal line of the passgate, and by its inverse. The preexistent logic value is momentarily stored in a latch that is updated at the end of any new switching process.
    Type: Grant
    Filed: July 15, 1996
    Date of Patent: August 25, 1998
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Andrea Mario Onetti, Sylvia Procurato
  • Patent number: 5742737
    Abstract: A solid state digital hand held recording device having a multifunctional switch assembly. A printed circuit board including a microcontroller electrically coupled to switch terminals operates to control the processing of sound into electrical signals and store said signals on a digital recording medium. The switch assembly actuates electrical signals coupled to said microcontroller thereby activating a sequence of actions (a program) stored within read-only memory device. A plurality of programs can be activated to instantaneously begin recording a message, verify the integrity of the recording medium, and index a message being recorded for rapid recall.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: April 21, 1998
    Assignee: Norris Communications Corporation
    Inventors: Norbert P. Daberko, Richard K. Davis, Richard D. Bridgewater
  • Patent number: 5142491
    Abstract: Disclosed is an improved magnetic bubble recording device for optically effecting writing, reading and erasure of information with respect to magnetic bubbles. The magnetic bubble recording device has a basic structure in which a first magnetic film for forming a magnetic bubble therein and a second magnetic film for imparting a bias magnetic field to the first magnetic film to stably hold the maganetic bubble in the first magnetic film are provided on a substrate on which is formed a transfer pattern for transferring a magnetic bubble along the transfer pattern, thereby providing a portable magnetic bubble recording device at low cost and with a simple structure. In addition, an alignment pattern for aligning the device with a light beam applied to the device is formed on the device, thereby permitting accurate writing and reading. The peripheral edge portion of the pattern of a transfer channel has a surface inclined with respect to the substrate surface so as to transfer the magnetic bubble favorably.
    Type: Grant
    Filed: November 27, 1991
    Date of Patent: August 25, 1992
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yoichi Osato
  • Patent number: 5140547
    Abstract: A magnetic bubble recording element including a substrate having a transfer channel, a first magnetic layer for carrying a magnetic bubble and being formed on the substrate within and outside of the transfer channel with a surface of the first magnetic layer within the transfer channel being offset from at least a portion of a surface of the first magnetic layer outside of the transfer channel, and a second magnetic layer for applying a bias magnetic field to the first magnetic layer being formed on the first magnetic layer within and outside of the transfer channel. The magnetic bubble contained in the first magnetic layer being transferred along the transfer channel by an external magnetic field.
    Type: Grant
    Filed: July 10, 1991
    Date of Patent: August 18, 1992
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoichi Osato, Shinichi Tachibana
  • Patent number: 4926377
    Abstract: In a magnetic memory device for use in selectively carrying out a write-in operation and a readout operation of a pair of vertical Bloch lines as an information carrier in a domain wall of a stripe domain extended along a longitudinal direction, a deflected in-plane magnetic field is applied to an end portion of the stripe domain and deflected relative to the longitudinal direction at an angle within an angle range by the use of a pair of magnetic units. The deflected in-plane magnetic field serves to stably hold a single Bloch line to a predetermined flank wall of the stripe domain during the write-in operation or to stably separate three Bloch lines from one another during the readout operation. Such application of the deflected in-plane magnetic field also serves to smoothly propagate each Bloch line.
    Type: Grant
    Filed: August 11, 1989
    Date of Patent: May 15, 1990
    Assignee: NEC Corporation
    Inventor: Yasuharu Hidaka
  • Patent number: 4692898
    Abstract: A bias magnet for a bubble memory device is comprised of a single material low permeability magnet contoured to enhance the magnetic field in the central area of the magnet and is adapted to be slightly larger than the bubble memory chip and in thermal contact therewith, the entire bubble memory chip and bias magnet structure to be surrounded by the rotating magnetic field drive coil structure.
    Type: Grant
    Filed: November 6, 1980
    Date of Patent: September 8, 1987
    Assignee: Control Data Corp.
    Inventors: Gale A. Jallen, Gene P. Bonnie
  • Patent number: 4613955
    Abstract: Wide temperature range magnetic bubble memories are realized by using new compositions of rare earth garnets which require nonlinear bias field for operation over a given temperature range. The bias field structure for providing the corresponding nonlinear bias field includes plates of barium ferrite plus additional plates of Ni-Cu alloys and/or polycrystalline dysprosium (or other rare earths, singly or in combination) iron garnet to provide a nonlinear bias field versus temperature characteristic to match that of the bubble layer.
    Type: Grant
    Filed: September 23, 1983
    Date of Patent: September 23, 1986
    Assignee: AT&T Bell Laboratories
    Inventors: Richard C. Sherwood, William J. Tabor, Eva M. Vogel, Robert Zappulla
  • Patent number: 4567576
    Abstract: The invention provides a method for producing a magnetic bias field in a magnetic bubble domain memory device. The method comprises coupling a magnetic bubble domain element with a permanent magnet. The permanent magnet is formed of a rare earth metal-containing alloy for use in the bubble domain memory device in respect of the reversible temperature coefficient of the magnet capable of being in compliance with the temperature coefficient of the bubble disappearance field of the memory device. The alloy characteristically contains nickel as an essential component so that the composition of the alloy is expressed by the formulaR(Co.sub.1-x-y Cu.sub.x Ni.sub.y).sub.z,in which R is a rare earth element, e.g. samarium or cerium, and s, y and z are each a positive number from 0.001 to 0.4, from 0.001 to 0.6 and from 4.0 to 9.0, respectively, with the proviso that x+y is smaller than 1.
    Type: Grant
    Filed: February 14, 1984
    Date of Patent: January 28, 1986
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Yoshio Tawara, Ken Ohashi, Hideaki Kikuchi
  • Patent number: 4530072
    Abstract: In a bubble memory package, a contoured, shaped magnet and filler plate combination is provided to shape the magnetic field in a uniform fashion to prevent the loss of magnetic flux density which normally tends to occur in the center of the magnet area of a planar, uniformly thick magnet.
    Type: Grant
    Filed: December 10, 1979
    Date of Patent: July 16, 1985
    Assignee: Control Data Corporation
    Inventor: Gale A. Jallen
  • Patent number: 4377854
    Abstract: In a field-accessed magnetic domain device package assembly, the magnetic domain device carrier or support, the circuit line or conductor carrier, and the magnetic bias field source are integrally and coactively provided by a common substrate member. The member is a planar permanent magnetic insulator ceramic and carries a bonded conductor or wiring pattern. The input/output (I/O) terminals of the domain device, also referred to in the art as a chip, are selectively bonded to the conductors of the pattern thereby providing mechanical support of the chip directly to the substrate in a superimposed relationship, input/output electrical connection to the chip, and mounting of the chip in close proximity to the bias field source, the flux of which passes through the superimposed mounted chips to a high permeability member at least part of which is disposed on the opposite side of the chip.
    Type: Grant
    Filed: July 18, 1980
    Date of Patent: March 22, 1983
    Assignee: International Business Machines Corporation
    Inventors: Roland J. Braun, Gary R. Carden, Keith A. Snyder
  • Patent number: 4322818
    Abstract: A magnetic bubble memory chip is arranged in such a way that the major surface of the chip will not cross perpendicularly with the external bias magnetic field to generate a component of the bias magnetic field which is parallel to the major surface. This component is added to the rotating magnetic field within the chip major surface and the intensity of a resultant rotating magnetic field is shifted to the start/stop direction of this rotating magnetic field. Of the basic elements incorporated in the chip, the basic elements which operate stably in a comparatively intense rotating field is operated in synchronism with the phase of the start/stop direction of the rotating magnetic field in order to ensure stable operation of all the basic elements under the decreased intensity of the external rotating magnetic field.
    Type: Grant
    Filed: July 12, 1979
    Date of Patent: March 30, 1982
    Assignee: Hitachi, Ltd.
    Inventors: Minoru Hiroshima, Hirofumi Ohta
  • Patent number: 4207613
    Abstract: A ferrite material has been found that is useful for a biasing magnet whose magnetic field stabilizes single wall magnetic domains. The strong temperature dependence of the ferrite's magnetic field makes the ferrite especially useful when used with magnetic materials which require a highly temperature dependent magnetic field to maintain a constant domain or bubble size. The ferrite composition is represented by the formula NiFe.sub.(1+x) Cr.sub.(1-x) O.sub.4, x is in the range between 0.04 and 0.18, and 1 percent to 10 percent, by weight, additional material selected from the group consisting of zirconium oxide, thorium oxide and hafnium oxide.
    Type: Grant
    Filed: December 15, 1975
    Date of Patent: June 10, 1980
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Ernst M. Gyorgy, Frank J. Schnettler
  • Patent number: 4198692
    Abstract: There is provided a self-biased structure which permits magnetic bubble domain device operation. The invention consists of three layers of material with a bias layer sandwiched between two bubble layers.
    Type: Grant
    Filed: September 22, 1978
    Date of Patent: April 15, 1980
    Assignee: Rockwell International Corporation
    Inventor: Tsutomu Kobayashi
  • Patent number: 4164028
    Abstract: A current access bubble memory system includes a method and device for propagating and switching isolated bubbles within a plurality of orthogonal propagation channels. The device includes two orthogonal arrays of parallel current conductors oriented at 45.degree. angles to the two orthogonal bubble translation axes. The conductors in each array are regularly spaced a distance S apart from center to center. The first array of conductors are connected in parallel to a first current source and the second array of conductors are connected in parallel to a second current source. The propagation channels are defined by confining means to have a width d where d is the bubble diameter. The centerline of the channels are spaced a distance of about .sqroot.2 S/8 from the center of adjacent conductor intersections. Bubble translation occurs through sequential activation of the two bipolar current sources.
    Type: Grant
    Filed: June 9, 1977
    Date of Patent: August 7, 1979
    Assignee: International Business Machines Corporation
    Inventor: Otto Voegeli
  • Patent number: 4091362
    Abstract: A single, compact bias structure to efficiently package a plurality of magnetic bubble domain device chips having different bias requirements. The vertical magnetic field distribution within the bias structure air gap is selectively controlled by a magnetically soft field adjusting assembly suitably attached within the bias structure. The size and configuration of the field adjusting assembly tailors local field variations within the air gap to correspond with the bias requirements of the bubble domain chips disposed therein.
    Type: Grant
    Filed: October 27, 1976
    Date of Patent: May 23, 1978
    Assignee: Rockwell International Corporation
    Inventor: Thomas T. Chen
  • Patent number: 4068219
    Abstract: An improved bias field assembly for reducing power losses in a magnetic domain memory device. A preferred embodiment employs rectangular permanent magnets positioned above and below a drive coil/substrates assembly. Ferrite shields of the same general size as the permanent magnets are interposed between the magnets and the drive coil/substrates assembly. These shields provide a highly resistive, relatively impermeable path for induced eddy currents and flux to reduce the effective resistance of the drive coil during high frequency operation and to minimize hysteresis losses.
    Type: Grant
    Filed: February 18, 1975
    Date of Patent: January 10, 1978
    Assignee: Honeywell Information Systems, Inc.
    Inventor: Ling George Chow
  • Patent number: 4062002
    Abstract: A device adapted for biasing bubble domains in a low externally applied magnetic bias field. This device is suitable for use when isolated bubbles or a column of bubbles are translated to or from a bubble lattice. The device has a pair of parallel channels, each containing a stripe domain therein. Positioned between the pair of channels is a channel for the translation of isolated bubbles. Positioned in juxtaposition with the bubble containing channel and the pair of stripe containing channels are a pair of parallel conductors. The passage of current through one conductor in one direction and a current through the other conductor in the opposite direction together with the presence of the stripe domains in the two channels provide a biasing field around the channel containing the bubbles which permits the isolated bubble operating margin to overlap the lattice operating margin.
    Type: Grant
    Filed: November 1, 1976
    Date of Patent: December 6, 1977
    Assignee: International Business Machines Corporation
    Inventors: David Malcolm Hannon, Hung Liang Hu
  • Patent number: 4058800
    Abstract: A photomagnetic image pickup element and system, the element comprising a thin film of magnetic material capable of having magnetic bubbles formed therein where the intensity of the magnetic-bubble collapse field varies with temperature; a first conductor pattern disposed on one side of the thin film; and a second conductor patterndisposed either on the one side or on the other side of the thin film, the first and second conductor patterns being so disposed with respect to one another as to form a lattice shape on the thin film.
    Type: Grant
    Filed: December 3, 1975
    Date of Patent: November 15, 1977
    Assignee: Fuji Xerox Co. Ltd.
    Inventor: Yoshiki Kikuchi