Having Integral Power Source (e.g., Battery, Etc.) Patents (Class 438/19)
  • Patent number: 11152611
    Abstract: A anode for use in a lithium ion battery is composed of an electrode substrate, a paste distributed on the electrode substrate and comprising a plurality of Si, Ge, or SiGe nanocrystals intercalated with lithium ions, and a binder mixed with the paste to adhere the paste to the electrode substrate. The lithiated anode paste may be formed by an electrodeposition process or an electrolytic process.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: October 19, 2021
    Assignee: MSMH, LLC
    Inventor: Michael Allen Haag
  • Patent number: 10439217
    Abstract: A prelithiated anode for use in a lithium ion battery is composed of an electrode substrate, a paste distributed on the electrode substrate and comprising a plurality of Si, Ge, or SiGe nanocrystals intercalated with lithium ions, and a binder mixed with the paste to adhere the paste to the electrode substrate. The lithiated anode paste may be formed by an electrodeposition process or an electrolytic process.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: October 8, 2019
    Assignee: MSMH, LLC
    Inventor: Michael Allen Haag
  • Patent number: 9941435
    Abstract: A photovoltaic module is disclosed. The photovoltaic module has a first side directed toward the sun during normal operation and a second, lower side. The photovoltaic module comprises a perimeter frame and a photovoltaic laminate at least partially enclosed by and supported by the perimeter frame.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: April 10, 2018
    Assignee: SunPower Corporation
    Inventors: Gabriela E. Bunea, Sung Dug Kim, David F. J. Kavulak
  • Patent number: 9431555
    Abstract: A solar cell is provided with: an n-type region formed over a substrate; a p-type region formed over the substrate and the n-type region; and mark sets for judging positional deviation between the n-type region and the p-type region. The mark sets respectively include first marks, and second marks, which are formed within the first marks.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: August 30, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Sumito Shimizu, Tomohiro Saitou
  • Patent number: 9040318
    Abstract: There is disclosed a modular lamination approach for processing organic photosensitive devices that allows the individual processing of device components, that once processed are brought together in a final step to make electrical contact. The disclosed method of preparing a laminated photosensitive device having at least one donor-acceptor heterojunction comprises: preparing a top electrode by depositing a functional material on a flexible substrate, such as an elastomer; optionally processing the functional material to obtain desired properties prior to lamination; preparing a bottom portion by depositing a second functional material over a substrate; optionally processing the second functional material to obtain desired properties prior to lamination; and coupling the top electrode to said bottom portion to form a laminated photosensitive device.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: May 26, 2015
    Assignee: The Trustees of Princeton University
    Inventors: Yueh-Lin Loo, Jong Bok Kim
  • Publication number: 20150111320
    Abstract: A device having a plurality of thin film photovoltaic cells (PV) formed over a passivation layer. The device comprises a plurality of thin film photovoltaic (PV) cells formed over the passivation layer, each PV cell includes at least a lower conducting layer (LCL) and an upper conducting layer (UCL); and a conducting path connecting at least a UCL of a first PV cell to at least a LCL of a second PV cell, wherein at least a first array of PV cells comprised of at least a first portion of the plurality of PV cells is connected by the respective UCL and LCL of each PV cell to provide a first voltage output. In an embodiment the passivation layer is formed over a target integrated circuit (TIC), the TIC having a top surface and a bottom surface.
    Type: Application
    Filed: December 23, 2014
    Publication date: April 23, 2015
    Applicant: Sol Chip, Ltd.
    Inventors: Shani KEYSAR, Reuven HOLZER, Ofer NAVON, Ram FRIEDLANDER
  • Patent number: 9013021
    Abstract: Optical absorbers, solar cells comprising the absorbers, and methods for making the absorbers are disclosed. The optical absorber comprises a semiconductor layer having a bandgap of between about 1.0 eV and about 1.6 eV disposed on a substrate, wherein the semiconductor comprises two or more earth abundant elements. The bandgap of the optical absorber is graded through the thickness of the layer by partial substitution of at least one grading element from the same group in the periodic table as the at least one of the two or more earth abundant elements.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: April 21, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Jeroen Van Duren, Haifan Liang
  • Patent number: 9012264
    Abstract: An integrated circuit package is provided with a thin-film battery electrically connected to and encapsulated with an integrated circuit die. The battery can be fabricated on a dedicated substrate, on the die pad, or on the integrated circuit die itself.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: April 21, 2015
    Assignee: STMicroelectronics, Inc.
    Inventors: Michael J. Hundt, Haibin Du, Krishnan Kelappan, Frank Sigmund
  • Patent number: 8993356
    Abstract: A method for constructing an electrical circuit that includes at least one semiconductor chip encapsulated with a potting compound is disclosed. The method includes applying a galvanic layer arrangement for forming an electrochemical element on an element of the electrical circuit including the at least one semiconductor chip.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: March 31, 2015
    Assignee: Robert Bosch GmbH
    Inventors: Tjalf Pirk, Juergen Butz, Axel Franke, Frieder Haag, Heribert Weber, Arnim Hoechst, Sonja Knies
  • Publication number: 20150084157
    Abstract: According to various embodiments, an electronic structure may be provided, the electronic structure may include: a semiconductor carrier, and a battery structure monolithically integrated with the semiconductor carrier, the battery structure including a plurality of thin film batteries.
    Type: Application
    Filed: September 26, 2013
    Publication date: March 26, 2015
    Applicant: Infineon Technologies AG
    Inventors: Stefan Tegen, Marko Lemke
  • Publication number: 20150054125
    Abstract: Various embodiments provide a chip. The chip has a carrier, an integrated circuit formed above the carrier, and an energy storage element. The energy storage element has a first electrode and a second electrode and is used to supply the integrated circuit with electrical energy. The carrier, the integrated circuit and the energy storage element are monolithically formed, the first electrode being formed from the carrier.
    Type: Application
    Filed: August 26, 2014
    Publication date: February 26, 2015
    Inventors: Gerald HOLWEG, Thomas HERNDL, Guenter HOFER, Walther PACHLER
  • Patent number: 8906711
    Abstract: A new, more economical method for preparing titania pastes for use in more efficient dye-sensitized solar cells is disclosed. The titania pastes are prepared by mixing titania nanoparticles with a titania sol including a titanium precursor. The disclosed method enables the control of titania nanoparticle concentration and morphology in the titania paste and is economical due to the relatively low reaction temperatures. The performances of dye-sensitized solar cells prepared using the disclosed titania pastes are also disclosed.
    Type: Grant
    Filed: July 1, 2012
    Date of Patent: December 9, 2014
    Inventor: Mohammad-Reza Mohammadi
  • Publication number: 20140349172
    Abstract: Apparatus and techniques herein related battery plates. For example, a first battery plate can include a conductive silicon wafer. A first mechanical support can be located on a first side of the conductive silicon wafer. A first active material can be adhered to the first mechanical support and the first side of the conductive silicon wafer, the first active material having a first polarity. In an example, the battery plate can be a bipolar plate, such as having a second mechanical support located on a second side of the conductive silicon wafer opposite the first side, and a second active material adhered to the second mechanical support and the second side of the conductive silicon wafer, the second material having an opposite second polarity.
    Type: Application
    Filed: May 23, 2014
    Publication date: November 27, 2014
    Applicant: Gridtential Energy, Inc.
    Inventors: Collin Mui, Daniel Moomaw
  • Patent number: 8894201
    Abstract: This invention discloses methods and apparatus to form organic semiconductor transistors upon three-dimensionally formed insert devices. In some embodiments, the present invention includes incorporating the three-dimensional surfaces with organic semiconductor-based thin film transistors, electrical interconnects, and energization elements into an insert for incorporation into ophthalmic lenses. In some embodiments, the formed insert may be directly used as an ophthalmic device or incorporated into an ophthalmic device.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 25, 2014
    Assignee: Johnson & Johnson Vision Care, Inc.
    Inventors: Randall B. Pugh, Frederick A. Flitsch
  • Publication number: 20140319649
    Abstract: A lithium battery includes a cathode, an anode including a component made of silicon, a separator element disposed between the cathode and the anode, an electrolyte, and a substrate. The anode is disposed over the substrate or the anode is integrally formed with the substrate.
    Type: Application
    Filed: June 18, 2014
    Publication date: October 30, 2014
    Inventors: Magdalena Forster, Katharina Schmut, Bernhard Goller, Guenter Zieger, Michael Sorger, Philemon Schweizer, Michael Sternad
  • Patent number: 8871533
    Abstract: A solar cell making method includes steps of making a round P-N junction preform by (a) stacking a P-type silicon layer and a N-type silicon layer on top of each other, and (b) forming a P-N junction near an interface between the P-type silicon layer and the N-type silicon layer, wherein the round P-N junction preform defines a first surface and a second surface; forming a first electrode preform on the first surface and forming a second electrode preform on the second surface, thereby forming a round solar cell preform; and forming a photoreceptive surface with the P-N junction exposed on the photoreceptive surface by cutting the round solar cell preform into a plurality of arc shaped solar cells, the photoreceptive surface being on a curved surface of the arc shaped solar cell and being configured to receive incident light beams.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: October 28, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
  • Publication number: 20140315334
    Abstract: An integrated circuit package is provided with a thin-film battery electrically connected to and encapsulated with an integrated circuit die. The battery can be fabricated on a dedicated substrate, on the die pad, or on the integrated circuit die itself.
    Type: Application
    Filed: July 1, 2014
    Publication date: October 23, 2014
    Inventors: Michael J. Hundt, Haibin Du, Krishnan Kelappan, Frank Sigmund
  • Patent number: 8859302
    Abstract: A semiconductor device including a charge storage element present in a buried dielectric layer of the substrate on which the semiconductor device is formed. Charge injection may be used to introduce charge to the charge storage element of the buried dielectric layer that is present within the substrate. The charge that is injected to the charge storage element may be used to adjust the threshold voltage (Vt) of each of the semiconductor devices within an array of semiconductor devices that are present on the substrate.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: October 14, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ali Khakifirooz, Jin Cai, Kangguo Cheng, Robert H. Dennard, Tak H. Ning
  • Publication number: 20140295585
    Abstract: A flexible sheet of organic polymer material, may include a monolithically fabricated array of one or more types of cells juxtaposed among them to form a multi-cell sheet. Each cell may include a self consistent, organic base integrated circuit, replicated in each cell of same type of the array, and shares, in common with other cells of same type, at least a conductor layer of either an electrical supply rail of the integrated circuit or of an input/output of the integrated circuit. A piece of the multi-cell, sheet including any number of self consistent integrated circuit cells, may be severed from the multi-cell sheet by cutting the sheet along intercell boundaries or straight lines, with a reduced affect on the operability of any cell spared by the cutting.
    Type: Application
    Filed: June 16, 2014
    Publication date: October 2, 2014
    Inventor: MANUELA LA ROSA
  • Patent number: 8846419
    Abstract: A process can be used for producing a thin layer solar cell module with a plurality of segments that are electrically connected in series and arranged on a common substrate. The process has steps for application of layers onto the substrate to form at least one electrode and one photoactive layer sequence and has steps for structuring the applied and/or to be applied layers to form the plurality of segments. At least one electrode and one photoactive layer sequence are applied before structuring steps are carried out.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: September 30, 2014
    Assignee: Wilhelm Stein
    Inventor: Wilhelm Stein
  • Publication number: 20140273315
    Abstract: This invention discloses methods and apparatus to form organic semiconductor transistors upon three-dimensionally formed insert devices. In some embodiments, the present invention includes incorporating the three-dimensional surfaces with organic semiconductor-based thin film transistors, electrical interconnects, and energization elements into an insert for incorporation into ophthalmic lenses. In some embodiments, the formed insert may be directly used as an ophthalmic device or incorporated into an ophthalmic device.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: Johnson & Johnson Vision Care, Inc.
    Inventors: Randall B. Pugh, Frederick A. Flitsch
  • Publication number: 20140273316
    Abstract: This invention discloses methods and apparatus to form organic semiconductor transistors upon three-dimensionally formed insert devices. In some embodiments, the present invention includes incorporating the three-dimensional surfaces with organic semiconductor-based thin film transistors, electrical interconnects, and energization elements into an insert for incorporation into ophthalmic lenses. In some embodiments, the formed insert may be directly used as an ophthalmic device or incorporated into an ophthalmic device.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: Johnson & Johnson Vision Care, Inc.
    Inventors: Randall B. Pugh, Frederick A. Flitsch
  • Patent number: 8809078
    Abstract: A self-powered circuit package includes a substrate and an integrated circuit (IC). The IC is mounted on a surface of the substrate. An electrical interconnector electrically couples the IC to the substrate. A solar cell is provided having opposing first and second main surfaces. A portion of the first main surface of the solar cell is configured to receive light from an external source. The solar cell converts energy of the received light into electrical power. The solar cell is disposed above the IC and electrically connected to the IC by way of the substrate to supply the generated power to the IC. A clear mold compound encapsulates a surface of the substrate, the IC, the electrical interconnector, and the solar cell.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: August 19, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Teck Beng Lau, Wai Yew Lo, Boon Yew Low, Chin Teck Siong
  • Publication number: 20140225472
    Abstract: A layer I vanadium-doped PIN-type nuclear battery, including from top to bottom a radioisotope source layer(1), a p-type ohm contact electrode(4), a SiO2 passivation layer(2), a SiO2 compact insulation layer(3), a p-type SiC epitaxial layer(5), an n-type SiC epitaxial layer(6), an n-type SiC substrate(7) and an n-type ohm contact electrode(8). The doping density of the p-type SiC epitaxial layer(5) is 1×1019 to 5×1019 cm3, the doping density of the n-type SiC substrate(7) is 1×1018 to 7×1018 cm3. The n-type SiC epitaxial layer(6) is a low-doped layer I formed by injecting vanadium ions, with the doping density thereof being 1×1013 to 5×1014 cm3. Also provided is a preparation method for a layer I vanadium-doped PIN-type nuclear battery. The present invention solves the problem that the doping density of layer I of the exiting SiC PIN-type nuclear battery is high.
    Type: Application
    Filed: May 31, 2012
    Publication date: August 14, 2014
    Applicant: Xidian University
    Inventors: Hui Guo, Keji Zhang, Yuming Zhang, Yujuan Zhang, Chao Han, Yanqiang Shi
  • Patent number: 8802456
    Abstract: This is a novel SiC betavoltaic device (as an example) which comprises one or more “ultra shallow” P+ N? SiC junctions and a pillared or planar device surface (as an example). Junctions are deemed “ultra shallow”, since the thin junction layer (which is proximal to the device's radioactive source) is only 300 nm to 5 nm thick (as an example). This is a betavoltaic device, made of ultra-shallow junctions, which allows such penetration of emitted lower energy electrons, thus, reducing or eliminating losses through electron-hole pair recombination at the surface.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: August 12, 2014
    Assignee: Widetronix, Inc.
    Inventors: Michael Spencer, Mvs Chandrashekhar
  • Publication number: 20140216519
    Abstract: A method for producing a solar battery cell which hardly causes an electric short circuit at the cut end surface of a solar battery element is provided. A method for producing a solar battery cell in which a solar battery cell is obtained from an elongated solar battery element including an elongated flexible base material, a first electrode layer, a light absorbing layer, and a second electrode layer in this order, and the method includes a partial removal step of forming one or more partial removal portion each extending like a belt at a plurality of parts in the surface of the solar battery element by partially removing layers of the second electrode layer through to the light absorbing layer or the second electrode layer through to the first electrode layer, and a cutting step of cutting the solar battery element at the partial removal portion.
    Type: Application
    Filed: August 24, 2012
    Publication date: August 7, 2014
    Applicant: NITTO DENKO CORPORATION
    Inventors: Taichi Watanabe, Seiki Teraji, Kazunori Kawamura, Hiroto Nishii, Shigenori Morita
  • Publication number: 20140209159
    Abstract: A semiconductor structure and a fabricating process for the same are provided. The semiconductor structure includes a micro battery cell coupled to a solar cell by a semiconductor fabricating process.
    Type: Application
    Filed: January 25, 2013
    Publication date: July 31, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
  • Patent number: 8785218
    Abstract: A solar cell system making method includes steps of making a round P-N junction preform by (a) stacking a P-type silicon layer and a N-type silicon layer on top of each other, and (b) forming a P-N junction near an interface between the P-type silicon layer and the N-type silicon layer; stacking the plurality of P-N junction preforms along a first direction and forming an electrode layer between each adjacent two of the plurality of P-N junction preforms; and forming a first collection electrode on a first of the plurality of P-N junction preforms and forming a second collection electrode on a last of the plurality of P-N junction preforms to form a cylindrical solar cell system. Further, a step of cutting the cylindrical solar cell system can be performed.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: July 22, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 8778704
    Abstract: A self-powered integrated circuit (IC) device includes a lead frame and a solar cell having first and second main surfaces. The solar cell is mounted on a surface of the lead frame. An IC chip is also provided. A first electrical interconnector electrically couples the IC chip to the lead frame and a second electrical interconnector electrically couples the solar cell to the IC chip. A portion of the first main surface of the solar cell is configured to receive light from an external source. The solar cell converts energy of the received light into electrical power that is supplied to the IC chip. A mold compound encapsulates the IC chip, the first and second electrical interconnectors, and at least a portion of the solar cell.
    Type: Grant
    Filed: March 24, 2013
    Date of Patent: July 15, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Teck Beng Lau, Wai Yew Lo, Chin Teck Siong
  • Publication number: 20140183679
    Abstract: An electrical circuit includes a solar cell that has a photovoltaically active front side and a back side. An electronic or micromechanical component is arranged on the back side of the solar cell and is electrically connected to the photovoltaically active front side of the solar cell by a contact-making structure. The electrical circuit also includes a transparent first protective layer that is arranged on the photovoltaically active front side of the solar cell. The contact-making structure has a first contact-making section that is arranged on a front side of the first protective layer facing away from the solar cell.
    Type: Application
    Filed: December 26, 2013
    Publication date: July 3, 2014
    Applicant: Robert Bosch GmbH
    Inventors: Ricardo Ehrenpfordt, Mathias Bruendel, Daniel Pantel, Frederik Ante, Johannes Kenntner
  • Publication number: 20140171822
    Abstract: A medical device includes a first substrate, a second substrate, a control module, and an energy storage device. The first substrate includes at least one of a first semiconductor material and a first insulating material. The second substrate includes at least one of a second semiconductor material and a second insulating material. The second substrate is bonded to the first substrate such that the first and second substrates define an enclosed cavity between the first and second substrates. The control module is disposed within the enclosed cavity. The control module is configured to at least one of determine a physiological parameter of a patient and deliver electrical stimulation to the patient. The energy storage device is disposed within the cavity and is configured to supply power to the control module.
    Type: Application
    Filed: February 21, 2014
    Publication date: June 19, 2014
    Applicant: Medtronic, Inc.
    Inventors: Richard J. O'Brien, John K. Day, Paul F. Gerrish, Michael F. Mattes, David A. Ruben, Malcolm K. Grief
  • Patent number: 8735237
    Abstract: The thickness of drain and source areas may be reduced by a cavity etch used for refilling the cavities with an appropriate semiconductor material, wherein, prior to the epitaxial growth, an implantation process may be performed so as to allow the formation of deep drain and source areas without contributing to unwanted channel doping for a given critical gate height. In other cases, the effective ion blocking length of the gate electrode structure may be enhanced by performing a tilted implantation step for incorporating deep drain and source regions.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: May 27, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Uwe Griebenow, Kai Frohberg, Frank Feustel, Thomas Werner
  • Publication number: 20140083497
    Abstract: An electrical circuit includes a solar cell having a photovoltaically active front side and a back side, and a redistribution wiring plane located on the back side of the solar cell. The redistribution wiring plane is electrically and mechanically connected to the solar cell. The electrical circuit also includes an electronic or micromechanical component located on a back-side side of the redistribution wiring plane facing away from the solar cell. The electronic or micromechanical component is electrically and mechanically connected to the redistribution wiring plane via a connection produced by a mounting and connection technology.
    Type: Application
    Filed: September 23, 2013
    Publication date: March 27, 2014
    Applicant: Robert Bosch GmbH
    Inventors: Ricardo Ehrenpfordt, Mathias Bruendel, Sonja Knies
  • Patent number: 8680881
    Abstract: An interposer to be mounted with an integrated circuit to be a test object is provided with a switch and a probe to detect an electric current corresponding to individual terminals of the integrated circuit. A test pattern signal is then inputted to the integrated circuit through a test substrate as a switch that is connected to a power supply terminal of the integrated circuit and that is turned off. If the integrated circuit normally operates and the current values of all the terminals of the integrated circuit are within a tolerance, the power supply terminal connected to the turned-off switch is identified as a terminal that may be removed.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: March 25, 2014
    Inventors: Yutaka Uematsu, Hideki Osaka, Satoshi Nakamura, Satoshi Muraoka, Mitsuaki Katagiri, Ken Iwakura, Yukitoshi Hirose
  • Patent number: 8664015
    Abstract: A method of manufacturing a solar cell including providing a semiconductor substrate having a first conductivity type; performing a first deposition process that includes forming a first doping material layer having a second conductivity type different from the first conductivity type; performing a drive-in process that includes heating the substrate having the first doping material layer thereon; performing a second deposition process after performing the drive-in process and including forming a second doping material layer on the first doping material layer, wherein the second doping material layer has the second conductivity type; locally heating portions of the substrate, the first doping material layer, and the second doping material layer with a laser to form a contact layer at a first surface of the substrate; and forming a first electrode on the contact layer and a second electrode on a second surface of the substrate opposite to the first surface.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: March 4, 2014
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Sang-Jin Park, Min-Chul Song, Sung-Chan Park, Dong-Seop Kim, Won-Gyun Kim, Sang-Won Seo
  • Patent number: 8647895
    Abstract: A process of manufacturing a crystalline silicon solar cell includes forming a rough surface on a surface of the crystalline silicon wafer and an Al2O3 film is coated on a non-rough surface thereof. A single-sided n diffusion layer and phosphosilicate glass film are formed. An anti-reflection layer SiNx film is formed on a top surface of the phosphosilicate glass film. An Al metallic film is formed as a back ohmic electrode on the Al2O3 film. The local area of the anti-reflection layer SiNx film and the phosphosilicate glass film is melted and removed to form a local area of n+-Si layer. Then, an Al—Si back ohmic contact electrode is formed between the Al metallic film and the crystalline silicon wafer. A front ohmic contact electrode is formed on the molten and removed area of the antireflection layer SiNx film and the phosphosilicate film by light-induced plating.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: February 11, 2014
    Assignee: Institute of Nuclear Energy Research, Atomic Energy Council
    Inventor: Tsun-Neng Yang
  • Patent number: 8624294
    Abstract: An apparatus, system, and method are disclosed for providing optical power to a semiconductor chip. An active semiconductor layer of the semiconductor chip is disposed toward a front side of the semiconductor chip. The active semiconductor layer comprises one or more integrated circuit devices. A photovoltaic semiconductor layer of the semiconductor chip is disposed between the active semiconductor layer and a back side of the semiconductor chip. The back side of the semiconductor chip is opposite the front side of the semiconductor chip. The photovoltaic semiconductor layer converts electromagnetic radiation to electric power. One or more conductive pathways between the photovoltaic semiconductor layer and the active semiconductor layer provide the electric power from the photovoltaic semiconductor layer to the one or more integrated circuit devices of the active semiconductor layer.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: January 7, 2014
    Assignee: International Business Machines Corporation
    Inventor: Eric V. Kline
  • Patent number: 8557615
    Abstract: A method for forming a transparent conductive oxide (TCO) film for use in a TFPV solar device comprises the formation of a tin oxide film doped with between about 5 volume % and about 40 volume % antimony (ATO). Advantageously, the Sb concentration generally ranges from about 15 volume % to about 20 volume % and more advantageously, the Sb concentration is about 19 volume %. The ATO films exhibited almost no change in transmission characteristics between about 300 nm and about 1100 nm or resistivity after either a 15 hour exposure to water or an anneal in air for 8 minutes at 650 C, which indicated the excellent durability. Control sample of Al doped zinc oxide (AZO) exhibited degradation of resistivity for both a 15 hour exposure to water and an anneal in air for 8 minutes at 650 C.
    Type: Grant
    Filed: December 3, 2011
    Date of Patent: October 15, 2013
    Assignee: Intermolecular, Inc.
    Inventors: Guowen Ding, Mohd Fadzli Anwar Hassan, Hien Minh Huu Le, Zhi-Wen Sun
  • Patent number: 8552470
    Abstract: A photovoltaic cell is provided as a composite unit together with elements of an integrated circuit on a common substrate. In a described embodiment, connections are established between a multiple photovoltaic cell portion and a circuitry portion of an integrated structure to enable self-powering of the circuitry portion by the multiple photovoltaic cell portion.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: October 8, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Yuanning Chen, Thomas Patrick Conroy, Jeffrey DeBord, Nagarajan Sridhar
  • Patent number: 8518724
    Abstract: A semiconductor assembly is described in which a support element is constructed on a surface of a semiconductor lamina. Following formation of the thin lamina, which may have a thickness about 50 microns or less, the support element is formed, for example by plating, or by application of a precursor and curing in situ, resulting in a support element which may be, for example, metal, ceramic, polymer, etc. This is in contrast to pre-formed support element which is affixed to the lamina following its formation, or to a donor wafer from which the lamina is subsequently cleaved. Fabricating the support element in situ may avoid the use of adhesives to attach the lamina to a permanent support element. In some embodiments, this process flow allows the lamina to be annealed at high temperature, then to have an amorphous silicon layer formed on each face of the lamina following that anneal.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: August 27, 2013
    Assignee: GTAT Corporation
    Inventors: Christopher J. Petti, Mohamed M. Hilali, Theodore Smick, Venkatesan Murali, Kathy J. Jackson, Zhiyong Li, Gopalakrishna Prabhu
  • Patent number: 8507899
    Abstract: An electric transport component may include a substrate provided with a barrier structure with a first inorganic layer, an organic decoupling layer and a second inorganic layer, wherein the organic decoupling layer is sandwiched between the first and the second inorganic layer, and at least one electrically conductive structure distributed in a plane defined by the organic decoupling layer, and that is accommodated in at least one trench in the organic decoupling layer. A method of manufacturing an electric transport component may include the steps of providing a first inorganic layer, providing a first organic decoupling layer, forming at least one trench in the organic decoupling layer, depositing an electrically conductive material in the at least one trench, and providing a second inorganic layer. The component may be applied for example in opto-electrical and electro-optical devices.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: August 13, 2013
    Assignees: Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek TNO, Koninklijke Philips Electronics N.V.
    Inventors: Cristina Tanase, Erik Dekempeneer, Herbert Lifka, Ike de Vries, Antonius Maria Bernardus van Mol
  • Patent number: 8507298
    Abstract: At least part of a dielectric layer is implanted to form implanted regions. The implanted regions affect the etch rate of the dielectric layer during the formation of the openings through the dielectric layer. Metal contacts may be formed within these openings. The dielectric layer, which may be SiO2 or other materials, may be part of a solar cell or other device.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: August 13, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventor: Deepak A. Ramappa
  • Patent number: 8498830
    Abstract: Example embodiments relate to testing of a battery of a computing device. In example embodiments, a battery test may include determining whether charge control is available for a battery and reading battery data from the battery based on whether charge control is available for the battery. In addition, in example embodiments, the battery test may include determining whether the battery should be replaced based on the battery data.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: July 30, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: John A. Landry, Robert D. Matthews, John A. Wozniak
  • Patent number: 8487392
    Abstract: To increase total power in a betavoltaic device, it is desirable to have greater radioisotope material and/or semiconductor surface area, rather than greater radioisotope material volume. An example of this invention is a high power density betavoltaic battery. In one example of this invention, tritium is used as a fuel source. In other examples, radioisotopes, such as Nickel-63, Phosphorus-33 or promethium, may be used. The semiconductor used in this invention may include, but is not limited to, Si, GaAs, GaP, GaN, diamond, and SiC. For example (for purposes of illustration/example, only), tritium will be referenced as an exemplary fuel source, and SiC will be referenced as an exemplary semiconductor material. Other variations and examples are also discussed and given.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: July 16, 2013
    Assignee: Widetronix, Inc.
    Inventors: Michael Spencer, MVS Chandrashekhar
  • Patent number: 8470616
    Abstract: Apparatuses and methods for manufacturing a solar cell are disclosed. In a particular embodiment, the solar cell may be manufactured by disposing a solar cell in a chamber having a particle source; disposing a patterned assembly comprising an aperture and an assembly segment between the particle source and the solar cell; and selectively implanting first type dopants traveling through the aperture into a first region of the solar cell while minimizing introduction of the first type dopants into a region outside of the first region.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: June 25, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Paul Sullivan, Peter Nunan, Steven R. Walther
  • Patent number: 8470615
    Abstract: The invention concerns a process for producing a thin layer solar cell module with a plurality of segments that are electrically connected in series and arranged on a common substrate. The invention additionally concerns the corresponding thin layer solar cell modules and a production line that is suitable for conducting the production process. The process has steps for application of layers onto the substrate to form at least one electrode and one photoactive layer sequence and has steps for structuring the applied and/or to be applied layers to form the plurality of segments. At least one electrode and one photoactive layer sequence are applied before structuring steps are carried out.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: June 25, 2013
    Inventor: Wilhelm Stein
  • Publication number: 20130147420
    Abstract: An apparatus including a charge storage component; and an energy harvesting component wherein the charge storage component and the energy harvesting component are integrated via a common electrode.
    Type: Application
    Filed: December 9, 2011
    Publication date: June 13, 2013
    Inventors: Di Wei, Piers Andrew, Teuvo Tapani Ryhänen
  • Publication number: 20130134544
    Abstract: An energy harvesting integrated circuit (IC) includes electrical connectors, each having a portion of a first material and a portion of a second material. The first and the second materials have a thermoelectric potential. The IC includes a trace of the first material coupled to the first material of each electrical connector, and a trace of the second material coupled to the second material of each electrical connector and the first trace. A portion of the second trace extends away from a portion of the first trace. The IC has charge storing elements coupled to the first and/or second traces. The first material and the second material are heated to create an electron flow from a thermal gradient between a first zone of the heated first and second materials and a second zone of the first and the second materials away from the first zone.
    Type: Application
    Filed: November 28, 2011
    Publication date: May 30, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventor: Henry L. Sanchez
  • Publication number: 20130128488
    Abstract: A lithium battery includes a cathode, an anode including a component made of silicon, a separator element disposed between the cathode and the anode, an electrolyte, and a substrate. The anode is disposed over the substrate or the anode is integrally formed with the substrate.
    Type: Application
    Filed: November 21, 2011
    Publication date: May 23, 2013
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Magdalena Forster, Katharina Schmut, Bernhard Goller, Guenter Zieger, Michael Sorger, Philemon Schweizer, Michael Sternad
  • Patent number: 8435804
    Abstract: A method for producing a lamina from a donor body includes implanting the donor body with an ion dosage and separably contacting the donor body with a susceptor assembly, where the donor body and the susceptor assembly are in direct contact. A lamina is exfoliated from the donor body, and a deforming force is applied to the lamina or to the donor body to separate the lamina from the donor body.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: May 7, 2013
    Assignee: GTAT Corporation
    Inventors: Adam Kell, Robert Clark-Phelps, Joseph D. Gillespie, Gopal Prabhu, Takao Sakase, Theodore H. Smick, Steve Zuniga, Steve Bababyan