Mos voltage elevator of the charge pump type

A charge pump MOS voltage booster has reduced voltage drops and ripple. This voltage booster is advantageously used in two applications. The voltage has four MOS transistors instead of diodes in a classical voltage booster, which exhibit an undesired voltage drop. The voltage booster also has an oscillator with two outputs and two corresponding charge transfer capacitors. In this manner, the undesired voltage drops and ripple are reduced without complicating the circuitry structure.

Skip to:  ·  Claims  ·  References Cited  · Patent History  ·  Patent History

Claims

1. A voltage doubler receiving at an input a continuous power voltage and supplying at an output a voltage having a value virtually double that of said continuous power voltage, the voltage doubler comprising:

a. an oscillator, powered by said continuous power voltage having a first output, and a second output in phase opposition to the first output.
b. a charge accumulation condenser having a first terminal connected to a potential reference and a second terminal connected to the output of the doubler,
c. a first charge transfer condenser having a first terminal connected to said first output of said oscillator, and
d. two CMOS inverters connected together in a loop to form a flip-flop having a first input connected to a second terminal of said first condenser, negative power terminals connected together to said continuous power voltage and positive power terminals connected together to said second terminal of said charge accumulation condenser, and
e. a second charge transfer condenser having a first terminal connected to said second output of said oscillator and a second terminal connected to a second input of said inverters.

2. The voltage doubler in accordance with claim 1, wherein said inverters include MOS transistors which are virtually equal, and wherein corresponding bulk terminals of said MOS transistors are connected in such a manner as to create a one-way conduction path between said negative terminals and said positive terminals of said inverters.

3. A voltage doubler receiving at an input a continuous power voltage and supplying at an output a voltage having a value virtually double that of said continuous power voltage, the voltage doubler comprising:

a. an oscillator powered by said continuous power voltage and having two outputs in phase opposition,
b. a charge accumulation condenser having a first terminal connected to a potential reference and a second terminal connected to the output of the doubler,
c. a first charge transfer condenser and a second charge transfer condenser having first terminals respectively connected to the outputs of said oscillator,
d. a bridge comprising four transistors and corresponding bulk diodes of the transistors, the transistors being arranged so that the four bulk diodes form a bridge, said bridge having a positive terminal connected to the second terminal of said charge accumulation condenser, a negative terminal connected to said continuous power voltage and two intermediate terminals respectively connected to second terminals of said first charge transfer condenser and said second charge transfer condenser, and
the four transistors hiving principal conduction paths connected in parallel with said tour diodes and control terminals connected to the first charge transfer condenser and the second charge transfer condenser in such a way as to lower a voltage drop along branches of the bridge when the doubler reaches a steady state.

4. The voltage doubler in accordance with claim 3, wherein said four transistors are MOS type and are virtually equal.

5. A voltage booster receiving at an input a continuous power voltage and supplying at an output a voltage higher than the continuous power voltage, the voltage booster comprising:

a. an oscillator powered by said continuous power voltage, having two outputs in phase opposition,
b. a charge accumulation condenser having a first terminal connected to a first potential reference and a second terminal connected to the output of the booster, and
c. at least one charging section having a charge output terminal, a power input terminal, a first side terminal and a second side terminal respectively connected to the outputs of said oscillator, and said at least one charging section being connected in series with the output terminal connected to the second terminal of said charge accumulation condenser and the input terminal connected to the continuous power voltage,
a first charge transfer condenser and a second charge transfer condenser having respective first terminals connected to said first and second side terminals, and
a bridge of four controlled switches having two intermediate terminals connected to respective second terminals of said first charge transfer condenser and said second charge transfer condenser a negative terminal connected to said power input terminal and a positive terminal connected to said charge output terminal,
and wherein the value of the voltage of the output corresponds to said continuous power voltage plus the product of said continuous power voltage and a number of the at least one charging section.

6. The voltage booster in accordance with claim 5, wherein the switches of said bridge form two CMOS inverters connected together in a loop to form a flip-flop, having inputs connected to respective second terminals of said first charge transfer condenser and said second charge transfer condenser, negative power terminals connected together to said power input terminal and positive power terminals connected together to said charge output terminal.

7. The voltage booster in accordance with claim 6, wherein said switches include MOS transistors.

8. The voltage booster in accordance with claim 7, wherein corresponding bulk terminals of said MOS transistors are connected in such a way as to create a one-way conduction path between said power input terminal and said charge output terminal when the switches are not conducting.

9. The voltage booster in accordance with claim 6, wherein said inverters are virtually equal.

10. The voltage booster in accordance with claim 5, wherein said power input terminal is connected to said continuous power voltage.

11. An electrically programmable and delectable non-volatile memory device of a type powered with a low voltage comprising:

a. an oscillator powered by said low voltage, having two outputs in phase opposition,
b. a charge accumulation condenser having a first terminal connected to a first potential reference and a second terminal connected to an output of the memory device and
c. at least one charging section having a charge output terminal, a power input terminal, a first side terminal and a second side terminal respectively connected to the outputs of said oscillator and said at least one charging section being connected in series with the output terminal connected to the second terminal of said charge accumulation condenser and the input terminal connected to the low voltage,
a first charge transfer condenser and a second charge transfer condenser having respective first terminals connected to said first and second side terminals, and
a bridge of four controlled switches having two intermediate terminals connected to respective second terminals of said first charge transfer condenser and said second charge transfer condenser, a negative terminal connected to said power input terminal and a positive terminal connected to said charge output terminal,
and wherein the value of the voltage of the output corresponds to said low voltage plus the product of said low voltage and a number of the at least one charging section.

12. A voltage regulator having a low voltage drop between an input and an output of a type having a MOS power transistor as an output regulation element and a voltage booster means having an output coupled to a control terminal of said power transistor to maintain a conduction condition on the power transistor when operating conditions of the regulator change, wherein the voltage booster means includes:

a. an oscillator powered by a continuous power voltage, having two outputs in phase opposition,
b. a charge accumulation condenser having a first terminal connected to a first potential reference and a second terminal connected to the output of the voltage booster means, and
c. at least one charging section having a charge output terminal, a power input terminal, a first side terminal and a second side terminal respectively connected to the outputs of said oscillator and said at least one charging section being connected in series with the output terminal connected to the second terminal of said charge accumulation condenser and the input terminal connected to the continuous power voltage,
a first charge transfer condenser and a second charge transfer condenser having respective first terminals connected to said first and second side terminals, and
a bridge of four controlled switches having two intermediate terminals connected to respective second terminals of said first charge transfer condenser and said second charge transfer condenser, a negative terminal connected to said power input terminal and a positive terminal connected to said charge output terminal,
and wherein the value of the voltage of the output corresponds to said continuous power voltage plus the product of said continuous power voltage and a number of the at least one charging section.

13. The voltage multiplier of claim 12, wherein the output means includes a charge accumulation condenser connected between the multiplied voltage and a potential reference.

14. The voltage multiplier of claim 13, wherein the output voltage is outputted at the connection between the charge accumulation condenser and the multiplied voltage.

15. The voltage multiplier of claim 14, wherein the oscillator is powered by the constant voltage.

16. A voltage multiplier receiving a constant voltage comprising:

an oscillator providing two outputs in phase opposition,
multiplying means connected to the constant voltage and the oscillator outputs for generating a multiplied voltage which is a multiple of the constant voltage; and
output means receiving the multiplied voltage for outputting a substantially constant output voltage which is a multiple of the constant voltage;
at least one first charge transfer condenser connected to one output of the oscillator;
at least one second charge transfer condenser connected to another output of the oscillator;
at least one bridge circuit of four controlled switches having an input coupled to the constant voltage, an output providing the multiplied voltage, and at least two side inputs respectively coupled to the at least one first charge transfer condenser and the at least one second charge transfer condenser.

17. The voltage multiplier of claim 16, wherein:

the at least one first charge transfer condenser includes a plurality of first charge transfer condensers, each being connected to said one output of the oscillator;
the at least one second charge transfer condenser includes a plurality of second charge transfer condensers corresponding to the plurality of first charge transfer condensers, each of the second charge transfer condensers being connected to said another output of the oscillator;
the at least one bridge circuit includes a plurality of series connected bridge circuits corresponding to the plurality of first charge transfer condensers and plurality of second charge transfer condensers, each bridge circuit having two side inputs connected to a respective first charge transfer condenser and a respective second charge transfer condenser.

18. The voltage multiplier of claim 16, wherein the at least one bridge circuit includes:

four diodes in a bridge arrangement such that a positive terminal is connected to the output of the bridge circuit, a negative terminal is connected to the input of the bridge circuit, and two intermediate terminals are connected to the side inputs of the bridge circuit; and
four transistors having principal conduction paths connected in parallel with the four diodes and control terminals connected to the side inputs.

19. The voltage multiplier of claim 17, wherein each of the plurality of series connected bridge circuits includes:

four diodes in a bridge arrangement such that a positive terminal is connected to the output of the bridge circuit, a negative terminal is connected to the input of the bridge circuit, and two intermediate terminals are connected to the side inputs of the bridge circuit; and
four transistors having principal conduction paths connected in parallel with the four diodes and control terminals connected to the side inputs.
Referenced Cited
U.S. Patent Documents
4029973 June 14, 1977 Kobayashi et al.
4068295 January 10, 1978 Portmann
4740715 April 26, 1988 Okada
4961007 October 2, 1990 Kumanoya et al.
4982317 January 1, 1991 Mauthe
5093586 March 3, 1992 Asari
5172013 December 15, 1992 Matsumura
5247208 September 21, 1993 Nakayama
5266842 November 30, 1993 Park
5436587 July 25, 1995 Cernea
5444362 August 22, 1995 Chung et al.
5519557 May 21, 1996 Kopera, Jr. et al.
Foreign Patent Documents
a-2 261 307 May 1923 GBX
Patent History
Patent number: 5874850
Type: Grant
Filed: Aug 5, 1997
Date of Patent: Feb 23, 1999
Assignee: STMicroelectronics S.r.l. (Agrate Brianza)
Inventors: Francesco Pulvirenti (Acireale), Roberto Gariboldi (Lacchiarella)
Primary Examiner: Timothy P. Callahan
Assistant Examiner: Jung Ho Kim
Law Firm: Wolf, Greenfield & Sacks, P. C.
Application Number: 8/919,592