Abstract: The output stage of a quasi-linear amplifier employs a p-channel and an n-channel FET with their sources at relatively positive and relatively negative operating voltage rails to drive a load from their drain-to-drain connection, so that despite their being enhancement types full rail-to-rail output voltage capability can be obtained without need for bootstrapping. Input signal voltage and direct-coupled feedback voltage are applied to the gate-to-gate connection of p-channel and n-channel source-followers with their respective sources direct-coupled to the gate of the p-channel FET in the output stage and to the gate of the n-channel FET in the output stage, respectively, and with their respective drains connected to the relatively positive operating voltage rail and to the relatively negative operating voltage rail, respectively, in a representative driver stage.

Abstract: In a relaxation oscillator having its frequency determined by the charge rate of a capacitor, a switch means is controlled through a field effect transistor to discharge the capacitor at a predetermined charge level when channel current through the FET is reduced as voltage across the capacitor approaches the voltage supply level. The charge rate of the capacitor is substantially unaffected by the FET and substantially no power is drawn to control the switch means while the capacitor is charging. The duty cycle of the output level may be readily controlled in this oscillator without substantially affecting the low power attributes thereof.

Abstract: A D-C converter obtains high voltage by peak-to-peak rectification of alternating potentials supplied at the secondary of a step-up transformer. The primary winding of the transformer is tuned with series capacitance and driven from the output circuit of a pulse amplifier providing pulses with a repetition rate equal to, or an integral submultiple of, the resonant frequency of the tuned transformer primary. The pulse amplifier is made to offer a low source-impedance so that the Q of the tuned primary is large enough that a substantially sinusoidal voltage with peak-to-peak value several times as large as the amplitude of the pulses supplied by the pulse amplifier appears across the primary. This desirably permits the step-up ratio of the transformer to be reduced.

Abstract: A control transistor in the over-current protection circuitry of a voltage regulator is connected in a regenerative latch circuit with a complementary-conductivity auxiliary transistor, whereby conduction once initiated in said control transistor tends to be sustained. This avoids the tendency towards rapid oscillation between shut-down and power-up conditions in the over-current protection circuitry. The regenerative latch circuit loads the capacitor that supplies its sustaining current so heavily that the potential there-across decays, the decay finally advancing to the point where regeneration halts. The resulting non-conduction of the control transistor permits the voltage regulator to attempt to resume the power-up condition.

Abstract: A control transistor in the over-current protection circuitry of a voltage regulator is connected in a regenerative latch circuit with a complementary-conductivity auxiliary transistor, whereby conduction once initiated in said control transistor tends to be sustained. This avoids the tendency towards rapid oscillation between shut-down and power-up conditions in the over-current protection circuitry. The regenerative latch circuit loads the capacitor that supplies its sustaining current so heavily that the potential thereacross decays, the decay finally advancing to the point where regeneration halts. The resulting non-conduction of the control transistor permits the voltage regulator to attempt to resume the power-up condition. The present invention is an improvement in such a voltage regulator wherein circuitry is provided for rapidly recharging the capacitor for supplying sustaining current during this attempt.

Abstract: A dual time constant, phase lock loop indicator is described which will respond in one manner to signals indicating an "unlocked" condition and respond in another, different manner to signals indicating a "locked" condition.

Abstract: In one embodiment, the amount of power delivered to a load depends upon the length of time a touch switch is actuated or on the number of times it is actuated. In a second embodiment, the power delivered to a load starts at one level and smoothly changes to a second level. Both embodiments include a zero-crossover detector, an a.c. operated load, and a circuit responsive both to zero-crossover pulses and to a circuit actuated by the touch switch for controlling the portion during each half period of the a.c. during which power is applied to the load.

Abstract: A switchable current amplifier comprising first and second transistors of complementary conductivity type, an input terminal connected to the emitter electrode of the first transistor, an output terminal to which the collector electrode of the second transistor connects, an inverting current amplifier having an input connection to which the emitter electrode of the second transistor connects and having an output connection to the base electrode of the first transistor. A control circuit is connected to an interconnection between the collector electrode of the first transistor and the base electrode of the second transistor for selectively diverting --in response to a control signal--collector current flow from said first transistor away from flowing as base current to the second transistor, thereby selectively disabling current amplification between the input and output terminals.

Abstract: A current subtractor circuit utilizing a current mirror amplifier (CMA) as the subtracting element. An operational amplifier converts the difference current to an output voltage proportional to this difference. The operational amplifier additionally may be utilized to equalize the voltage drop across the conduction paths of the transistors comprising the CMA and to maintain the CMA output transistor in its constant current region of operation.

Abstract: The collector currents of first and second junction transistors which have base electrodes biased at the same quiescent potential and have emitter electrodes connected via respective emitter degeneration resistances to a common point, are adjusted relative to each other. This is done by applying linearly temperature-dependent voltages in adjustable ratio with each other to the emitter degeneration resistances. This makes it so that the adjustment of the relative values of the collector currents is substantially unchanging over a temperature range.

Abstract: Reduction of the input impedance of a current amplifier comprising a first common-emitter amplifier transistor followed in direct-coupled cascade connection by a second common-emitter amplifier transistor is furthered by providing the first transistor with a direct-coupled collector-to-base feedback connection of the following type. A source of bias current has connections to the base and to the collector electrodes of said first transistor through respective impedance elements, as may respectively consist of equal numbers of forward-biased semiconductor junctions.

Abstract: A pair of similar conductivity transistors operated at substantially the same temperature T are connected as a current divider. A common terminal to which their emitter electrodes are each connected receives an input current to be apportioned between the emitter-to-collector paths of the transistors, these separate currents flowing to respective branch terminals at the respective collector electrodes of this transistor. The base electrodes of the transistors are connected to opposite ends of a resistive element. A current responsive to T is caused to flow through the resistive element to cause a potential drop substantially proportionally responsive to T between its opposite ends, biasing the transistors relative to each other so as to apportion the input current to the branch terminals in an invariant ratio.

Abstract: A pair of transistors have interconnected emitters connected to a constant-current supply which determines the combined values of their emitter currents--and thus of their collector currents. The ratio between their collector currents is controlled by the temperature at which they and an auxiliary forward-biased semiconductor junction are operated, the base electrodes being differentially biased by a fraction of the potential developed across the auxiliary semiconductor junction.

Abstract: A timing circuit utilizing first and second hysteresis comparators. The first comparator senses the voltage across a capacitor in a first charging circuit. Whenever this voltage exceeds the high comparator reference level, the comparator output is at a first voltage level, permitting charging of the capacitor. When the capacitor voltage drops below the low comparator reference level, the comparator output switches to a second level, discharging the capacitor at a rate much faster than the charging rate. The second comparator interacts with a second capacitor in similar fashion; however, the second capacitor is permitted to charge only during the discharge periods of the first.

Abstract: Input transistors in long-tailed pair have their emitter-to-collector potentials regulated to a small value by the ensuing amplifier stage, reducing their tendency to have collector-to-base leakage currents and permitting them to be super-beta types.

Abstract: An input signal current is superimposed on a direct current. The resultant unidirectional composite signal is symmetrically peak-limited or clipped. Thereafter, the direct current component is extracted to leave a bidirectional signal current which has symmetrically limited peaks and substantially no direct component.

Abstract: Circuit for producing a bias current which is inversely proportional to the common emitter forward gain (h.sub.fe) of a transistor. It includes a first transistor and second and third transistors of opposite conductivity type to the first. The base emitter paths of the second and third transistors are connected in parallel. The first transistor has collector-to-base feedback to regulate its collector current to a prescribed value, which feedback connection is through the emitter-to-collector path of the second transistor. The bias current proportional to the prescribed value divided by the h.sub.fe of the first transistor is provided at the collector of the third transistor.

Abstract: Conventionally, the common-emitter current gain h.sub.fe of a first transistor is reduced to a better-defined value -G by shunting the series connection of its base-emitter junction and emitter degeneration resistor with the series connection of a self-biased, second transistor and a further resistor. By including, per the present invention, a still further resistor in the collector-to-base connection of the second transistor, properly proportioned relative to the other resistors, a second-order dependence of -G upon h.sub.fe can be significantly reduced.

Abstract: Input current is applied to the emitter electrode of a first transistor, of a first conductivity type, to cause a base current response. This base current response is applied to the base electrode of a second transistor, of a second conductivity type complementary to the first conductivity type, to cause a collector current response. This collector current response is applied to the emitter electrode of a third transistor of the second conductivity type to cause another base current response. This latter base current response is applied to the base electrode of a fourth transistor, of the first conductivity type. The fourth transistor responds with an emitter current flow of opposite sense to the input current, but directly proportional thereto without substantial alpha-dependent or beta-dependent errors.

Abstract: A collector-loaded grounded-emitter transistor amplifier output stage employs a temperature-compensated bias network with an auxiliary transistor having its base electrode supplied quiescent current exclusively through a resistive element connecting the base and collector electrodes. A source of input signal is coupled to the base electrode of the auxiliary transistor by capacitative means and decoupled by resistive means from the collector electrode thereof. The temperature stabilizing auxiliary transistor accordingly provides a preliminary amplification of input signals for application to the base electrode of the output stage amplifier transistor, without use of additional active devices.