Abstract: A novel trench isolated guard ring region for providing RF isolation is disclosed. The semiconductor integrated circuit (IC) device of the present invention comprises a substrate, an insulating layer formed on the substrate, a buried layer formed on the insulating layer, and an epitaxial layer of a first conductivity type formed on the buried layer. A first isolation trench is formed in the epitaxial layer and the buried layer that extends to the insulating layer and that surrounds a first selected surface area of the epitaxial layer. A second isolation trench is formed in the epitaxial layer and the buried layer that extends to the insulating layer and that surrounds the first isolation trench and defines a guard ring region between itself and the first isolation trench. A plurality of isolation chambers is formed within the first and second isolation trenches. A collector is implanted into the epitaxial layer in the guard ring region.

Abstract: A method and apparatus for calibrating range in a radar system. Due mainly to temperature changes in a radar system which cause frequency deviation error, range errors can be introduced into the radar system, thus adversely affecting the determination of the position of targets relative to the host platform. These range errors can be corrected by detecting and accurately estimating the frequency deviation error of a radar system. The present invention improves target position determination performance in a radar system by reducing errors introduced by the frequency deviation error. The present invention relies upon the observation that the Doppler range rate is largely unaffected by frequency deviation error, and thus, is approximately equal to the actual range rate. In accordance with a first range calibration technique of the present invention, the radar system measures the range, Doppler range rate, and azimuth angle of a target during at least two successive time instances.

Abstract: The present invention is a novel method and apparatus for implementing a high-precision timer utilizing a non-optimal oscillator and a high-speed oscillator wherein only one oscillator is enabled at a given moment in time. The high-precision timer method and apparatus comprises a timer and an error-correction technique. In one embodiment, the timer of the present invention is constructed from a high-speed oscillator and a low-speed non-optimal oscillator. The timer operates from the high-speed oscillator during on-the-air modes of operation and from the low-speed non-optimal oscillator during sleep modes of operation. The present inventive method corrects errors that are introduced by the non-optimal oscillator and a swallow counter. The errors are corrected using an error-correction technique having two steps: an error-determination step and an error-correction step.

Abstract: A crystal oscillator apparatus is described that has a wide dynamic frequency range and that is capable of supporting a broad range of crystal types. The present invention reduces the unwanted side effects that are associated with the prior art crystal oscillator designs, such as the clipping of signals, the introduction of signal distortion and unwanted signal harmonics. The present invention reduces the total wasted loop gain of the oscillator while also reducing the amount of integrated circuit real estate required to implement the crystal oscillator. The crystal oscillator apparatus of the present invention preferably comprises a crystal resonator circuit, an inverting amplifier, a bias circuit, a reference circuit, and a peak detector circuit. The present invention takes advantage of Automatic Gain Control (AGC) design techniques. The gain of the present crystal oscillator is automatically regulated using a closed loop circuit design.