Patents Represented by Attorney, Agent or Law Firm Andrew Steven Naglestad
  • Patent number: 6795901
    Abstract: Disclosed is an apparatus and method for providing synchronization support in a multiprocessor environment using a memory interface that supports an atomic read-modify-write operation as well as conventional read and write access to memory. Selection of the operation is made dependent on which ever address of a plurality of addresses is used to reference a single physical memory location in which there is stored a lock variable used to restrict access to a shared resource. When the particular access corresponds to a read-modify-write operation, the lock variable is read out and a modified version written back into memory on the condition that the shared resource is available to the requesting processor. The method and apparatus executes read-modify-write operations by interface logic circuitry in response to a single processor read operation. Through these atomic or otherwise indivisible operations, the method and apparatus precludes multiprocessor conflict.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: September 21, 2004
    Assignee: Alliant Techsystems Inc.
    Inventors: Randall A. Florek, Claire J. Lacour
  • Patent number: 6437737
    Abstract: Data compression method, system, and program code for compressing antenna pattern data generated by measuring the complex voltage derived from the interaction of a RF waveform and a sensing element are disclosed. The antenna pattern data are modeled with a plurality of infinitesimal antenna elements, each element defined in terms of a distinct position, orientation, and polarization. An analytical expression for the interaction between the plurality of infinitesimal antenna elements and an impinging waveform yields a plurality of expressions for a theoretical voltage. The plurality of infinitesimal antenna elements constitute a mathematical basis set from which a weighted linear combination is constructed. The value of the weights are determined by equating the complex voltage representing the antenna pattern data with the theoretical voltage representing the plurality of weighted infinitesimal antenna elements.
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: August 20, 2002
    Assignee: Science and Applied Technology, Inc.
    Inventors: Teodoro Azzarelli, Paul Kwon
  • Patent number: 6407711
    Abstract: A carrier structure apparatus for mounting conformal antenna elements to a non-planar mounting surface as part of an antenna array of an airborne vehicle or ground-based system also comprising a seeker section, fairing and guidance processing system. The carrier structure is a rigid and conductive apparatus that is made to conform to the geometric configuration of both the antenna element as well as the mounting surface. The conformal antenna is rigidly mounted to the carrier structure, which is in turn removably affixed to the non-planar mounting surface. With the carrier structure, each antenna element of the array may be individually tested and replaced prior to and after installation in array.
    Type: Grant
    Filed: April 24, 2001
    Date of Patent: June 18, 2002
    Assignees: Science and Applied Technology, Inc., Composite Optics, Incorporated
    Inventors: Mark Bonebright, Bill McNaul, Tony Rerecich, Jon Duff Weatherington, Rodney Sinclair, John Wittmond, William Zimmer
  • Patent number: 6281833
    Abstract: A timing and control method and apparatus (111) for performing precise range rate aiding includes a range gate delay means (114) for generating an estimate of the range gate delay (135) each pulse repetition interval as a function of the initial range (134) and velocity (133) provided by a processor (104). The range gate delay (135) is converted into a coarse delay (138) defining the integral number of clock cycles preceding the range gate, and a fine delay (139) for positioning a range gate to within a fraction of a clock cycle. Fine temporal control is achieved using programmable delay lines (117) and (118), which retard various control signals, including the system clock signal (131), in accordance with the fine delay (139). A modified signal (126) then drives a counter means (119) which outputs a signal (128) that defines an analog-to-digital sampling window beginning at the elapse of the range gate delay (135).
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: August 28, 2001
    Assignee: Science and Applied Technology, Inc.
    Inventors: Richard C. Pringle, Charles T. McMurray